se.c 20 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for ONKYO WAVIO SE-90PCI and SE-200PCI
  5. *
  6. * Copyright (c) 2007 Shin-ya Okada sh_okada(at)d4.dion.ne.jp
  7. * (at) -> @
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/delay.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/init.h>
  27. #include <linux/slab.h>
  28. #include <sound/core.h>
  29. #include <sound/tlv.h>
  30. #include "ice1712.h"
  31. #include "envy24ht.h"
  32. #include "se.h"
  33. struct se_spec {
  34. struct {
  35. unsigned char ch1, ch2;
  36. } vol[8];
  37. };
  38. /****************************************************************************/
  39. /* ONKYO WAVIO SE-200PCI */
  40. /****************************************************************************/
  41. /*
  42. * system configuration ICE_EEP2_SYSCONF=0x4b
  43. * XIN1 49.152MHz
  44. * not have UART
  45. * one stereo ADC and a S/PDIF receiver connected
  46. * four stereo DACs connected
  47. *
  48. * AC-Link configuration ICE_EEP2_ACLINK=0x80
  49. * use I2C, not use AC97
  50. *
  51. * I2S converters feature ICE_EEP2_I2S=0x78
  52. * I2S codec has no volume/mute control feature
  53. * I2S codec supports 96KHz and 192KHz
  54. * I2S codec 24bits
  55. *
  56. * S/PDIF configuration ICE_EEP2_SPDIF=0xc3
  57. * Enable integrated S/PDIF transmitter
  58. * internal S/PDIF out implemented
  59. * S/PDIF is stereo
  60. * External S/PDIF out implemented
  61. *
  62. *
  63. * ** connected chips **
  64. *
  65. * WM8740
  66. * A 2ch-DAC of main outputs.
  67. * It setuped as I2S mode by wire, so no way to setup from software.
  68. * The sample-rate are automatically changed.
  69. * ML/I2S (28pin) --------+
  70. * MC/DM1 (27pin) -- 5V |
  71. * MD/DM0 (26pin) -- GND |
  72. * MUTEB (25pin) -- NC |
  73. * MODE (24pin) -- GND |
  74. * CSBIW (23pin) --------+
  75. * |
  76. * RSTB (22pin) --R(1K)-+
  77. * Probably it reduce the noise from the control line.
  78. *
  79. * WM8766
  80. * A 6ch-DAC for surrounds.
  81. * It's control wire was connected to GPIOxx (3-wire serial interface)
  82. * ML/I2S (11pin) -- GPIO18
  83. * MC/IWL (12pin) -- GPIO17
  84. * MD/DM (13pin) -- GPIO16
  85. * MUTE (14pin) -- GPIO01
  86. *
  87. * WM8776
  88. * A 2ch-ADC(with 10ch-selector) plus 2ch-DAC.
  89. * It's control wire was connected to SDA/SCLK (2-wire serial interface)
  90. * MODE (16pin) -- R(1K) -- GND
  91. * CE (17pin) -- R(1K) -- GND 2-wire mode (address=0x34)
  92. * DI (18pin) -- SDA
  93. * CL (19pin) -- SCLK
  94. *
  95. *
  96. * ** output pins and device names **
  97. *
  98. * 7.1ch name -- output connector color -- device (-D option)
  99. *
  100. * FRONT 2ch -- green -- plughw:0,0
  101. * CENTER(Lch) SUBWOOFER(Rch) -- black -- plughw:0,2,0
  102. * SURROUND 2ch -- orange -- plughw:0,2,1
  103. * SURROUND BACK 2ch -- white -- plughw:0,2,2
  104. *
  105. */
  106. /****************************************************************************/
  107. /* WM8740 interface */
  108. /****************************************************************************/
  109. static void se200pci_WM8740_init(struct snd_ice1712 *ice)
  110. {
  111. /* nothing to do */
  112. }
  113. static void se200pci_WM8740_set_pro_rate(struct snd_ice1712 *ice,
  114. unsigned int rate)
  115. {
  116. /* nothing to do */
  117. }
  118. /****************************************************************************/
  119. /* WM8766 interface */
  120. /****************************************************************************/
  121. static void se200pci_WM8766_write(struct snd_ice1712 *ice,
  122. unsigned int addr, unsigned int data)
  123. {
  124. unsigned int st;
  125. unsigned int bits;
  126. int i;
  127. const unsigned int DATA = 0x010000;
  128. const unsigned int CLOCK = 0x020000;
  129. const unsigned int LOAD = 0x040000;
  130. const unsigned int ALL_MASK = (DATA | CLOCK | LOAD);
  131. snd_ice1712_save_gpio_status(ice);
  132. st = ((addr & 0x7f) << 9) | (data & 0x1ff);
  133. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction | ALL_MASK);
  134. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask & ~ALL_MASK);
  135. bits = snd_ice1712_gpio_read(ice) & ~ALL_MASK;
  136. snd_ice1712_gpio_write(ice, bits);
  137. for (i = 0; i < 16; i++) {
  138. udelay(1);
  139. bits &= ~CLOCK;
  140. st = (st << 1);
  141. if (st & 0x10000)
  142. bits |= DATA;
  143. else
  144. bits &= ~DATA;
  145. snd_ice1712_gpio_write(ice, bits);
  146. udelay(1);
  147. bits |= CLOCK;
  148. snd_ice1712_gpio_write(ice, bits);
  149. }
  150. udelay(1);
  151. bits |= LOAD;
  152. snd_ice1712_gpio_write(ice, bits);
  153. udelay(1);
  154. bits |= (DATA | CLOCK);
  155. snd_ice1712_gpio_write(ice, bits);
  156. snd_ice1712_restore_gpio_status(ice);
  157. }
  158. static void se200pci_WM8766_set_volume(struct snd_ice1712 *ice, int ch,
  159. unsigned int vol1, unsigned int vol2)
  160. {
  161. switch (ch) {
  162. case 0:
  163. se200pci_WM8766_write(ice, 0x000, vol1);
  164. se200pci_WM8766_write(ice, 0x001, vol2 | 0x100);
  165. break;
  166. case 1:
  167. se200pci_WM8766_write(ice, 0x004, vol1);
  168. se200pci_WM8766_write(ice, 0x005, vol2 | 0x100);
  169. break;
  170. case 2:
  171. se200pci_WM8766_write(ice, 0x006, vol1);
  172. se200pci_WM8766_write(ice, 0x007, vol2 | 0x100);
  173. break;
  174. }
  175. }
  176. static void se200pci_WM8766_init(struct snd_ice1712 *ice)
  177. {
  178. se200pci_WM8766_write(ice, 0x1f, 0x000); /* RESET ALL */
  179. udelay(10);
  180. se200pci_WM8766_set_volume(ice, 0, 0, 0); /* volume L=0 R=0 */
  181. se200pci_WM8766_set_volume(ice, 1, 0, 0); /* volume L=0 R=0 */
  182. se200pci_WM8766_set_volume(ice, 2, 0, 0); /* volume L=0 R=0 */
  183. se200pci_WM8766_write(ice, 0x03, 0x022); /* serial mode I2S-24bits */
  184. se200pci_WM8766_write(ice, 0x0a, 0x080); /* MCLK=256fs */
  185. se200pci_WM8766_write(ice, 0x12, 0x000); /* MDP=0 */
  186. se200pci_WM8766_write(ice, 0x15, 0x000); /* MDP=0 */
  187. se200pci_WM8766_write(ice, 0x09, 0x000); /* demp=off mute=off */
  188. se200pci_WM8766_write(ice, 0x02, 0x124); /* ch-assign L=L R=R RESET */
  189. se200pci_WM8766_write(ice, 0x02, 0x120); /* ch-assign L=L R=R */
  190. }
  191. static void se200pci_WM8766_set_pro_rate(struct snd_ice1712 *ice,
  192. unsigned int rate)
  193. {
  194. if (rate > 96000)
  195. se200pci_WM8766_write(ice, 0x0a, 0x000); /* MCLK=128fs */
  196. else
  197. se200pci_WM8766_write(ice, 0x0a, 0x080); /* MCLK=256fs */
  198. }
  199. /****************************************************************************/
  200. /* WM8776 interface */
  201. /****************************************************************************/
  202. static void se200pci_WM8776_write(struct snd_ice1712 *ice,
  203. unsigned int addr, unsigned int data)
  204. {
  205. unsigned int val;
  206. val = (addr << 9) | data;
  207. snd_vt1724_write_i2c(ice, 0x34, val >> 8, val & 0xff);
  208. }
  209. static void se200pci_WM8776_set_output_volume(struct snd_ice1712 *ice,
  210. unsigned int vol1, unsigned int vol2)
  211. {
  212. se200pci_WM8776_write(ice, 0x03, vol1);
  213. se200pci_WM8776_write(ice, 0x04, vol2 | 0x100);
  214. }
  215. static void se200pci_WM8776_set_input_volume(struct snd_ice1712 *ice,
  216. unsigned int vol1, unsigned int vol2)
  217. {
  218. se200pci_WM8776_write(ice, 0x0e, vol1);
  219. se200pci_WM8776_write(ice, 0x0f, vol2 | 0x100);
  220. }
  221. static const char * const se200pci_sel[] = {
  222. "LINE-IN", "CD-IN", "MIC-IN", "ALL-MIX", NULL
  223. };
  224. static void se200pci_WM8776_set_input_selector(struct snd_ice1712 *ice,
  225. unsigned int sel)
  226. {
  227. static unsigned char vals[] = {
  228. /* LINE, CD, MIC, ALL, GND */
  229. 0x10, 0x04, 0x08, 0x1c, 0x03
  230. };
  231. if (sel > 4)
  232. sel = 4;
  233. se200pci_WM8776_write(ice, 0x15, vals[sel]);
  234. }
  235. static void se200pci_WM8776_set_afl(struct snd_ice1712 *ice, unsigned int afl)
  236. {
  237. /* AFL -- After Fader Listening */
  238. if (afl)
  239. se200pci_WM8776_write(ice, 0x16, 0x005);
  240. else
  241. se200pci_WM8776_write(ice, 0x16, 0x001);
  242. }
  243. static const char * const se200pci_agc[] = {
  244. "Off", "LimiterMode", "ALCMode", NULL
  245. };
  246. static void se200pci_WM8776_set_agc(struct snd_ice1712 *ice, unsigned int agc)
  247. {
  248. /* AGC -- Auto Gain Control of the input */
  249. switch (agc) {
  250. case 0:
  251. se200pci_WM8776_write(ice, 0x11, 0x000); /* Off */
  252. break;
  253. case 1:
  254. se200pci_WM8776_write(ice, 0x10, 0x07b);
  255. se200pci_WM8776_write(ice, 0x11, 0x100); /* LimiterMode */
  256. break;
  257. case 2:
  258. se200pci_WM8776_write(ice, 0x10, 0x1fb);
  259. se200pci_WM8776_write(ice, 0x11, 0x100); /* ALCMode */
  260. break;
  261. }
  262. }
  263. static void se200pci_WM8776_init(struct snd_ice1712 *ice)
  264. {
  265. int i;
  266. static unsigned short default_values[] = {
  267. 0x100, 0x100, 0x100,
  268. 0x100, 0x100, 0x100,
  269. 0x000, 0x090, 0x000, 0x000,
  270. 0x022, 0x022, 0x022,
  271. 0x008, 0x0cf, 0x0cf, 0x07b, 0x000,
  272. 0x032, 0x000, 0x0a6, 0x001, 0x001
  273. };
  274. se200pci_WM8776_write(ice, 0x17, 0x000); /* reset all */
  275. /* ADC and DAC interface is I2S 24bits mode */
  276. /* The sample-rate are automatically changed */
  277. udelay(10);
  278. /* BUT my board can not do reset all, so I load all by manually. */
  279. for (i = 0; i < ARRAY_SIZE(default_values); i++)
  280. se200pci_WM8776_write(ice, i, default_values[i]);
  281. se200pci_WM8776_set_input_selector(ice, 0);
  282. se200pci_WM8776_set_afl(ice, 0);
  283. se200pci_WM8776_set_agc(ice, 0);
  284. se200pci_WM8776_set_input_volume(ice, 0, 0);
  285. se200pci_WM8776_set_output_volume(ice, 0, 0);
  286. /* head phone mute and power down */
  287. se200pci_WM8776_write(ice, 0x00, 0);
  288. se200pci_WM8776_write(ice, 0x01, 0);
  289. se200pci_WM8776_write(ice, 0x02, 0x100);
  290. se200pci_WM8776_write(ice, 0x0d, 0x080);
  291. }
  292. static void se200pci_WM8776_set_pro_rate(struct snd_ice1712 *ice,
  293. unsigned int rate)
  294. {
  295. /* nothing to do */
  296. }
  297. /****************************************************************************/
  298. /* runtime interface */
  299. /****************************************************************************/
  300. static void se200pci_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate)
  301. {
  302. se200pci_WM8740_set_pro_rate(ice, rate);
  303. se200pci_WM8766_set_pro_rate(ice, rate);
  304. se200pci_WM8776_set_pro_rate(ice, rate);
  305. }
  306. struct se200pci_control {
  307. const char *name;
  308. enum {
  309. WM8766,
  310. WM8776in,
  311. WM8776out,
  312. WM8776sel,
  313. WM8776agc,
  314. WM8776afl
  315. } target;
  316. enum { VOLUME1, VOLUME2, BOOLEAN, ENUM } type;
  317. int ch;
  318. const char * const *member;
  319. const char *comment;
  320. };
  321. static const struct se200pci_control se200pci_cont[] = {
  322. {
  323. .name = "Front Playback Volume",
  324. .target = WM8776out,
  325. .type = VOLUME1,
  326. .comment = "Front(green)"
  327. },
  328. {
  329. .name = "Side Playback Volume",
  330. .target = WM8766,
  331. .type = VOLUME1,
  332. .ch = 1,
  333. .comment = "Surround(orange)"
  334. },
  335. {
  336. .name = "Surround Playback Volume",
  337. .target = WM8766,
  338. .type = VOLUME1,
  339. .ch = 2,
  340. .comment = "SurroundBack(white)"
  341. },
  342. {
  343. .name = "CLFE Playback Volume",
  344. .target = WM8766,
  345. .type = VOLUME1,
  346. .ch = 0,
  347. .comment = "Center(Lch)&SubWoofer(Rch)(black)"
  348. },
  349. {
  350. .name = "Capture Volume",
  351. .target = WM8776in,
  352. .type = VOLUME2
  353. },
  354. {
  355. .name = "Capture Select",
  356. .target = WM8776sel,
  357. .type = ENUM,
  358. .member = se200pci_sel
  359. },
  360. {
  361. .name = "AGC Capture Mode",
  362. .target = WM8776agc,
  363. .type = ENUM,
  364. .member = se200pci_agc
  365. },
  366. {
  367. .name = "AFL Bypass Playback Switch",
  368. .target = WM8776afl,
  369. .type = BOOLEAN
  370. }
  371. };
  372. static int se200pci_get_enum_count(int n)
  373. {
  374. const char * const *member;
  375. int c;
  376. member = se200pci_cont[n].member;
  377. if (!member)
  378. return 0;
  379. for (c = 0; member[c]; c++)
  380. ;
  381. return c;
  382. }
  383. static int se200pci_cont_volume_info(struct snd_kcontrol *kc,
  384. struct snd_ctl_elem_info *uinfo)
  385. {
  386. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  387. uinfo->count = 2;
  388. uinfo->value.integer.min = 0; /* mute */
  389. uinfo->value.integer.max = 0xff; /* 0dB */
  390. return 0;
  391. }
  392. #define se200pci_cont_boolean_info snd_ctl_boolean_mono_info
  393. static int se200pci_cont_enum_info(struct snd_kcontrol *kc,
  394. struct snd_ctl_elem_info *uinfo)
  395. {
  396. int n, c;
  397. n = kc->private_value;
  398. c = se200pci_get_enum_count(n);
  399. if (!c)
  400. return -EINVAL;
  401. return snd_ctl_enum_info(uinfo, 1, c, se200pci_cont[n].member);
  402. }
  403. static int se200pci_cont_volume_get(struct snd_kcontrol *kc,
  404. struct snd_ctl_elem_value *uc)
  405. {
  406. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  407. struct se_spec *spec = ice->spec;
  408. int n = kc->private_value;
  409. uc->value.integer.value[0] = spec->vol[n].ch1;
  410. uc->value.integer.value[1] = spec->vol[n].ch2;
  411. return 0;
  412. }
  413. static int se200pci_cont_boolean_get(struct snd_kcontrol *kc,
  414. struct snd_ctl_elem_value *uc)
  415. {
  416. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  417. struct se_spec *spec = ice->spec;
  418. int n = kc->private_value;
  419. uc->value.integer.value[0] = spec->vol[n].ch1;
  420. return 0;
  421. }
  422. static int se200pci_cont_enum_get(struct snd_kcontrol *kc,
  423. struct snd_ctl_elem_value *uc)
  424. {
  425. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  426. struct se_spec *spec = ice->spec;
  427. int n = kc->private_value;
  428. uc->value.enumerated.item[0] = spec->vol[n].ch1;
  429. return 0;
  430. }
  431. static void se200pci_cont_update(struct snd_ice1712 *ice, int n)
  432. {
  433. struct se_spec *spec = ice->spec;
  434. switch (se200pci_cont[n].target) {
  435. case WM8766:
  436. se200pci_WM8766_set_volume(ice,
  437. se200pci_cont[n].ch,
  438. spec->vol[n].ch1,
  439. spec->vol[n].ch2);
  440. break;
  441. case WM8776in:
  442. se200pci_WM8776_set_input_volume(ice,
  443. spec->vol[n].ch1,
  444. spec->vol[n].ch2);
  445. break;
  446. case WM8776out:
  447. se200pci_WM8776_set_output_volume(ice,
  448. spec->vol[n].ch1,
  449. spec->vol[n].ch2);
  450. break;
  451. case WM8776sel:
  452. se200pci_WM8776_set_input_selector(ice,
  453. spec->vol[n].ch1);
  454. break;
  455. case WM8776agc:
  456. se200pci_WM8776_set_agc(ice, spec->vol[n].ch1);
  457. break;
  458. case WM8776afl:
  459. se200pci_WM8776_set_afl(ice, spec->vol[n].ch1);
  460. break;
  461. default:
  462. break;
  463. }
  464. }
  465. static int se200pci_cont_volume_put(struct snd_kcontrol *kc,
  466. struct snd_ctl_elem_value *uc)
  467. {
  468. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  469. struct se_spec *spec = ice->spec;
  470. int n = kc->private_value;
  471. unsigned int vol1, vol2;
  472. int changed;
  473. changed = 0;
  474. vol1 = uc->value.integer.value[0] & 0xff;
  475. vol2 = uc->value.integer.value[1] & 0xff;
  476. if (spec->vol[n].ch1 != vol1) {
  477. spec->vol[n].ch1 = vol1;
  478. changed = 1;
  479. }
  480. if (spec->vol[n].ch2 != vol2) {
  481. spec->vol[n].ch2 = vol2;
  482. changed = 1;
  483. }
  484. if (changed)
  485. se200pci_cont_update(ice, n);
  486. return changed;
  487. }
  488. static int se200pci_cont_boolean_put(struct snd_kcontrol *kc,
  489. struct snd_ctl_elem_value *uc)
  490. {
  491. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  492. struct se_spec *spec = ice->spec;
  493. int n = kc->private_value;
  494. unsigned int vol1;
  495. vol1 = !!uc->value.integer.value[0];
  496. if (spec->vol[n].ch1 != vol1) {
  497. spec->vol[n].ch1 = vol1;
  498. se200pci_cont_update(ice, n);
  499. return 1;
  500. }
  501. return 0;
  502. }
  503. static int se200pci_cont_enum_put(struct snd_kcontrol *kc,
  504. struct snd_ctl_elem_value *uc)
  505. {
  506. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  507. struct se_spec *spec = ice->spec;
  508. int n = kc->private_value;
  509. unsigned int vol1;
  510. vol1 = uc->value.enumerated.item[0];
  511. if (vol1 >= se200pci_get_enum_count(n))
  512. return -EINVAL;
  513. if (spec->vol[n].ch1 != vol1) {
  514. spec->vol[n].ch1 = vol1;
  515. se200pci_cont_update(ice, n);
  516. return 1;
  517. }
  518. return 0;
  519. }
  520. static const DECLARE_TLV_DB_SCALE(db_scale_gain1, -12750, 50, 1);
  521. static const DECLARE_TLV_DB_SCALE(db_scale_gain2, -10350, 50, 1);
  522. static int se200pci_add_controls(struct snd_ice1712 *ice)
  523. {
  524. int i;
  525. struct snd_kcontrol_new cont;
  526. int err;
  527. memset(&cont, 0, sizeof(cont));
  528. cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  529. for (i = 0; i < ARRAY_SIZE(se200pci_cont); i++) {
  530. cont.private_value = i;
  531. cont.name = se200pci_cont[i].name;
  532. cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
  533. cont.tlv.p = NULL;
  534. switch (se200pci_cont[i].type) {
  535. case VOLUME1:
  536. case VOLUME2:
  537. cont.info = se200pci_cont_volume_info;
  538. cont.get = se200pci_cont_volume_get;
  539. cont.put = se200pci_cont_volume_put;
  540. cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  541. if (se200pci_cont[i].type == VOLUME1)
  542. cont.tlv.p = db_scale_gain1;
  543. else
  544. cont.tlv.p = db_scale_gain2;
  545. break;
  546. case BOOLEAN:
  547. cont.info = se200pci_cont_boolean_info;
  548. cont.get = se200pci_cont_boolean_get;
  549. cont.put = se200pci_cont_boolean_put;
  550. break;
  551. case ENUM:
  552. cont.info = se200pci_cont_enum_info;
  553. cont.get = se200pci_cont_enum_get;
  554. cont.put = se200pci_cont_enum_put;
  555. break;
  556. default:
  557. snd_BUG();
  558. return -EINVAL;
  559. }
  560. err = snd_ctl_add(ice->card, snd_ctl_new1(&cont, ice));
  561. if (err < 0)
  562. return err;
  563. }
  564. return 0;
  565. }
  566. /****************************************************************************/
  567. /* ONKYO WAVIO SE-90PCI */
  568. /****************************************************************************/
  569. /*
  570. * system configuration ICE_EEP2_SYSCONF=0x4b
  571. * AC-Link configuration ICE_EEP2_ACLINK=0x80
  572. * I2S converters feature ICE_EEP2_I2S=0x78
  573. * S/PDIF configuration ICE_EEP2_SPDIF=0xc3
  574. *
  575. * ** connected chip **
  576. *
  577. * WM8716
  578. * A 2ch-DAC of main outputs.
  579. * It setuped as I2S mode by wire, so no way to setup from software.
  580. * ML/I2S (28pin) -- +5V
  581. * MC/DM1 (27pin) -- GND
  582. * MC/DM0 (26pin) -- GND
  583. * MUTEB (25pin) -- open (internal pull-up)
  584. * MODE (24pin) -- GND
  585. * CSBIWO (23pin) -- +5V
  586. *
  587. */
  588. /* Nothing to do for this chip. */
  589. /****************************************************************************/
  590. /* probe/initialize/setup */
  591. /****************************************************************************/
  592. static int se_init(struct snd_ice1712 *ice)
  593. {
  594. struct se_spec *spec;
  595. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  596. if (!spec)
  597. return -ENOMEM;
  598. ice->spec = spec;
  599. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE90PCI) {
  600. ice->num_total_dacs = 2;
  601. ice->num_total_adcs = 0;
  602. ice->vt1720 = 1;
  603. return 0;
  604. } else if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE200PCI) {
  605. ice->num_total_dacs = 8;
  606. ice->num_total_adcs = 2;
  607. se200pci_WM8740_init(ice);
  608. se200pci_WM8766_init(ice);
  609. se200pci_WM8776_init(ice);
  610. ice->gpio.set_pro_rate = se200pci_set_pro_rate;
  611. return 0;
  612. }
  613. return -ENOENT;
  614. }
  615. static int se_add_controls(struct snd_ice1712 *ice)
  616. {
  617. int err;
  618. err = 0;
  619. /* nothing to do for VT1724_SUBDEVICE_SE90PCI */
  620. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE200PCI)
  621. err = se200pci_add_controls(ice);
  622. return err;
  623. }
  624. /****************************************************************************/
  625. /* entry point */
  626. /****************************************************************************/
  627. static unsigned char se200pci_eeprom[] = {
  628. [ICE_EEP2_SYSCONF] = 0x4b, /* 49.152Hz, spdif-in/ADC, 4DACs */
  629. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  630. [ICE_EEP2_I2S] = 0x78, /* 96k-ok, 24bit, 192k-ok */
  631. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  632. [ICE_EEP2_GPIO_DIR] = 0x02, /* WM8766 mute 1=output */
  633. [ICE_EEP2_GPIO_DIR1] = 0x00, /* not used */
  634. [ICE_EEP2_GPIO_DIR2] = 0x07, /* WM8766 ML/MC/MD 1=output */
  635. [ICE_EEP2_GPIO_MASK] = 0x00, /* 0=writable */
  636. [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0=writable */
  637. [ICE_EEP2_GPIO_MASK2] = 0x00, /* 0=writable */
  638. [ICE_EEP2_GPIO_STATE] = 0x00, /* WM8766 mute=0 */
  639. [ICE_EEP2_GPIO_STATE1] = 0x00, /* not used */
  640. [ICE_EEP2_GPIO_STATE2] = 0x07, /* WM8766 ML/MC/MD */
  641. };
  642. static unsigned char se90pci_eeprom[] = {
  643. [ICE_EEP2_SYSCONF] = 0x4b, /* 49.152Hz, spdif-in/ADC, 4DACs */
  644. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  645. [ICE_EEP2_I2S] = 0x78, /* 96k-ok, 24bit, 192k-ok */
  646. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  647. /* ALL GPIO bits are in input mode */
  648. };
  649. struct snd_ice1712_card_info snd_vt1724_se_cards[] = {
  650. {
  651. .subvendor = VT1724_SUBDEVICE_SE200PCI,
  652. .name = "ONKYO SE200PCI",
  653. .model = "se200pci",
  654. .chip_init = se_init,
  655. .build_controls = se_add_controls,
  656. .eeprom_size = sizeof(se200pci_eeprom),
  657. .eeprom_data = se200pci_eeprom,
  658. },
  659. {
  660. .subvendor = VT1724_SUBDEVICE_SE90PCI,
  661. .name = "ONKYO SE90PCI",
  662. .model = "se90pci",
  663. .chip_init = se_init,
  664. .build_controls = se_add_controls,
  665. .eeprom_size = sizeof(se90pci_eeprom),
  666. .eeprom_data = se90pci_eeprom,
  667. },
  668. {} /*terminator*/
  669. };