patch_sigmatel.c 138 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include "hda_codec.h"
  35. #include "hda_local.h"
  36. #include "hda_auto_parser.h"
  37. #include "hda_beep.h"
  38. #include "hda_jack.h"
  39. #include "hda_generic.h"
  40. enum {
  41. STAC_REF,
  42. STAC_9200_OQO,
  43. STAC_9200_DELL_D21,
  44. STAC_9200_DELL_D22,
  45. STAC_9200_DELL_D23,
  46. STAC_9200_DELL_M21,
  47. STAC_9200_DELL_M22,
  48. STAC_9200_DELL_M23,
  49. STAC_9200_DELL_M24,
  50. STAC_9200_DELL_M25,
  51. STAC_9200_DELL_M26,
  52. STAC_9200_DELL_M27,
  53. STAC_9200_M4,
  54. STAC_9200_M4_2,
  55. STAC_9200_PANASONIC,
  56. STAC_9200_EAPD_INIT,
  57. STAC_9200_MODELS
  58. };
  59. enum {
  60. STAC_9205_REF,
  61. STAC_9205_DELL_M42,
  62. STAC_9205_DELL_M43,
  63. STAC_9205_DELL_M44,
  64. STAC_9205_EAPD,
  65. STAC_9205_MODELS
  66. };
  67. enum {
  68. STAC_92HD73XX_NO_JD, /* no jack-detection */
  69. STAC_92HD73XX_REF,
  70. STAC_92HD73XX_INTEL,
  71. STAC_DELL_M6_AMIC,
  72. STAC_DELL_M6_DMIC,
  73. STAC_DELL_M6_BOTH,
  74. STAC_DELL_EQ,
  75. STAC_ALIENWARE_M17X,
  76. STAC_ELO_VUPOINT_15MX,
  77. STAC_92HD89XX_HP_FRONT_JACK,
  78. STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
  79. STAC_92HD73XX_ASUS_MOBO,
  80. STAC_92HD73XX_MODELS
  81. };
  82. enum {
  83. STAC_92HD83XXX_REF,
  84. STAC_92HD83XXX_PWR_REF,
  85. STAC_DELL_S14,
  86. STAC_DELL_VOSTRO_3500,
  87. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  88. STAC_HP_DV7_4000,
  89. STAC_HP_ZEPHYR,
  90. STAC_92HD83XXX_HP_LED,
  91. STAC_92HD83XXX_HP_INV_LED,
  92. STAC_92HD83XXX_HP_MIC_LED,
  93. STAC_HP_LED_GPIO10,
  94. STAC_92HD83XXX_HEADSET_JACK,
  95. STAC_92HD83XXX_HP,
  96. STAC_HP_ENVY_BASS,
  97. STAC_HP_BNB13_EQ,
  98. STAC_HP_ENVY_TS_BASS,
  99. STAC_HP_ENVY_TS_DAC_BIND,
  100. STAC_92HD83XXX_GPIO10_EAPD,
  101. STAC_92HD83XXX_MODELS
  102. };
  103. enum {
  104. STAC_92HD71BXX_REF,
  105. STAC_DELL_M4_1,
  106. STAC_DELL_M4_2,
  107. STAC_DELL_M4_3,
  108. STAC_HP_M4,
  109. STAC_HP_DV4,
  110. STAC_HP_DV5,
  111. STAC_HP_HDX,
  112. STAC_92HD71BXX_HP,
  113. STAC_92HD71BXX_NO_DMIC,
  114. STAC_92HD71BXX_NO_SMUX,
  115. STAC_92HD71BXX_MODELS
  116. };
  117. enum {
  118. STAC_92HD95_HP_LED,
  119. STAC_92HD95_HP_BASS,
  120. STAC_92HD95_MODELS
  121. };
  122. enum {
  123. STAC_925x_REF,
  124. STAC_M1,
  125. STAC_M1_2,
  126. STAC_M2,
  127. STAC_M2_2,
  128. STAC_M3,
  129. STAC_M5,
  130. STAC_M6,
  131. STAC_925x_MODELS
  132. };
  133. enum {
  134. STAC_D945_REF,
  135. STAC_D945GTP3,
  136. STAC_D945GTP5,
  137. STAC_INTEL_MAC_V1,
  138. STAC_INTEL_MAC_V2,
  139. STAC_INTEL_MAC_V3,
  140. STAC_INTEL_MAC_V4,
  141. STAC_INTEL_MAC_V5,
  142. STAC_INTEL_MAC_AUTO,
  143. STAC_ECS_202,
  144. STAC_922X_DELL_D81,
  145. STAC_922X_DELL_D82,
  146. STAC_922X_DELL_M81,
  147. STAC_922X_DELL_M82,
  148. STAC_922X_INTEL_MAC_GPIO,
  149. STAC_922X_MODELS
  150. };
  151. enum {
  152. STAC_D965_REF_NO_JD, /* no jack-detection */
  153. STAC_D965_REF,
  154. STAC_D965_3ST,
  155. STAC_D965_5ST,
  156. STAC_D965_5ST_NO_FP,
  157. STAC_D965_VERBS,
  158. STAC_DELL_3ST,
  159. STAC_DELL_BIOS,
  160. STAC_NEMO_DEFAULT,
  161. STAC_DELL_BIOS_AMIC,
  162. STAC_DELL_BIOS_SPDIF,
  163. STAC_927X_DELL_DMIC,
  164. STAC_927X_VOLKNOB,
  165. STAC_927X_MODELS
  166. };
  167. enum {
  168. STAC_9872_VAIO,
  169. STAC_9872_MODELS
  170. };
  171. struct sigmatel_spec {
  172. struct hda_gen_spec gen;
  173. unsigned int eapd_switch: 1;
  174. unsigned int linear_tone_beep:1;
  175. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  176. unsigned int volknob_init:1; /* special volume-knob initialization */
  177. unsigned int powerdown_adcs:1;
  178. unsigned int have_spdif_mux:1;
  179. /* gpio lines */
  180. unsigned int eapd_mask;
  181. unsigned int gpio_mask;
  182. unsigned int gpio_dir;
  183. unsigned int gpio_data;
  184. unsigned int gpio_mute;
  185. unsigned int gpio_led;
  186. unsigned int gpio_led_polarity;
  187. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  188. unsigned int vref_led;
  189. int default_polarity;
  190. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  191. unsigned int mic_enabled; /* current mic mute state (bitmask) */
  192. /* stream */
  193. unsigned int stream_delay;
  194. /* analog loopback */
  195. const struct snd_kcontrol_new *aloopback_ctl;
  196. unsigned int aloopback;
  197. unsigned char aloopback_mask;
  198. unsigned char aloopback_shift;
  199. /* power management */
  200. unsigned int power_map_bits;
  201. unsigned int num_pwrs;
  202. const hda_nid_t *pwr_nids;
  203. unsigned int active_adcs;
  204. /* beep widgets */
  205. hda_nid_t anabeep_nid;
  206. /* SPDIF-out mux */
  207. const char * const *spdif_labels;
  208. struct hda_input_mux spdif_mux;
  209. unsigned int cur_smux[2];
  210. };
  211. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  212. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  213. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  214. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  215. 0x0f, 0x10, 0x11
  216. };
  217. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  218. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  219. 0x0f, 0x10
  220. };
  221. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  222. 0x0a, 0x0d, 0x0f
  223. };
  224. /*
  225. * PCM hooks
  226. */
  227. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  228. struct hda_codec *codec,
  229. struct snd_pcm_substream *substream,
  230. int action)
  231. {
  232. struct sigmatel_spec *spec = codec->spec;
  233. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  234. msleep(spec->stream_delay);
  235. }
  236. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  237. struct hda_codec *codec,
  238. struct snd_pcm_substream *substream,
  239. int action)
  240. {
  241. struct sigmatel_spec *spec = codec->spec;
  242. int i, idx = 0;
  243. if (!spec->powerdown_adcs)
  244. return;
  245. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  246. if (spec->gen.all_adcs[i] == hinfo->nid) {
  247. idx = i;
  248. break;
  249. }
  250. }
  251. switch (action) {
  252. case HDA_GEN_PCM_ACT_OPEN:
  253. msleep(40);
  254. snd_hda_codec_write(codec, hinfo->nid, 0,
  255. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  256. spec->active_adcs |= (1 << idx);
  257. break;
  258. case HDA_GEN_PCM_ACT_CLOSE:
  259. snd_hda_codec_write(codec, hinfo->nid, 0,
  260. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  261. spec->active_adcs &= ~(1 << idx);
  262. break;
  263. }
  264. }
  265. /*
  266. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  267. * funky external mute control using GPIO pins.
  268. */
  269. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  270. unsigned int dir_mask, unsigned int data)
  271. {
  272. unsigned int gpiostate, gpiomask, gpiodir;
  273. hda_nid_t fg = codec->core.afg;
  274. codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  275. gpiostate = snd_hda_codec_read(codec, fg, 0,
  276. AC_VERB_GET_GPIO_DATA, 0);
  277. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  278. gpiomask = snd_hda_codec_read(codec, fg, 0,
  279. AC_VERB_GET_GPIO_MASK, 0);
  280. gpiomask |= mask;
  281. gpiodir = snd_hda_codec_read(codec, fg, 0,
  282. AC_VERB_GET_GPIO_DIRECTION, 0);
  283. gpiodir |= dir_mask;
  284. /* Configure GPIOx as CMOS */
  285. snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
  286. snd_hda_codec_write(codec, fg, 0,
  287. AC_VERB_SET_GPIO_MASK, gpiomask);
  288. snd_hda_codec_read(codec, fg, 0,
  289. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  290. msleep(1);
  291. snd_hda_codec_read(codec, fg, 0,
  292. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  293. }
  294. /* hook for controlling mic-mute LED GPIO */
  295. static void stac_capture_led_hook(struct hda_codec *codec,
  296. struct snd_kcontrol *kcontrol,
  297. struct snd_ctl_elem_value *ucontrol)
  298. {
  299. struct sigmatel_spec *spec = codec->spec;
  300. unsigned int mask;
  301. bool cur_mute, prev_mute;
  302. if (!kcontrol || !ucontrol)
  303. return;
  304. mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  305. prev_mute = !spec->mic_enabled;
  306. if (ucontrol->value.integer.value[0] ||
  307. ucontrol->value.integer.value[1])
  308. spec->mic_enabled |= mask;
  309. else
  310. spec->mic_enabled &= ~mask;
  311. cur_mute = !spec->mic_enabled;
  312. if (cur_mute != prev_mute) {
  313. if (cur_mute)
  314. spec->gpio_data |= spec->mic_mute_led_gpio;
  315. else
  316. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  317. stac_gpio_set(codec, spec->gpio_mask,
  318. spec->gpio_dir, spec->gpio_data);
  319. }
  320. }
  321. static int stac_vrefout_set(struct hda_codec *codec,
  322. hda_nid_t nid, unsigned int new_vref)
  323. {
  324. int error, pinctl;
  325. codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
  326. pinctl = snd_hda_codec_read(codec, nid, 0,
  327. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  328. if (pinctl < 0)
  329. return pinctl;
  330. pinctl &= 0xff;
  331. pinctl &= ~AC_PINCTL_VREFEN;
  332. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  333. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  334. if (error < 0)
  335. return error;
  336. return 1;
  337. }
  338. /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
  339. /* this hook is set in stac_setup_gpio() */
  340. static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
  341. hda_nid_t nid,
  342. unsigned int power_state)
  343. {
  344. if (nid == codec->core.afg && power_state == AC_PWRST_D3)
  345. return AC_PWRST_D1;
  346. return snd_hda_gen_path_power_filter(codec, nid, power_state);
  347. }
  348. /* update mute-LED accoring to the master switch */
  349. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  350. {
  351. struct sigmatel_spec *spec = codec->spec;
  352. int muted = !enabled;
  353. if (!spec->gpio_led)
  354. return;
  355. /* LED state is inverted on these systems */
  356. if (spec->gpio_led_polarity)
  357. muted = !muted;
  358. if (!spec->vref_mute_led_nid) {
  359. if (muted)
  360. spec->gpio_data |= spec->gpio_led;
  361. else
  362. spec->gpio_data &= ~spec->gpio_led;
  363. stac_gpio_set(codec, spec->gpio_mask,
  364. spec->gpio_dir, spec->gpio_data);
  365. } else {
  366. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  367. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  368. spec->vref_led);
  369. }
  370. }
  371. /* vmaster hook to update mute LED */
  372. static void stac_vmaster_hook(void *private_data, int val)
  373. {
  374. stac_update_led_status(private_data, val);
  375. }
  376. /* automute hook to handle GPIO mute and EAPD updates */
  377. static void stac_update_outputs(struct hda_codec *codec)
  378. {
  379. struct sigmatel_spec *spec = codec->spec;
  380. if (spec->gpio_mute)
  381. spec->gen.master_mute =
  382. !(snd_hda_codec_read(codec, codec->core.afg, 0,
  383. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  384. snd_hda_gen_update_outputs(codec);
  385. if (spec->eapd_mask && spec->eapd_switch) {
  386. unsigned int val = spec->gpio_data;
  387. if (spec->gen.speaker_muted)
  388. val &= ~spec->eapd_mask;
  389. else
  390. val |= spec->eapd_mask;
  391. if (spec->gpio_data != val) {
  392. spec->gpio_data = val;
  393. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  394. val);
  395. }
  396. }
  397. }
  398. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  399. bool enable, bool do_write)
  400. {
  401. struct sigmatel_spec *spec = codec->spec;
  402. unsigned int idx, val;
  403. for (idx = 0; idx < spec->num_pwrs; idx++) {
  404. if (spec->pwr_nids[idx] == nid)
  405. break;
  406. }
  407. if (idx >= spec->num_pwrs)
  408. return;
  409. idx = 1 << idx;
  410. val = spec->power_map_bits;
  411. if (enable)
  412. val &= ~idx;
  413. else
  414. val |= idx;
  415. /* power down unused output ports */
  416. if (val != spec->power_map_bits) {
  417. spec->power_map_bits = val;
  418. if (do_write)
  419. snd_hda_codec_write(codec, codec->core.afg, 0,
  420. AC_VERB_IDT_SET_POWER_MAP, val);
  421. }
  422. }
  423. /* update power bit per jack plug/unplug */
  424. static void jack_update_power(struct hda_codec *codec,
  425. struct hda_jack_callback *jack)
  426. {
  427. struct sigmatel_spec *spec = codec->spec;
  428. int i;
  429. if (!spec->num_pwrs)
  430. return;
  431. if (jack && jack->nid) {
  432. stac_toggle_power_map(codec, jack->nid,
  433. snd_hda_jack_detect(codec, jack->nid),
  434. true);
  435. return;
  436. }
  437. /* update all jacks */
  438. for (i = 0; i < spec->num_pwrs; i++) {
  439. hda_nid_t nid = spec->pwr_nids[i];
  440. if (!snd_hda_jack_tbl_get(codec, nid))
  441. continue;
  442. stac_toggle_power_map(codec, nid,
  443. snd_hda_jack_detect(codec, nid),
  444. false);
  445. }
  446. snd_hda_codec_write(codec, codec->core.afg, 0,
  447. AC_VERB_IDT_SET_POWER_MAP,
  448. spec->power_map_bits);
  449. }
  450. static void stac_vref_event(struct hda_codec *codec,
  451. struct hda_jack_callback *event)
  452. {
  453. unsigned int data;
  454. data = snd_hda_codec_read(codec, codec->core.afg, 0,
  455. AC_VERB_GET_GPIO_DATA, 0);
  456. /* toggle VREF state based on GPIOx status */
  457. snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
  458. !!(data & (1 << event->private_data)));
  459. }
  460. /* initialize the power map and enable the power event to jacks that
  461. * haven't been assigned to automute
  462. */
  463. static void stac_init_power_map(struct hda_codec *codec)
  464. {
  465. struct sigmatel_spec *spec = codec->spec;
  466. int i;
  467. for (i = 0; i < spec->num_pwrs; i++) {
  468. hda_nid_t nid = spec->pwr_nids[i];
  469. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  470. def_conf = get_defcfg_connect(def_conf);
  471. if (def_conf == AC_JACK_PORT_COMPLEX &&
  472. spec->vref_mute_led_nid != nid &&
  473. is_jack_detectable(codec, nid)) {
  474. snd_hda_jack_detect_enable_callback(codec, nid,
  475. jack_update_power);
  476. } else {
  477. if (def_conf == AC_JACK_PORT_NONE)
  478. stac_toggle_power_map(codec, nid, false, false);
  479. else
  480. stac_toggle_power_map(codec, nid, true, false);
  481. }
  482. }
  483. }
  484. /*
  485. */
  486. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  487. int *valp)
  488. {
  489. return !snd_hda_get_int_hint(codec, key, valp);
  490. }
  491. /* override some hints from the hwdep entry */
  492. static void stac_store_hints(struct hda_codec *codec)
  493. {
  494. struct sigmatel_spec *spec = codec->spec;
  495. int val;
  496. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  497. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  498. spec->gpio_mask;
  499. }
  500. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  501. spec->gpio_dir &= spec->gpio_mask;
  502. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  503. spec->gpio_data &= spec->gpio_mask;
  504. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  505. spec->eapd_mask &= spec->gpio_mask;
  506. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  507. spec->gpio_mute &= spec->gpio_mask;
  508. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  509. if (val >= 0)
  510. spec->eapd_switch = val;
  511. }
  512. /*
  513. * loopback controls
  514. */
  515. #define stac_aloopback_info snd_ctl_boolean_mono_info
  516. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  517. struct snd_ctl_elem_value *ucontrol)
  518. {
  519. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  520. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  521. struct sigmatel_spec *spec = codec->spec;
  522. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  523. (spec->aloopback_mask << idx));
  524. return 0;
  525. }
  526. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  527. struct snd_ctl_elem_value *ucontrol)
  528. {
  529. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  530. struct sigmatel_spec *spec = codec->spec;
  531. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  532. unsigned int dac_mode;
  533. unsigned int val, idx_val;
  534. idx_val = spec->aloopback_mask << idx;
  535. if (ucontrol->value.integer.value[0])
  536. val = spec->aloopback | idx_val;
  537. else
  538. val = spec->aloopback & ~idx_val;
  539. if (spec->aloopback == val)
  540. return 0;
  541. spec->aloopback = val;
  542. /* Only return the bits defined by the shift value of the
  543. * first two bytes of the mask
  544. */
  545. dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
  546. kcontrol->private_value & 0xFFFF, 0x0);
  547. dac_mode >>= spec->aloopback_shift;
  548. if (spec->aloopback & idx_val) {
  549. snd_hda_power_up(codec);
  550. dac_mode |= idx_val;
  551. } else {
  552. snd_hda_power_down(codec);
  553. dac_mode &= ~idx_val;
  554. }
  555. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  556. kcontrol->private_value >> 16, dac_mode);
  557. return 1;
  558. }
  559. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  560. { \
  561. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  562. .name = "Analog Loopback", \
  563. .count = cnt, \
  564. .info = stac_aloopback_info, \
  565. .get = stac_aloopback_get, \
  566. .put = stac_aloopback_put, \
  567. .private_value = verb_read | (verb_write << 16), \
  568. }
  569. /*
  570. * Mute LED handling on HP laptops
  571. */
  572. /* check whether it's a HP laptop with a docking port */
  573. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  574. {
  575. if (codec->core.vendor_id != 0x111d7605 &&
  576. codec->core.vendor_id != 0x111d76d1)
  577. return false;
  578. switch (codec->core.subsystem_id) {
  579. case 0x103c1618:
  580. case 0x103c1619:
  581. case 0x103c161a:
  582. case 0x103c161b:
  583. case 0x103c161c:
  584. case 0x103c161d:
  585. case 0x103c161e:
  586. case 0x103c161f:
  587. case 0x103c162a:
  588. case 0x103c162b:
  589. case 0x103c1630:
  590. case 0x103c1631:
  591. case 0x103c1633:
  592. case 0x103c1634:
  593. case 0x103c1635:
  594. case 0x103c3587:
  595. case 0x103c3588:
  596. case 0x103c3589:
  597. case 0x103c358a:
  598. case 0x103c3667:
  599. case 0x103c3668:
  600. case 0x103c3669:
  601. return true;
  602. }
  603. return false;
  604. }
  605. static bool hp_blike_system(u32 subsystem_id)
  606. {
  607. switch (subsystem_id) {
  608. case 0x103c1473: /* HP ProBook 6550b */
  609. case 0x103c1520:
  610. case 0x103c1521:
  611. case 0x103c1523:
  612. case 0x103c1524:
  613. case 0x103c1525:
  614. case 0x103c1722:
  615. case 0x103c1723:
  616. case 0x103c1724:
  617. case 0x103c1725:
  618. case 0x103c1726:
  619. case 0x103c1727:
  620. case 0x103c1728:
  621. case 0x103c1729:
  622. case 0x103c172a:
  623. case 0x103c172b:
  624. case 0x103c307e:
  625. case 0x103c307f:
  626. case 0x103c3080:
  627. case 0x103c3081:
  628. case 0x103c7007:
  629. case 0x103c7008:
  630. return true;
  631. }
  632. return false;
  633. }
  634. static void set_hp_led_gpio(struct hda_codec *codec)
  635. {
  636. struct sigmatel_spec *spec = codec->spec;
  637. unsigned int gpio;
  638. if (spec->gpio_led)
  639. return;
  640. gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
  641. gpio &= AC_GPIO_IO_COUNT;
  642. if (gpio > 3)
  643. spec->gpio_led = 0x08; /* GPIO 3 */
  644. else
  645. spec->gpio_led = 0x01; /* GPIO 0 */
  646. }
  647. /*
  648. * This method searches for the mute LED GPIO configuration
  649. * provided as OEM string in SMBIOS. The format of that string
  650. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  651. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  652. * that corresponds to the NOT muted state of the master volume
  653. * and G is the index of the GPIO to use as the mute LED control (0..9)
  654. * If _G portion is missing it is assigned based on the codec ID
  655. *
  656. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  657. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  658. *
  659. *
  660. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  661. * SMBIOS - at least the ones I have seen do not have them - which include
  662. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  663. * HP Pavilion dv9500t CTO.
  664. * Need more information on whether it is true across the entire series.
  665. * -- kunal
  666. */
  667. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  668. {
  669. struct sigmatel_spec *spec = codec->spec;
  670. const struct dmi_device *dev = NULL;
  671. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  672. get_int_hint(codec, "gpio_led_polarity",
  673. &spec->gpio_led_polarity);
  674. return 1;
  675. }
  676. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  677. if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
  678. &spec->gpio_led_polarity,
  679. &spec->gpio_led) == 2) {
  680. unsigned int max_gpio;
  681. max_gpio = snd_hda_param_read(codec, codec->core.afg,
  682. AC_PAR_GPIO_CAP);
  683. max_gpio &= AC_GPIO_IO_COUNT;
  684. if (spec->gpio_led < max_gpio)
  685. spec->gpio_led = 1 << spec->gpio_led;
  686. else
  687. spec->vref_mute_led_nid = spec->gpio_led;
  688. return 1;
  689. }
  690. if (sscanf(dev->name, "HP_Mute_LED_%u",
  691. &spec->gpio_led_polarity) == 1) {
  692. set_hp_led_gpio(codec);
  693. return 1;
  694. }
  695. /* BIOS bug: unfilled OEM string */
  696. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  697. set_hp_led_gpio(codec);
  698. if (default_polarity >= 0)
  699. spec->gpio_led_polarity = default_polarity;
  700. else
  701. spec->gpio_led_polarity = 1;
  702. return 1;
  703. }
  704. }
  705. /*
  706. * Fallback case - if we don't find the DMI strings,
  707. * we statically set the GPIO - if not a B-series system
  708. * and default polarity is provided
  709. */
  710. if (!hp_blike_system(codec->core.subsystem_id) &&
  711. (default_polarity == 0 || default_polarity == 1)) {
  712. set_hp_led_gpio(codec);
  713. spec->gpio_led_polarity = default_polarity;
  714. return 1;
  715. }
  716. return 0;
  717. }
  718. /* check whether a built-in speaker is included in parsed pins */
  719. static bool has_builtin_speaker(struct hda_codec *codec)
  720. {
  721. struct sigmatel_spec *spec = codec->spec;
  722. hda_nid_t *nid_pin;
  723. int nids, i;
  724. if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
  725. nid_pin = spec->gen.autocfg.line_out_pins;
  726. nids = spec->gen.autocfg.line_outs;
  727. } else {
  728. nid_pin = spec->gen.autocfg.speaker_pins;
  729. nids = spec->gen.autocfg.speaker_outs;
  730. }
  731. for (i = 0; i < nids; i++) {
  732. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
  733. if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
  734. return true;
  735. }
  736. return false;
  737. }
  738. /*
  739. * PC beep controls
  740. */
  741. /* create PC beep volume controls */
  742. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  743. hda_nid_t nid)
  744. {
  745. struct sigmatel_spec *spec = codec->spec;
  746. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  747. struct snd_kcontrol_new *knew;
  748. static struct snd_kcontrol_new abeep_mute_ctl =
  749. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  750. static struct snd_kcontrol_new dbeep_mute_ctl =
  751. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  752. static struct snd_kcontrol_new beep_vol_ctl =
  753. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  754. /* check for mute support for the amp */
  755. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  756. const struct snd_kcontrol_new *temp;
  757. if (spec->anabeep_nid == nid)
  758. temp = &abeep_mute_ctl;
  759. else
  760. temp = &dbeep_mute_ctl;
  761. knew = snd_hda_gen_add_kctl(&spec->gen,
  762. "Beep Playback Switch", temp);
  763. if (!knew)
  764. return -ENOMEM;
  765. knew->private_value =
  766. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  767. }
  768. /* check to see if there is volume support for the amp */
  769. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  770. knew = snd_hda_gen_add_kctl(&spec->gen,
  771. "Beep Playback Volume",
  772. &beep_vol_ctl);
  773. if (!knew)
  774. return -ENOMEM;
  775. knew->private_value =
  776. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  777. }
  778. return 0;
  779. }
  780. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  781. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  782. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  783. struct snd_ctl_elem_value *ucontrol)
  784. {
  785. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  786. ucontrol->value.integer.value[0] = codec->beep->enabled;
  787. return 0;
  788. }
  789. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  790. struct snd_ctl_elem_value *ucontrol)
  791. {
  792. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  793. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  794. }
  795. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  796. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  797. .name = "Beep Playback Switch",
  798. .info = stac_dig_beep_switch_info,
  799. .get = stac_dig_beep_switch_get,
  800. .put = stac_dig_beep_switch_put,
  801. };
  802. static int stac_beep_switch_ctl(struct hda_codec *codec)
  803. {
  804. struct sigmatel_spec *spec = codec->spec;
  805. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  806. return -ENOMEM;
  807. return 0;
  808. }
  809. #endif
  810. /*
  811. * SPDIF-out mux controls
  812. */
  813. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  814. struct snd_ctl_elem_info *uinfo)
  815. {
  816. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  817. struct sigmatel_spec *spec = codec->spec;
  818. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  819. }
  820. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  821. struct snd_ctl_elem_value *ucontrol)
  822. {
  823. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  824. struct sigmatel_spec *spec = codec->spec;
  825. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  826. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  827. return 0;
  828. }
  829. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  830. struct snd_ctl_elem_value *ucontrol)
  831. {
  832. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  833. struct sigmatel_spec *spec = codec->spec;
  834. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  835. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  836. spec->gen.autocfg.dig_out_pins[smux_idx],
  837. &spec->cur_smux[smux_idx]);
  838. }
  839. static const struct snd_kcontrol_new stac_smux_mixer = {
  840. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  841. .name = "IEC958 Playback Source",
  842. /* count set later */
  843. .info = stac_smux_enum_info,
  844. .get = stac_smux_enum_get,
  845. .put = stac_smux_enum_put,
  846. };
  847. static const char * const stac_spdif_labels[] = {
  848. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  849. };
  850. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  851. {
  852. struct sigmatel_spec *spec = codec->spec;
  853. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  854. const char * const *labels = spec->spdif_labels;
  855. struct snd_kcontrol_new *kctl;
  856. int i, num_cons;
  857. if (cfg->dig_outs < 1)
  858. return 0;
  859. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  860. if (num_cons <= 1)
  861. return 0;
  862. if (!labels)
  863. labels = stac_spdif_labels;
  864. for (i = 0; i < num_cons; i++) {
  865. if (snd_BUG_ON(!labels[i]))
  866. return -EINVAL;
  867. snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
  868. }
  869. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  870. if (!kctl)
  871. return -ENOMEM;
  872. kctl->count = cfg->dig_outs;
  873. return 0;
  874. }
  875. /*
  876. */
  877. static const struct hda_verb stac9200_core_init[] = {
  878. /* set dac0mux for dac converter */
  879. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  880. {}
  881. };
  882. static const struct hda_verb stac9200_eapd_init[] = {
  883. /* set dac0mux for dac converter */
  884. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  885. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  886. {}
  887. };
  888. static const struct hda_verb dell_eq_core_init[] = {
  889. /* set master volume to max value without distortion
  890. * and direct control */
  891. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  892. {}
  893. };
  894. static const struct hda_verb stac92hd73xx_core_init[] = {
  895. /* set master volume and direct control */
  896. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  897. {}
  898. };
  899. static const struct hda_verb stac92hd83xxx_core_init[] = {
  900. /* power state controls amps */
  901. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  902. {}
  903. };
  904. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  905. { 0x22, 0x785, 0x43 },
  906. { 0x22, 0x782, 0xe0 },
  907. { 0x22, 0x795, 0x00 },
  908. {}
  909. };
  910. static const struct hda_verb stac92hd71bxx_core_init[] = {
  911. /* set master volume and direct control */
  912. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  913. {}
  914. };
  915. static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
  916. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  917. 0x0f, 0x0a, 0x0d, 0
  918. };
  919. static const struct hda_verb stac925x_core_init[] = {
  920. /* set dac0mux for dac converter */
  921. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  922. /* mute the master volume */
  923. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  924. {}
  925. };
  926. static const struct hda_verb stac922x_core_init[] = {
  927. /* set master volume and direct control */
  928. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  929. {}
  930. };
  931. static const struct hda_verb d965_core_init[] = {
  932. /* unmute node 0x1b */
  933. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  934. /* select node 0x03 as DAC */
  935. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  936. {}
  937. };
  938. static const struct hda_verb dell_3st_core_init[] = {
  939. /* don't set delta bit */
  940. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  941. /* unmute node 0x1b */
  942. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  943. /* select node 0x03 as DAC */
  944. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  945. {}
  946. };
  947. static const struct hda_verb stac927x_core_init[] = {
  948. /* set master volume and direct control */
  949. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  950. /* enable analog pc beep path */
  951. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  952. {}
  953. };
  954. static const struct hda_verb stac927x_volknob_core_init[] = {
  955. /* don't set delta bit */
  956. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  957. /* enable analog pc beep path */
  958. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  959. {}
  960. };
  961. static const struct hda_verb stac9205_core_init[] = {
  962. /* set master volume and direct control */
  963. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  964. /* enable analog pc beep path */
  965. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  966. {}
  967. };
  968. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  969. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  970. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  971. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  972. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  973. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  974. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  975. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  976. static const struct snd_kcontrol_new stac9205_loopback =
  977. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  978. static const struct snd_kcontrol_new stac927x_loopback =
  979. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  980. static const struct hda_pintbl ref9200_pin_configs[] = {
  981. { 0x08, 0x01c47010 },
  982. { 0x09, 0x01447010 },
  983. { 0x0d, 0x0221401f },
  984. { 0x0e, 0x01114010 },
  985. { 0x0f, 0x02a19020 },
  986. { 0x10, 0x01a19021 },
  987. { 0x11, 0x90100140 },
  988. { 0x12, 0x01813122 },
  989. {}
  990. };
  991. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  992. { 0x08, 0x400000fe },
  993. { 0x09, 0x404500f4 },
  994. { 0x0d, 0x400100f0 },
  995. { 0x0e, 0x90110010 },
  996. { 0x0f, 0x400100f1 },
  997. { 0x10, 0x02a1902e },
  998. { 0x11, 0x500000f2 },
  999. { 0x12, 0x500000f3 },
  1000. {}
  1001. };
  1002. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  1003. { 0x08, 0x400000fe },
  1004. { 0x09, 0x404500f4 },
  1005. { 0x0d, 0x400100f0 },
  1006. { 0x0e, 0x90110010 },
  1007. { 0x0f, 0x400100f1 },
  1008. { 0x10, 0x02a1902e },
  1009. { 0x11, 0x500000f2 },
  1010. { 0x12, 0x500000f3 },
  1011. {}
  1012. };
  1013. /*
  1014. STAC 9200 pin configs for
  1015. 102801A8
  1016. 102801DE
  1017. 102801E8
  1018. */
  1019. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  1020. { 0x08, 0x400001f0 },
  1021. { 0x09, 0x400001f1 },
  1022. { 0x0d, 0x02214030 },
  1023. { 0x0e, 0x01014010 },
  1024. { 0x0f, 0x02a19020 },
  1025. { 0x10, 0x01a19021 },
  1026. { 0x11, 0x90100140 },
  1027. { 0x12, 0x01813122 },
  1028. {}
  1029. };
  1030. /*
  1031. STAC 9200 pin configs for
  1032. 102801C0
  1033. 102801C1
  1034. */
  1035. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1036. { 0x08, 0x400001f0 },
  1037. { 0x09, 0x400001f1 },
  1038. { 0x0d, 0x0221401f },
  1039. { 0x0e, 0x01014010 },
  1040. { 0x0f, 0x01813020 },
  1041. { 0x10, 0x02a19021 },
  1042. { 0x11, 0x90100140 },
  1043. { 0x12, 0x400001f2 },
  1044. {}
  1045. };
  1046. /*
  1047. STAC 9200 pin configs for
  1048. 102801C4 (Dell Dimension E310)
  1049. 102801C5
  1050. 102801C7
  1051. 102801D9
  1052. 102801DA
  1053. 102801E3
  1054. */
  1055. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1056. { 0x08, 0x400001f0 },
  1057. { 0x09, 0x400001f1 },
  1058. { 0x0d, 0x0221401f },
  1059. { 0x0e, 0x01014010 },
  1060. { 0x0f, 0x01813020 },
  1061. { 0x10, 0x01a19021 },
  1062. { 0x11, 0x90100140 },
  1063. { 0x12, 0x400001f2 },
  1064. {}
  1065. };
  1066. /*
  1067. STAC 9200-32 pin configs for
  1068. 102801B5 (Dell Inspiron 630m)
  1069. 102801D8 (Dell Inspiron 640m)
  1070. */
  1071. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1072. { 0x08, 0x40c003fa },
  1073. { 0x09, 0x03441340 },
  1074. { 0x0d, 0x0321121f },
  1075. { 0x0e, 0x90170310 },
  1076. { 0x0f, 0x408003fb },
  1077. { 0x10, 0x03a11020 },
  1078. { 0x11, 0x401003fc },
  1079. { 0x12, 0x403003fd },
  1080. {}
  1081. };
  1082. /*
  1083. STAC 9200-32 pin configs for
  1084. 102801C2 (Dell Latitude D620)
  1085. 102801C8
  1086. 102801CC (Dell Latitude D820)
  1087. 102801D4
  1088. 102801D6
  1089. */
  1090. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1091. { 0x08, 0x40c003fa },
  1092. { 0x09, 0x0144131f },
  1093. { 0x0d, 0x0321121f },
  1094. { 0x0e, 0x90170310 },
  1095. { 0x0f, 0x90a70321 },
  1096. { 0x10, 0x03a11020 },
  1097. { 0x11, 0x401003fb },
  1098. { 0x12, 0x40f000fc },
  1099. {}
  1100. };
  1101. /*
  1102. STAC 9200-32 pin configs for
  1103. 102801CE (Dell XPS M1710)
  1104. 102801CF (Dell Precision M90)
  1105. */
  1106. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1107. { 0x08, 0x40c003fa },
  1108. { 0x09, 0x01441340 },
  1109. { 0x0d, 0x0421421f },
  1110. { 0x0e, 0x90170310 },
  1111. { 0x0f, 0x408003fb },
  1112. { 0x10, 0x04a1102e },
  1113. { 0x11, 0x90170311 },
  1114. { 0x12, 0x403003fc },
  1115. {}
  1116. };
  1117. /*
  1118. STAC 9200-32 pin configs for
  1119. 102801C9
  1120. 102801CA
  1121. 102801CB (Dell Latitude 120L)
  1122. 102801D3
  1123. */
  1124. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1125. { 0x08, 0x40c003fa },
  1126. { 0x09, 0x404003fb },
  1127. { 0x0d, 0x0321121f },
  1128. { 0x0e, 0x90170310 },
  1129. { 0x0f, 0x408003fc },
  1130. { 0x10, 0x03a11020 },
  1131. { 0x11, 0x401003fd },
  1132. { 0x12, 0x403003fe },
  1133. {}
  1134. };
  1135. /*
  1136. STAC 9200-32 pin configs for
  1137. 102801BD (Dell Inspiron E1505n)
  1138. 102801EE
  1139. 102801EF
  1140. */
  1141. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1142. { 0x08, 0x40c003fa },
  1143. { 0x09, 0x01441340 },
  1144. { 0x0d, 0x0421121f },
  1145. { 0x0e, 0x90170310 },
  1146. { 0x0f, 0x408003fb },
  1147. { 0x10, 0x04a11020 },
  1148. { 0x11, 0x401003fc },
  1149. { 0x12, 0x403003fd },
  1150. {}
  1151. };
  1152. /*
  1153. STAC 9200-32 pin configs for
  1154. 102801F5 (Dell Inspiron 1501)
  1155. 102801F6
  1156. */
  1157. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1158. { 0x08, 0x40c003fa },
  1159. { 0x09, 0x404003fb },
  1160. { 0x0d, 0x0421121f },
  1161. { 0x0e, 0x90170310 },
  1162. { 0x0f, 0x408003fc },
  1163. { 0x10, 0x04a11020 },
  1164. { 0x11, 0x401003fd },
  1165. { 0x12, 0x403003fe },
  1166. {}
  1167. };
  1168. /*
  1169. STAC 9200-32
  1170. 102801CD (Dell Inspiron E1705/9400)
  1171. */
  1172. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1173. { 0x08, 0x40c003fa },
  1174. { 0x09, 0x01441340 },
  1175. { 0x0d, 0x0421121f },
  1176. { 0x0e, 0x90170310 },
  1177. { 0x0f, 0x90170310 },
  1178. { 0x10, 0x04a11020 },
  1179. { 0x11, 0x90170310 },
  1180. { 0x12, 0x40f003fc },
  1181. {}
  1182. };
  1183. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1184. { 0x08, 0x40c000f0 },
  1185. { 0x09, 0x404000f1 },
  1186. { 0x0d, 0x0221121f },
  1187. { 0x0e, 0x02211210 },
  1188. { 0x0f, 0x90170111 },
  1189. { 0x10, 0x90a70120 },
  1190. { 0x11, 0x400000f2 },
  1191. { 0x12, 0x400000f3 },
  1192. {}
  1193. };
  1194. /*
  1195. * STAC 92HD700
  1196. * 18881000 Amigaone X1000
  1197. */
  1198. static const struct hda_pintbl nemo_pin_configs[] = {
  1199. { 0x0a, 0x02214020 }, /* Front panel HP socket */
  1200. { 0x0b, 0x02a19080 }, /* Front Mic */
  1201. { 0x0c, 0x0181304e }, /* Line in */
  1202. { 0x0d, 0x01014010 }, /* Line out */
  1203. { 0x0e, 0x01a19040 }, /* Rear Mic */
  1204. { 0x0f, 0x01011012 }, /* Rear speakers */
  1205. { 0x10, 0x01016011 }, /* Center speaker */
  1206. { 0x11, 0x01012014 }, /* Side speakers (7.1) */
  1207. { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
  1208. { 0x13, 0x411111f0 }, /* Unused */
  1209. { 0x14, 0x411111f0 }, /* Unused */
  1210. { 0x21, 0x01442170 }, /* S/PDIF line out */
  1211. { 0x22, 0x411111f0 }, /* Unused */
  1212. { 0x23, 0x411111f0 }, /* Unused */
  1213. {}
  1214. };
  1215. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1216. const struct hda_fixup *fix, int action)
  1217. {
  1218. struct sigmatel_spec *spec = codec->spec;
  1219. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1220. spec->gpio_mask = spec->gpio_dir = 0x09;
  1221. spec->gpio_data = 0x00;
  1222. /* CF-74 has no headphone detection, and the driver should *NOT*
  1223. * do detection and HP/speaker toggle because the hardware does it.
  1224. */
  1225. spec->gen.suppress_auto_mute = 1;
  1226. }
  1227. }
  1228. static const struct hda_fixup stac9200_fixups[] = {
  1229. [STAC_REF] = {
  1230. .type = HDA_FIXUP_PINS,
  1231. .v.pins = ref9200_pin_configs,
  1232. },
  1233. [STAC_9200_OQO] = {
  1234. .type = HDA_FIXUP_PINS,
  1235. .v.pins = oqo9200_pin_configs,
  1236. .chained = true,
  1237. .chain_id = STAC_9200_EAPD_INIT,
  1238. },
  1239. [STAC_9200_DELL_D21] = {
  1240. .type = HDA_FIXUP_PINS,
  1241. .v.pins = dell9200_d21_pin_configs,
  1242. },
  1243. [STAC_9200_DELL_D22] = {
  1244. .type = HDA_FIXUP_PINS,
  1245. .v.pins = dell9200_d22_pin_configs,
  1246. },
  1247. [STAC_9200_DELL_D23] = {
  1248. .type = HDA_FIXUP_PINS,
  1249. .v.pins = dell9200_d23_pin_configs,
  1250. },
  1251. [STAC_9200_DELL_M21] = {
  1252. .type = HDA_FIXUP_PINS,
  1253. .v.pins = dell9200_m21_pin_configs,
  1254. },
  1255. [STAC_9200_DELL_M22] = {
  1256. .type = HDA_FIXUP_PINS,
  1257. .v.pins = dell9200_m22_pin_configs,
  1258. },
  1259. [STAC_9200_DELL_M23] = {
  1260. .type = HDA_FIXUP_PINS,
  1261. .v.pins = dell9200_m23_pin_configs,
  1262. },
  1263. [STAC_9200_DELL_M24] = {
  1264. .type = HDA_FIXUP_PINS,
  1265. .v.pins = dell9200_m24_pin_configs,
  1266. },
  1267. [STAC_9200_DELL_M25] = {
  1268. .type = HDA_FIXUP_PINS,
  1269. .v.pins = dell9200_m25_pin_configs,
  1270. },
  1271. [STAC_9200_DELL_M26] = {
  1272. .type = HDA_FIXUP_PINS,
  1273. .v.pins = dell9200_m26_pin_configs,
  1274. },
  1275. [STAC_9200_DELL_M27] = {
  1276. .type = HDA_FIXUP_PINS,
  1277. .v.pins = dell9200_m27_pin_configs,
  1278. },
  1279. [STAC_9200_M4] = {
  1280. .type = HDA_FIXUP_PINS,
  1281. .v.pins = gateway9200_m4_pin_configs,
  1282. .chained = true,
  1283. .chain_id = STAC_9200_EAPD_INIT,
  1284. },
  1285. [STAC_9200_M4_2] = {
  1286. .type = HDA_FIXUP_PINS,
  1287. .v.pins = gateway9200_m4_2_pin_configs,
  1288. .chained = true,
  1289. .chain_id = STAC_9200_EAPD_INIT,
  1290. },
  1291. [STAC_9200_PANASONIC] = {
  1292. .type = HDA_FIXUP_FUNC,
  1293. .v.func = stac9200_fixup_panasonic,
  1294. },
  1295. [STAC_9200_EAPD_INIT] = {
  1296. .type = HDA_FIXUP_VERBS,
  1297. .v.verbs = (const struct hda_verb[]) {
  1298. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1299. {}
  1300. },
  1301. },
  1302. };
  1303. static const struct hda_model_fixup stac9200_models[] = {
  1304. { .id = STAC_REF, .name = "ref" },
  1305. { .id = STAC_9200_OQO, .name = "oqo" },
  1306. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1307. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1308. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1309. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1310. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1311. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1312. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1313. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1314. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1315. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1316. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1317. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1318. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1319. {}
  1320. };
  1321. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1322. /* SigmaTel reference board */
  1323. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1324. "DFI LanParty", STAC_REF),
  1325. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1326. "DFI LanParty", STAC_REF),
  1327. /* Dell laptops have BIOS problem */
  1328. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1329. "unknown Dell", STAC_9200_DELL_D21),
  1330. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1331. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1332. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1333. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1334. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1335. "unknown Dell", STAC_9200_DELL_D22),
  1336. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1337. "unknown Dell", STAC_9200_DELL_D22),
  1338. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1339. "Dell Latitude D620", STAC_9200_DELL_M22),
  1340. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1341. "unknown Dell", STAC_9200_DELL_D23),
  1342. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1343. "unknown Dell", STAC_9200_DELL_D23),
  1344. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1345. "unknown Dell", STAC_9200_DELL_M22),
  1346. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1347. "unknown Dell", STAC_9200_DELL_M24),
  1348. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1349. "unknown Dell", STAC_9200_DELL_M24),
  1350. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1351. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1352. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1353. "Dell Latitude D820", STAC_9200_DELL_M22),
  1354. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1355. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1356. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1357. "Dell XPS M1710", STAC_9200_DELL_M23),
  1358. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1359. "Dell Precision M90", STAC_9200_DELL_M23),
  1360. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1361. "unknown Dell", STAC_9200_DELL_M22),
  1362. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1363. "unknown Dell", STAC_9200_DELL_M22),
  1364. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1365. "unknown Dell", STAC_9200_DELL_M22),
  1366. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1367. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1368. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1369. "unknown Dell", STAC_9200_DELL_D23),
  1370. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1371. "unknown Dell", STAC_9200_DELL_D23),
  1372. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1373. "unknown Dell", STAC_9200_DELL_D21),
  1374. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1375. "unknown Dell", STAC_9200_DELL_D23),
  1376. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1377. "unknown Dell", STAC_9200_DELL_D21),
  1378. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1379. "unknown Dell", STAC_9200_DELL_M25),
  1380. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1381. "unknown Dell", STAC_9200_DELL_M25),
  1382. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1383. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1384. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1385. "unknown Dell", STAC_9200_DELL_M26),
  1386. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
  1387. "Dell Latitude D430", STAC_9200_DELL_M22),
  1388. /* Panasonic */
  1389. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1390. /* Gateway machines needs EAPD to be set on resume */
  1391. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1392. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1393. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1394. /* OQO Mobile */
  1395. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1396. {} /* terminator */
  1397. };
  1398. static const struct hda_pintbl ref925x_pin_configs[] = {
  1399. { 0x07, 0x40c003f0 },
  1400. { 0x08, 0x424503f2 },
  1401. { 0x0a, 0x01813022 },
  1402. { 0x0b, 0x02a19021 },
  1403. { 0x0c, 0x90a70320 },
  1404. { 0x0d, 0x02214210 },
  1405. { 0x10, 0x01019020 },
  1406. { 0x11, 0x9033032e },
  1407. {}
  1408. };
  1409. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1410. { 0x07, 0x40c003f4 },
  1411. { 0x08, 0x424503f2 },
  1412. { 0x0a, 0x400000f3 },
  1413. { 0x0b, 0x02a19020 },
  1414. { 0x0c, 0x40a000f0 },
  1415. { 0x0d, 0x90100210 },
  1416. { 0x10, 0x400003f1 },
  1417. { 0x11, 0x9033032e },
  1418. {}
  1419. };
  1420. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1421. { 0x07, 0x40c003f4 },
  1422. { 0x08, 0x424503f2 },
  1423. { 0x0a, 0x400000f3 },
  1424. { 0x0b, 0x02a19020 },
  1425. { 0x0c, 0x40a000f0 },
  1426. { 0x0d, 0x90100210 },
  1427. { 0x10, 0x400003f1 },
  1428. { 0x11, 0x9033032e },
  1429. {}
  1430. };
  1431. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1432. { 0x07, 0x40c003f4 },
  1433. { 0x08, 0x424503f2 },
  1434. { 0x0a, 0x400000f3 },
  1435. { 0x0b, 0x02a19020 },
  1436. { 0x0c, 0x40a000f0 },
  1437. { 0x0d, 0x90100210 },
  1438. { 0x10, 0x400003f1 },
  1439. { 0x11, 0x9033032e },
  1440. {}
  1441. };
  1442. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1443. { 0x07, 0x40c003f4 },
  1444. { 0x08, 0x424503f2 },
  1445. { 0x0a, 0x400000f3 },
  1446. { 0x0b, 0x02a19020 },
  1447. { 0x0c, 0x40a000f0 },
  1448. { 0x0d, 0x90100210 },
  1449. { 0x10, 0x400003f1 },
  1450. { 0x11, 0x9033032e },
  1451. {}
  1452. };
  1453. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1454. { 0x07, 0x40c003f4 },
  1455. { 0x08, 0x424503f2 },
  1456. { 0x0a, 0x400000f3 },
  1457. { 0x0b, 0x02a19020 },
  1458. { 0x0c, 0x40a000f0 },
  1459. { 0x0d, 0x90100210 },
  1460. { 0x10, 0x400003f1 },
  1461. { 0x11, 0x503303f3 },
  1462. {}
  1463. };
  1464. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1465. { 0x07, 0x40c003f4 },
  1466. { 0x08, 0x424503f2 },
  1467. { 0x0a, 0x400000f3 },
  1468. { 0x0b, 0x02a19020 },
  1469. { 0x0c, 0x40a000f0 },
  1470. { 0x0d, 0x90100210 },
  1471. { 0x10, 0x400003f1 },
  1472. { 0x11, 0x9033032e },
  1473. {}
  1474. };
  1475. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1476. { 0x07, 0x40c003f4 },
  1477. { 0x08, 0x424503f2 },
  1478. { 0x0a, 0x400000f3 },
  1479. { 0x0b, 0x02a19020 },
  1480. { 0x0c, 0x40a000f0 },
  1481. { 0x0d, 0x90100210 },
  1482. { 0x10, 0x400003f1 },
  1483. { 0x11, 0x90330320 },
  1484. {}
  1485. };
  1486. static const struct hda_fixup stac925x_fixups[] = {
  1487. [STAC_REF] = {
  1488. .type = HDA_FIXUP_PINS,
  1489. .v.pins = ref925x_pin_configs,
  1490. },
  1491. [STAC_M1] = {
  1492. .type = HDA_FIXUP_PINS,
  1493. .v.pins = stac925xM1_pin_configs,
  1494. },
  1495. [STAC_M1_2] = {
  1496. .type = HDA_FIXUP_PINS,
  1497. .v.pins = stac925xM1_2_pin_configs,
  1498. },
  1499. [STAC_M2] = {
  1500. .type = HDA_FIXUP_PINS,
  1501. .v.pins = stac925xM2_pin_configs,
  1502. },
  1503. [STAC_M2_2] = {
  1504. .type = HDA_FIXUP_PINS,
  1505. .v.pins = stac925xM2_2_pin_configs,
  1506. },
  1507. [STAC_M3] = {
  1508. .type = HDA_FIXUP_PINS,
  1509. .v.pins = stac925xM3_pin_configs,
  1510. },
  1511. [STAC_M5] = {
  1512. .type = HDA_FIXUP_PINS,
  1513. .v.pins = stac925xM5_pin_configs,
  1514. },
  1515. [STAC_M6] = {
  1516. .type = HDA_FIXUP_PINS,
  1517. .v.pins = stac925xM6_pin_configs,
  1518. },
  1519. };
  1520. static const struct hda_model_fixup stac925x_models[] = {
  1521. { .id = STAC_REF, .name = "ref" },
  1522. { .id = STAC_M1, .name = "m1" },
  1523. { .id = STAC_M1_2, .name = "m1-2" },
  1524. { .id = STAC_M2, .name = "m2" },
  1525. { .id = STAC_M2_2, .name = "m2-2" },
  1526. { .id = STAC_M3, .name = "m3" },
  1527. { .id = STAC_M5, .name = "m5" },
  1528. { .id = STAC_M6, .name = "m6" },
  1529. {}
  1530. };
  1531. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1532. /* SigmaTel reference board */
  1533. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1534. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1535. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1536. /* Default table for unknown ID */
  1537. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1538. /* gateway machines are checked via codec ssid */
  1539. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1540. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1541. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1542. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1543. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1544. /* Not sure about the brand name for those */
  1545. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1546. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1547. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1548. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1549. {} /* terminator */
  1550. };
  1551. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1552. { 0x0a, 0x02214030 },
  1553. { 0x0b, 0x02a19040 },
  1554. { 0x0c, 0x01a19020 },
  1555. { 0x0d, 0x02214030 },
  1556. { 0x0e, 0x0181302e },
  1557. { 0x0f, 0x01014010 },
  1558. { 0x10, 0x01014020 },
  1559. { 0x11, 0x01014030 },
  1560. { 0x12, 0x02319040 },
  1561. { 0x13, 0x90a000f0 },
  1562. { 0x14, 0x90a000f0 },
  1563. { 0x22, 0x01452050 },
  1564. { 0x23, 0x01452050 },
  1565. {}
  1566. };
  1567. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1568. { 0x0a, 0x0321101f },
  1569. { 0x0b, 0x4f00000f },
  1570. { 0x0c, 0x4f0000f0 },
  1571. { 0x0d, 0x90170110 },
  1572. { 0x0e, 0x03a11020 },
  1573. { 0x0f, 0x0321101f },
  1574. { 0x10, 0x4f0000f0 },
  1575. { 0x11, 0x4f0000f0 },
  1576. { 0x12, 0x4f0000f0 },
  1577. { 0x13, 0x90a60160 },
  1578. { 0x14, 0x4f0000f0 },
  1579. { 0x22, 0x4f0000f0 },
  1580. { 0x23, 0x4f0000f0 },
  1581. {}
  1582. };
  1583. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1584. { 0x0a, 0x0321101f },
  1585. { 0x0b, 0x0321101f },
  1586. { 0x0c, 0x03a11020 },
  1587. { 0x0d, 0x03014020 },
  1588. { 0x0e, 0x90170110 },
  1589. { 0x0f, 0x4f0000f0 },
  1590. { 0x10, 0x4f0000f0 },
  1591. { 0x11, 0x4f0000f0 },
  1592. { 0x12, 0x4f0000f0 },
  1593. { 0x13, 0x90a60160 },
  1594. { 0x14, 0x4f0000f0 },
  1595. { 0x22, 0x4f0000f0 },
  1596. { 0x23, 0x904601b0 },
  1597. {}
  1598. };
  1599. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1600. { 0x0a, 0x02214230 },
  1601. { 0x0b, 0x02A19240 },
  1602. { 0x0c, 0x01013214 },
  1603. { 0x0d, 0x01014210 },
  1604. { 0x0e, 0x01A19250 },
  1605. { 0x0f, 0x01011212 },
  1606. { 0x10, 0x01016211 },
  1607. {}
  1608. };
  1609. static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
  1610. { 0x0a, 0x02214030 },
  1611. { 0x0b, 0x02A19010 },
  1612. {}
  1613. };
  1614. static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
  1615. { 0x0e, 0x400000f0 },
  1616. {}
  1617. };
  1618. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1619. const struct hda_fixup *fix, int action)
  1620. {
  1621. struct sigmatel_spec *spec = codec->spec;
  1622. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1623. return;
  1624. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1625. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1626. }
  1627. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1628. {
  1629. struct sigmatel_spec *spec = codec->spec;
  1630. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1631. spec->eapd_switch = 0;
  1632. }
  1633. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1634. const struct hda_fixup *fix, int action)
  1635. {
  1636. struct sigmatel_spec *spec = codec->spec;
  1637. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1638. return;
  1639. stac92hd73xx_fixup_dell(codec);
  1640. snd_hda_add_verbs(codec, dell_eq_core_init);
  1641. spec->volknob_init = 1;
  1642. }
  1643. /* Analog Mics */
  1644. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1645. const struct hda_fixup *fix, int action)
  1646. {
  1647. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1648. return;
  1649. stac92hd73xx_fixup_dell(codec);
  1650. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1651. }
  1652. /* Digital Mics */
  1653. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1654. const struct hda_fixup *fix, int action)
  1655. {
  1656. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1657. return;
  1658. stac92hd73xx_fixup_dell(codec);
  1659. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1660. }
  1661. /* Both */
  1662. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1663. const struct hda_fixup *fix, int action)
  1664. {
  1665. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1666. return;
  1667. stac92hd73xx_fixup_dell(codec);
  1668. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1669. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1670. }
  1671. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1672. const struct hda_fixup *fix, int action)
  1673. {
  1674. struct sigmatel_spec *spec = codec->spec;
  1675. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1676. return;
  1677. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1678. spec->eapd_switch = 0;
  1679. }
  1680. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1681. const struct hda_fixup *fix, int action)
  1682. {
  1683. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1684. codec->no_jack_detect = 1;
  1685. }
  1686. static void stac92hd73xx_disable_automute(struct hda_codec *codec,
  1687. const struct hda_fixup *fix, int action)
  1688. {
  1689. struct sigmatel_spec *spec = codec->spec;
  1690. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1691. return;
  1692. spec->gen.suppress_auto_mute = 1;
  1693. }
  1694. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1695. [STAC_92HD73XX_REF] = {
  1696. .type = HDA_FIXUP_FUNC,
  1697. .v.func = stac92hd73xx_fixup_ref,
  1698. },
  1699. [STAC_DELL_M6_AMIC] = {
  1700. .type = HDA_FIXUP_FUNC,
  1701. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1702. },
  1703. [STAC_DELL_M6_DMIC] = {
  1704. .type = HDA_FIXUP_FUNC,
  1705. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1706. },
  1707. [STAC_DELL_M6_BOTH] = {
  1708. .type = HDA_FIXUP_FUNC,
  1709. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1710. },
  1711. [STAC_DELL_EQ] = {
  1712. .type = HDA_FIXUP_FUNC,
  1713. .v.func = stac92hd73xx_fixup_dell_eq,
  1714. },
  1715. [STAC_ALIENWARE_M17X] = {
  1716. .type = HDA_FIXUP_FUNC,
  1717. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1718. },
  1719. [STAC_ELO_VUPOINT_15MX] = {
  1720. .type = HDA_FIXUP_FUNC,
  1721. .v.func = stac92hd73xx_disable_automute,
  1722. },
  1723. [STAC_92HD73XX_INTEL] = {
  1724. .type = HDA_FIXUP_PINS,
  1725. .v.pins = intel_dg45id_pin_configs,
  1726. },
  1727. [STAC_92HD73XX_NO_JD] = {
  1728. .type = HDA_FIXUP_FUNC,
  1729. .v.func = stac92hd73xx_fixup_no_jd,
  1730. },
  1731. [STAC_92HD89XX_HP_FRONT_JACK] = {
  1732. .type = HDA_FIXUP_PINS,
  1733. .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
  1734. },
  1735. [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
  1736. .type = HDA_FIXUP_PINS,
  1737. .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
  1738. },
  1739. [STAC_92HD73XX_ASUS_MOBO] = {
  1740. .type = HDA_FIXUP_PINS,
  1741. .v.pins = (const struct hda_pintbl[]) {
  1742. /* enable 5.1 and SPDIF out */
  1743. { 0x0c, 0x01014411 },
  1744. { 0x0d, 0x01014410 },
  1745. { 0x0e, 0x01014412 },
  1746. { 0x22, 0x014b1180 },
  1747. { }
  1748. }
  1749. },
  1750. };
  1751. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1752. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1753. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1754. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1755. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1756. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1757. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1758. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1759. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1760. { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
  1761. { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
  1762. {}
  1763. };
  1764. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1765. /* SigmaTel reference board */
  1766. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1767. "DFI LanParty", STAC_92HD73XX_REF),
  1768. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1769. "DFI LanParty", STAC_92HD73XX_REF),
  1770. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1771. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1772. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1773. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1774. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1775. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1776. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1777. "unknown Dell", STAC_DELL_M6_DMIC),
  1778. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1779. "unknown Dell", STAC_DELL_M6_BOTH),
  1780. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1781. "unknown Dell", STAC_DELL_M6_BOTH),
  1782. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1783. "unknown Dell", STAC_DELL_M6_AMIC),
  1784. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1785. "unknown Dell", STAC_DELL_M6_AMIC),
  1786. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1787. "unknown Dell", STAC_DELL_M6_DMIC),
  1788. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1789. "unknown Dell", STAC_DELL_M6_DMIC),
  1790. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1791. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1792. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1793. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1794. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1795. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1796. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1797. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1798. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1799. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1800. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1801. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1802. /* codec SSID matching */
  1803. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1804. "Alienware M17x", STAC_ALIENWARE_M17X),
  1805. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1806. "Alienware M17x", STAC_ALIENWARE_M17X),
  1807. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1808. "Alienware M17x R3", STAC_DELL_EQ),
  1809. SND_PCI_QUIRK(0x1059, 0x1011,
  1810. "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
  1811. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
  1812. "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
  1813. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
  1814. "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
  1815. SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
  1816. STAC_92HD73XX_ASUS_MOBO),
  1817. {} /* terminator */
  1818. };
  1819. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1820. { 0x0a, 0x02214030 },
  1821. { 0x0b, 0x02211010 },
  1822. { 0x0c, 0x02a19020 },
  1823. { 0x0d, 0x02170130 },
  1824. { 0x0e, 0x01014050 },
  1825. { 0x0f, 0x01819040 },
  1826. { 0x10, 0x01014020 },
  1827. { 0x11, 0x90a3014e },
  1828. { 0x1f, 0x01451160 },
  1829. { 0x20, 0x98560170 },
  1830. {}
  1831. };
  1832. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1833. { 0x0a, 0x0221403f },
  1834. { 0x0b, 0x0221101f },
  1835. { 0x0c, 0x02a19020 },
  1836. { 0x0d, 0x90170110 },
  1837. { 0x0e, 0x40f000f0 },
  1838. { 0x0f, 0x40f000f0 },
  1839. { 0x10, 0x40f000f0 },
  1840. { 0x11, 0x90a60160 },
  1841. { 0x1f, 0x40f000f0 },
  1842. { 0x20, 0x40f000f0 },
  1843. {}
  1844. };
  1845. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1846. { 0x0a, 0x02a11020 },
  1847. { 0x0b, 0x0221101f },
  1848. { 0x0c, 0x400000f0 },
  1849. { 0x0d, 0x90170110 },
  1850. { 0x0e, 0x400000f1 },
  1851. { 0x0f, 0x400000f2 },
  1852. { 0x10, 0x400000f3 },
  1853. { 0x11, 0x90a60160 },
  1854. { 0x1f, 0x400000f4 },
  1855. { 0x20, 0x400000f5 },
  1856. {}
  1857. };
  1858. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1859. { 0x0a, 0x03a12050 },
  1860. { 0x0b, 0x0321201f },
  1861. { 0x0c, 0x40f000f0 },
  1862. { 0x0d, 0x90170110 },
  1863. { 0x0e, 0x40f000f0 },
  1864. { 0x0f, 0x40f000f0 },
  1865. { 0x10, 0x90170110 },
  1866. { 0x11, 0xd5a30140 },
  1867. { 0x1f, 0x40f000f0 },
  1868. { 0x20, 0x40f000f0 },
  1869. {}
  1870. };
  1871. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1872. { 0x0a, 0x01813050 },
  1873. { 0x0b, 0x0421201f },
  1874. { 0x0c, 0x04a1205e },
  1875. { 0x0d, 0x96130310 },
  1876. { 0x0e, 0x96130310 },
  1877. { 0x0f, 0x0101401f },
  1878. { 0x10, 0x1111611f },
  1879. { 0x11, 0xd5a30130 },
  1880. {}
  1881. };
  1882. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1883. { 0x0a, 0x40f000f0 },
  1884. { 0x0b, 0x0221101f },
  1885. { 0x0c, 0x02a11020 },
  1886. { 0x0d, 0x92170110 },
  1887. { 0x0e, 0x40f000f0 },
  1888. { 0x0f, 0x92170110 },
  1889. { 0x10, 0x40f000f0 },
  1890. { 0x11, 0xd5a30130 },
  1891. { 0x1f, 0x40f000f0 },
  1892. { 0x20, 0x40f000f0 },
  1893. {}
  1894. };
  1895. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1896. const struct hda_fixup *fix, int action)
  1897. {
  1898. struct sigmatel_spec *spec = codec->spec;
  1899. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1900. return;
  1901. if (hp_bnb2011_with_dock(codec)) {
  1902. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1903. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1904. }
  1905. if (find_mute_led_cfg(codec, spec->default_polarity))
  1906. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  1907. spec->gpio_led,
  1908. spec->gpio_led_polarity);
  1909. /* allow auto-switching of dock line-in */
  1910. spec->gen.line_in_auto_switch = true;
  1911. }
  1912. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1913. const struct hda_fixup *fix, int action)
  1914. {
  1915. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1916. return;
  1917. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1918. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1919. }
  1920. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1921. const struct hda_fixup *fix, int action)
  1922. {
  1923. struct sigmatel_spec *spec = codec->spec;
  1924. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1925. spec->default_polarity = 0;
  1926. }
  1927. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1928. const struct hda_fixup *fix, int action)
  1929. {
  1930. struct sigmatel_spec *spec = codec->spec;
  1931. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1932. spec->default_polarity = 1;
  1933. }
  1934. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1935. const struct hda_fixup *fix, int action)
  1936. {
  1937. struct sigmatel_spec *spec = codec->spec;
  1938. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1939. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1940. #ifdef CONFIG_PM
  1941. /* resetting controller clears GPIO, so we need to keep on */
  1942. codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
  1943. #endif
  1944. }
  1945. }
  1946. static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
  1947. const struct hda_fixup *fix, int action)
  1948. {
  1949. struct sigmatel_spec *spec = codec->spec;
  1950. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1951. spec->gpio_led = 0x10; /* GPIO4 */
  1952. spec->default_polarity = 0;
  1953. }
  1954. }
  1955. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1956. const struct hda_fixup *fix, int action)
  1957. {
  1958. struct sigmatel_spec *spec = codec->spec;
  1959. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1960. spec->headset_jack = 1;
  1961. }
  1962. static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
  1963. const struct hda_fixup *fix,
  1964. int action)
  1965. {
  1966. struct sigmatel_spec *spec = codec->spec;
  1967. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1968. return;
  1969. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
  1970. spec->gpio_data = 0x10;
  1971. spec->eapd_switch = 0;
  1972. }
  1973. static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
  1974. const struct hda_fixup *fix,
  1975. int action)
  1976. {
  1977. struct sigmatel_spec *spec = codec->spec;
  1978. static hda_nid_t preferred_pairs[] = {
  1979. 0xd, 0x13,
  1980. 0
  1981. };
  1982. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1983. return;
  1984. spec->gen.preferred_dacs = preferred_pairs;
  1985. }
  1986. static const struct hda_verb hp_bnb13_eq_verbs[] = {
  1987. /* 44.1KHz base */
  1988. { 0x22, 0x7A6, 0x3E },
  1989. { 0x22, 0x7A7, 0x68 },
  1990. { 0x22, 0x7A8, 0x17 },
  1991. { 0x22, 0x7A9, 0x3E },
  1992. { 0x22, 0x7AA, 0x68 },
  1993. { 0x22, 0x7AB, 0x17 },
  1994. { 0x22, 0x7AC, 0x00 },
  1995. { 0x22, 0x7AD, 0x80 },
  1996. { 0x22, 0x7A6, 0x83 },
  1997. { 0x22, 0x7A7, 0x2F },
  1998. { 0x22, 0x7A8, 0xD1 },
  1999. { 0x22, 0x7A9, 0x83 },
  2000. { 0x22, 0x7AA, 0x2F },
  2001. { 0x22, 0x7AB, 0xD1 },
  2002. { 0x22, 0x7AC, 0x01 },
  2003. { 0x22, 0x7AD, 0x80 },
  2004. { 0x22, 0x7A6, 0x3E },
  2005. { 0x22, 0x7A7, 0x68 },
  2006. { 0x22, 0x7A8, 0x17 },
  2007. { 0x22, 0x7A9, 0x3E },
  2008. { 0x22, 0x7AA, 0x68 },
  2009. { 0x22, 0x7AB, 0x17 },
  2010. { 0x22, 0x7AC, 0x02 },
  2011. { 0x22, 0x7AD, 0x80 },
  2012. { 0x22, 0x7A6, 0x7C },
  2013. { 0x22, 0x7A7, 0xC6 },
  2014. { 0x22, 0x7A8, 0x0C },
  2015. { 0x22, 0x7A9, 0x7C },
  2016. { 0x22, 0x7AA, 0xC6 },
  2017. { 0x22, 0x7AB, 0x0C },
  2018. { 0x22, 0x7AC, 0x03 },
  2019. { 0x22, 0x7AD, 0x80 },
  2020. { 0x22, 0x7A6, 0xC3 },
  2021. { 0x22, 0x7A7, 0x25 },
  2022. { 0x22, 0x7A8, 0xAF },
  2023. { 0x22, 0x7A9, 0xC3 },
  2024. { 0x22, 0x7AA, 0x25 },
  2025. { 0x22, 0x7AB, 0xAF },
  2026. { 0x22, 0x7AC, 0x04 },
  2027. { 0x22, 0x7AD, 0x80 },
  2028. { 0x22, 0x7A6, 0x3E },
  2029. { 0x22, 0x7A7, 0x85 },
  2030. { 0x22, 0x7A8, 0x73 },
  2031. { 0x22, 0x7A9, 0x3E },
  2032. { 0x22, 0x7AA, 0x85 },
  2033. { 0x22, 0x7AB, 0x73 },
  2034. { 0x22, 0x7AC, 0x05 },
  2035. { 0x22, 0x7AD, 0x80 },
  2036. { 0x22, 0x7A6, 0x85 },
  2037. { 0x22, 0x7A7, 0x39 },
  2038. { 0x22, 0x7A8, 0xC7 },
  2039. { 0x22, 0x7A9, 0x85 },
  2040. { 0x22, 0x7AA, 0x39 },
  2041. { 0x22, 0x7AB, 0xC7 },
  2042. { 0x22, 0x7AC, 0x06 },
  2043. { 0x22, 0x7AD, 0x80 },
  2044. { 0x22, 0x7A6, 0x3C },
  2045. { 0x22, 0x7A7, 0x90 },
  2046. { 0x22, 0x7A8, 0xB0 },
  2047. { 0x22, 0x7A9, 0x3C },
  2048. { 0x22, 0x7AA, 0x90 },
  2049. { 0x22, 0x7AB, 0xB0 },
  2050. { 0x22, 0x7AC, 0x07 },
  2051. { 0x22, 0x7AD, 0x80 },
  2052. { 0x22, 0x7A6, 0x7A },
  2053. { 0x22, 0x7A7, 0xC6 },
  2054. { 0x22, 0x7A8, 0x39 },
  2055. { 0x22, 0x7A9, 0x7A },
  2056. { 0x22, 0x7AA, 0xC6 },
  2057. { 0x22, 0x7AB, 0x39 },
  2058. { 0x22, 0x7AC, 0x08 },
  2059. { 0x22, 0x7AD, 0x80 },
  2060. { 0x22, 0x7A6, 0xC4 },
  2061. { 0x22, 0x7A7, 0xE9 },
  2062. { 0x22, 0x7A8, 0xDC },
  2063. { 0x22, 0x7A9, 0xC4 },
  2064. { 0x22, 0x7AA, 0xE9 },
  2065. { 0x22, 0x7AB, 0xDC },
  2066. { 0x22, 0x7AC, 0x09 },
  2067. { 0x22, 0x7AD, 0x80 },
  2068. { 0x22, 0x7A6, 0x3D },
  2069. { 0x22, 0x7A7, 0xE1 },
  2070. { 0x22, 0x7A8, 0x0D },
  2071. { 0x22, 0x7A9, 0x3D },
  2072. { 0x22, 0x7AA, 0xE1 },
  2073. { 0x22, 0x7AB, 0x0D },
  2074. { 0x22, 0x7AC, 0x0A },
  2075. { 0x22, 0x7AD, 0x80 },
  2076. { 0x22, 0x7A6, 0x89 },
  2077. { 0x22, 0x7A7, 0xB6 },
  2078. { 0x22, 0x7A8, 0xEB },
  2079. { 0x22, 0x7A9, 0x89 },
  2080. { 0x22, 0x7AA, 0xB6 },
  2081. { 0x22, 0x7AB, 0xEB },
  2082. { 0x22, 0x7AC, 0x0B },
  2083. { 0x22, 0x7AD, 0x80 },
  2084. { 0x22, 0x7A6, 0x39 },
  2085. { 0x22, 0x7A7, 0x9D },
  2086. { 0x22, 0x7A8, 0xFE },
  2087. { 0x22, 0x7A9, 0x39 },
  2088. { 0x22, 0x7AA, 0x9D },
  2089. { 0x22, 0x7AB, 0xFE },
  2090. { 0x22, 0x7AC, 0x0C },
  2091. { 0x22, 0x7AD, 0x80 },
  2092. { 0x22, 0x7A6, 0x76 },
  2093. { 0x22, 0x7A7, 0x49 },
  2094. { 0x22, 0x7A8, 0x15 },
  2095. { 0x22, 0x7A9, 0x76 },
  2096. { 0x22, 0x7AA, 0x49 },
  2097. { 0x22, 0x7AB, 0x15 },
  2098. { 0x22, 0x7AC, 0x0D },
  2099. { 0x22, 0x7AD, 0x80 },
  2100. { 0x22, 0x7A6, 0xC8 },
  2101. { 0x22, 0x7A7, 0x80 },
  2102. { 0x22, 0x7A8, 0xF5 },
  2103. { 0x22, 0x7A9, 0xC8 },
  2104. { 0x22, 0x7AA, 0x80 },
  2105. { 0x22, 0x7AB, 0xF5 },
  2106. { 0x22, 0x7AC, 0x0E },
  2107. { 0x22, 0x7AD, 0x80 },
  2108. { 0x22, 0x7A6, 0x40 },
  2109. { 0x22, 0x7A7, 0x00 },
  2110. { 0x22, 0x7A8, 0x00 },
  2111. { 0x22, 0x7A9, 0x40 },
  2112. { 0x22, 0x7AA, 0x00 },
  2113. { 0x22, 0x7AB, 0x00 },
  2114. { 0x22, 0x7AC, 0x0F },
  2115. { 0x22, 0x7AD, 0x80 },
  2116. { 0x22, 0x7A6, 0x90 },
  2117. { 0x22, 0x7A7, 0x68 },
  2118. { 0x22, 0x7A8, 0xF1 },
  2119. { 0x22, 0x7A9, 0x90 },
  2120. { 0x22, 0x7AA, 0x68 },
  2121. { 0x22, 0x7AB, 0xF1 },
  2122. { 0x22, 0x7AC, 0x10 },
  2123. { 0x22, 0x7AD, 0x80 },
  2124. { 0x22, 0x7A6, 0x34 },
  2125. { 0x22, 0x7A7, 0x47 },
  2126. { 0x22, 0x7A8, 0x6C },
  2127. { 0x22, 0x7A9, 0x34 },
  2128. { 0x22, 0x7AA, 0x47 },
  2129. { 0x22, 0x7AB, 0x6C },
  2130. { 0x22, 0x7AC, 0x11 },
  2131. { 0x22, 0x7AD, 0x80 },
  2132. { 0x22, 0x7A6, 0x6F },
  2133. { 0x22, 0x7A7, 0x97 },
  2134. { 0x22, 0x7A8, 0x0F },
  2135. { 0x22, 0x7A9, 0x6F },
  2136. { 0x22, 0x7AA, 0x97 },
  2137. { 0x22, 0x7AB, 0x0F },
  2138. { 0x22, 0x7AC, 0x12 },
  2139. { 0x22, 0x7AD, 0x80 },
  2140. { 0x22, 0x7A6, 0xCB },
  2141. { 0x22, 0x7A7, 0xB8 },
  2142. { 0x22, 0x7A8, 0x94 },
  2143. { 0x22, 0x7A9, 0xCB },
  2144. { 0x22, 0x7AA, 0xB8 },
  2145. { 0x22, 0x7AB, 0x94 },
  2146. { 0x22, 0x7AC, 0x13 },
  2147. { 0x22, 0x7AD, 0x80 },
  2148. { 0x22, 0x7A6, 0x40 },
  2149. { 0x22, 0x7A7, 0x00 },
  2150. { 0x22, 0x7A8, 0x00 },
  2151. { 0x22, 0x7A9, 0x40 },
  2152. { 0x22, 0x7AA, 0x00 },
  2153. { 0x22, 0x7AB, 0x00 },
  2154. { 0x22, 0x7AC, 0x14 },
  2155. { 0x22, 0x7AD, 0x80 },
  2156. { 0x22, 0x7A6, 0x95 },
  2157. { 0x22, 0x7A7, 0x76 },
  2158. { 0x22, 0x7A8, 0x5B },
  2159. { 0x22, 0x7A9, 0x95 },
  2160. { 0x22, 0x7AA, 0x76 },
  2161. { 0x22, 0x7AB, 0x5B },
  2162. { 0x22, 0x7AC, 0x15 },
  2163. { 0x22, 0x7AD, 0x80 },
  2164. { 0x22, 0x7A6, 0x31 },
  2165. { 0x22, 0x7A7, 0xAC },
  2166. { 0x22, 0x7A8, 0x31 },
  2167. { 0x22, 0x7A9, 0x31 },
  2168. { 0x22, 0x7AA, 0xAC },
  2169. { 0x22, 0x7AB, 0x31 },
  2170. { 0x22, 0x7AC, 0x16 },
  2171. { 0x22, 0x7AD, 0x80 },
  2172. { 0x22, 0x7A6, 0x6A },
  2173. { 0x22, 0x7A7, 0x89 },
  2174. { 0x22, 0x7A8, 0xA5 },
  2175. { 0x22, 0x7A9, 0x6A },
  2176. { 0x22, 0x7AA, 0x89 },
  2177. { 0x22, 0x7AB, 0xA5 },
  2178. { 0x22, 0x7AC, 0x17 },
  2179. { 0x22, 0x7AD, 0x80 },
  2180. { 0x22, 0x7A6, 0xCE },
  2181. { 0x22, 0x7A7, 0x53 },
  2182. { 0x22, 0x7A8, 0xCF },
  2183. { 0x22, 0x7A9, 0xCE },
  2184. { 0x22, 0x7AA, 0x53 },
  2185. { 0x22, 0x7AB, 0xCF },
  2186. { 0x22, 0x7AC, 0x18 },
  2187. { 0x22, 0x7AD, 0x80 },
  2188. { 0x22, 0x7A6, 0x40 },
  2189. { 0x22, 0x7A7, 0x00 },
  2190. { 0x22, 0x7A8, 0x00 },
  2191. { 0x22, 0x7A9, 0x40 },
  2192. { 0x22, 0x7AA, 0x00 },
  2193. { 0x22, 0x7AB, 0x00 },
  2194. { 0x22, 0x7AC, 0x19 },
  2195. { 0x22, 0x7AD, 0x80 },
  2196. /* 48KHz base */
  2197. { 0x22, 0x7A6, 0x3E },
  2198. { 0x22, 0x7A7, 0x88 },
  2199. { 0x22, 0x7A8, 0xDC },
  2200. { 0x22, 0x7A9, 0x3E },
  2201. { 0x22, 0x7AA, 0x88 },
  2202. { 0x22, 0x7AB, 0xDC },
  2203. { 0x22, 0x7AC, 0x1A },
  2204. { 0x22, 0x7AD, 0x80 },
  2205. { 0x22, 0x7A6, 0x82 },
  2206. { 0x22, 0x7A7, 0xEE },
  2207. { 0x22, 0x7A8, 0x46 },
  2208. { 0x22, 0x7A9, 0x82 },
  2209. { 0x22, 0x7AA, 0xEE },
  2210. { 0x22, 0x7AB, 0x46 },
  2211. { 0x22, 0x7AC, 0x1B },
  2212. { 0x22, 0x7AD, 0x80 },
  2213. { 0x22, 0x7A6, 0x3E },
  2214. { 0x22, 0x7A7, 0x88 },
  2215. { 0x22, 0x7A8, 0xDC },
  2216. { 0x22, 0x7A9, 0x3E },
  2217. { 0x22, 0x7AA, 0x88 },
  2218. { 0x22, 0x7AB, 0xDC },
  2219. { 0x22, 0x7AC, 0x1C },
  2220. { 0x22, 0x7AD, 0x80 },
  2221. { 0x22, 0x7A6, 0x7D },
  2222. { 0x22, 0x7A7, 0x09 },
  2223. { 0x22, 0x7A8, 0x28 },
  2224. { 0x22, 0x7A9, 0x7D },
  2225. { 0x22, 0x7AA, 0x09 },
  2226. { 0x22, 0x7AB, 0x28 },
  2227. { 0x22, 0x7AC, 0x1D },
  2228. { 0x22, 0x7AD, 0x80 },
  2229. { 0x22, 0x7A6, 0xC2 },
  2230. { 0x22, 0x7A7, 0xE5 },
  2231. { 0x22, 0x7A8, 0xB4 },
  2232. { 0x22, 0x7A9, 0xC2 },
  2233. { 0x22, 0x7AA, 0xE5 },
  2234. { 0x22, 0x7AB, 0xB4 },
  2235. { 0x22, 0x7AC, 0x1E },
  2236. { 0x22, 0x7AD, 0x80 },
  2237. { 0x22, 0x7A6, 0x3E },
  2238. { 0x22, 0x7A7, 0xA3 },
  2239. { 0x22, 0x7A8, 0x1F },
  2240. { 0x22, 0x7A9, 0x3E },
  2241. { 0x22, 0x7AA, 0xA3 },
  2242. { 0x22, 0x7AB, 0x1F },
  2243. { 0x22, 0x7AC, 0x1F },
  2244. { 0x22, 0x7AD, 0x80 },
  2245. { 0x22, 0x7A6, 0x84 },
  2246. { 0x22, 0x7A7, 0xCA },
  2247. { 0x22, 0x7A8, 0xF1 },
  2248. { 0x22, 0x7A9, 0x84 },
  2249. { 0x22, 0x7AA, 0xCA },
  2250. { 0x22, 0x7AB, 0xF1 },
  2251. { 0x22, 0x7AC, 0x20 },
  2252. { 0x22, 0x7AD, 0x80 },
  2253. { 0x22, 0x7A6, 0x3C },
  2254. { 0x22, 0x7A7, 0xD5 },
  2255. { 0x22, 0x7A8, 0x9C },
  2256. { 0x22, 0x7A9, 0x3C },
  2257. { 0x22, 0x7AA, 0xD5 },
  2258. { 0x22, 0x7AB, 0x9C },
  2259. { 0x22, 0x7AC, 0x21 },
  2260. { 0x22, 0x7AD, 0x80 },
  2261. { 0x22, 0x7A6, 0x7B },
  2262. { 0x22, 0x7A7, 0x35 },
  2263. { 0x22, 0x7A8, 0x0F },
  2264. { 0x22, 0x7A9, 0x7B },
  2265. { 0x22, 0x7AA, 0x35 },
  2266. { 0x22, 0x7AB, 0x0F },
  2267. { 0x22, 0x7AC, 0x22 },
  2268. { 0x22, 0x7AD, 0x80 },
  2269. { 0x22, 0x7A6, 0xC4 },
  2270. { 0x22, 0x7A7, 0x87 },
  2271. { 0x22, 0x7A8, 0x45 },
  2272. { 0x22, 0x7A9, 0xC4 },
  2273. { 0x22, 0x7AA, 0x87 },
  2274. { 0x22, 0x7AB, 0x45 },
  2275. { 0x22, 0x7AC, 0x23 },
  2276. { 0x22, 0x7AD, 0x80 },
  2277. { 0x22, 0x7A6, 0x3E },
  2278. { 0x22, 0x7A7, 0x0A },
  2279. { 0x22, 0x7A8, 0x78 },
  2280. { 0x22, 0x7A9, 0x3E },
  2281. { 0x22, 0x7AA, 0x0A },
  2282. { 0x22, 0x7AB, 0x78 },
  2283. { 0x22, 0x7AC, 0x24 },
  2284. { 0x22, 0x7AD, 0x80 },
  2285. { 0x22, 0x7A6, 0x88 },
  2286. { 0x22, 0x7A7, 0xE2 },
  2287. { 0x22, 0x7A8, 0x05 },
  2288. { 0x22, 0x7A9, 0x88 },
  2289. { 0x22, 0x7AA, 0xE2 },
  2290. { 0x22, 0x7AB, 0x05 },
  2291. { 0x22, 0x7AC, 0x25 },
  2292. { 0x22, 0x7AD, 0x80 },
  2293. { 0x22, 0x7A6, 0x3A },
  2294. { 0x22, 0x7A7, 0x1A },
  2295. { 0x22, 0x7A8, 0xA3 },
  2296. { 0x22, 0x7A9, 0x3A },
  2297. { 0x22, 0x7AA, 0x1A },
  2298. { 0x22, 0x7AB, 0xA3 },
  2299. { 0x22, 0x7AC, 0x26 },
  2300. { 0x22, 0x7AD, 0x80 },
  2301. { 0x22, 0x7A6, 0x77 },
  2302. { 0x22, 0x7A7, 0x1D },
  2303. { 0x22, 0x7A8, 0xFB },
  2304. { 0x22, 0x7A9, 0x77 },
  2305. { 0x22, 0x7AA, 0x1D },
  2306. { 0x22, 0x7AB, 0xFB },
  2307. { 0x22, 0x7AC, 0x27 },
  2308. { 0x22, 0x7AD, 0x80 },
  2309. { 0x22, 0x7A6, 0xC7 },
  2310. { 0x22, 0x7A7, 0xDA },
  2311. { 0x22, 0x7A8, 0xE5 },
  2312. { 0x22, 0x7A9, 0xC7 },
  2313. { 0x22, 0x7AA, 0xDA },
  2314. { 0x22, 0x7AB, 0xE5 },
  2315. { 0x22, 0x7AC, 0x28 },
  2316. { 0x22, 0x7AD, 0x80 },
  2317. { 0x22, 0x7A6, 0x40 },
  2318. { 0x22, 0x7A7, 0x00 },
  2319. { 0x22, 0x7A8, 0x00 },
  2320. { 0x22, 0x7A9, 0x40 },
  2321. { 0x22, 0x7AA, 0x00 },
  2322. { 0x22, 0x7AB, 0x00 },
  2323. { 0x22, 0x7AC, 0x29 },
  2324. { 0x22, 0x7AD, 0x80 },
  2325. { 0x22, 0x7A6, 0x8E },
  2326. { 0x22, 0x7A7, 0xD7 },
  2327. { 0x22, 0x7A8, 0x22 },
  2328. { 0x22, 0x7A9, 0x8E },
  2329. { 0x22, 0x7AA, 0xD7 },
  2330. { 0x22, 0x7AB, 0x22 },
  2331. { 0x22, 0x7AC, 0x2A },
  2332. { 0x22, 0x7AD, 0x80 },
  2333. { 0x22, 0x7A6, 0x35 },
  2334. { 0x22, 0x7A7, 0x26 },
  2335. { 0x22, 0x7A8, 0xC6 },
  2336. { 0x22, 0x7A9, 0x35 },
  2337. { 0x22, 0x7AA, 0x26 },
  2338. { 0x22, 0x7AB, 0xC6 },
  2339. { 0x22, 0x7AC, 0x2B },
  2340. { 0x22, 0x7AD, 0x80 },
  2341. { 0x22, 0x7A6, 0x71 },
  2342. { 0x22, 0x7A7, 0x28 },
  2343. { 0x22, 0x7A8, 0xDE },
  2344. { 0x22, 0x7A9, 0x71 },
  2345. { 0x22, 0x7AA, 0x28 },
  2346. { 0x22, 0x7AB, 0xDE },
  2347. { 0x22, 0x7AC, 0x2C },
  2348. { 0x22, 0x7AD, 0x80 },
  2349. { 0x22, 0x7A6, 0xCA },
  2350. { 0x22, 0x7A7, 0xD9 },
  2351. { 0x22, 0x7A8, 0x3A },
  2352. { 0x22, 0x7A9, 0xCA },
  2353. { 0x22, 0x7AA, 0xD9 },
  2354. { 0x22, 0x7AB, 0x3A },
  2355. { 0x22, 0x7AC, 0x2D },
  2356. { 0x22, 0x7AD, 0x80 },
  2357. { 0x22, 0x7A6, 0x40 },
  2358. { 0x22, 0x7A7, 0x00 },
  2359. { 0x22, 0x7A8, 0x00 },
  2360. { 0x22, 0x7A9, 0x40 },
  2361. { 0x22, 0x7AA, 0x00 },
  2362. { 0x22, 0x7AB, 0x00 },
  2363. { 0x22, 0x7AC, 0x2E },
  2364. { 0x22, 0x7AD, 0x80 },
  2365. { 0x22, 0x7A6, 0x93 },
  2366. { 0x22, 0x7A7, 0x5E },
  2367. { 0x22, 0x7A8, 0xD8 },
  2368. { 0x22, 0x7A9, 0x93 },
  2369. { 0x22, 0x7AA, 0x5E },
  2370. { 0x22, 0x7AB, 0xD8 },
  2371. { 0x22, 0x7AC, 0x2F },
  2372. { 0x22, 0x7AD, 0x80 },
  2373. { 0x22, 0x7A6, 0x32 },
  2374. { 0x22, 0x7A7, 0xB7 },
  2375. { 0x22, 0x7A8, 0xB1 },
  2376. { 0x22, 0x7A9, 0x32 },
  2377. { 0x22, 0x7AA, 0xB7 },
  2378. { 0x22, 0x7AB, 0xB1 },
  2379. { 0x22, 0x7AC, 0x30 },
  2380. { 0x22, 0x7AD, 0x80 },
  2381. { 0x22, 0x7A6, 0x6C },
  2382. { 0x22, 0x7A7, 0xA1 },
  2383. { 0x22, 0x7A8, 0x28 },
  2384. { 0x22, 0x7A9, 0x6C },
  2385. { 0x22, 0x7AA, 0xA1 },
  2386. { 0x22, 0x7AB, 0x28 },
  2387. { 0x22, 0x7AC, 0x31 },
  2388. { 0x22, 0x7AD, 0x80 },
  2389. { 0x22, 0x7A6, 0xCD },
  2390. { 0x22, 0x7A7, 0x48 },
  2391. { 0x22, 0x7A8, 0x4F },
  2392. { 0x22, 0x7A9, 0xCD },
  2393. { 0x22, 0x7AA, 0x48 },
  2394. { 0x22, 0x7AB, 0x4F },
  2395. { 0x22, 0x7AC, 0x32 },
  2396. { 0x22, 0x7AD, 0x80 },
  2397. { 0x22, 0x7A6, 0x40 },
  2398. { 0x22, 0x7A7, 0x00 },
  2399. { 0x22, 0x7A8, 0x00 },
  2400. { 0x22, 0x7A9, 0x40 },
  2401. { 0x22, 0x7AA, 0x00 },
  2402. { 0x22, 0x7AB, 0x00 },
  2403. { 0x22, 0x7AC, 0x33 },
  2404. { 0x22, 0x7AD, 0x80 },
  2405. /* common */
  2406. { 0x22, 0x782, 0xC1 },
  2407. { 0x22, 0x771, 0x2C },
  2408. { 0x22, 0x772, 0x2C },
  2409. { 0x22, 0x788, 0x04 },
  2410. { 0x01, 0x7B0, 0x08 },
  2411. {}
  2412. };
  2413. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  2414. [STAC_92HD83XXX_REF] = {
  2415. .type = HDA_FIXUP_PINS,
  2416. .v.pins = ref92hd83xxx_pin_configs,
  2417. },
  2418. [STAC_92HD83XXX_PWR_REF] = {
  2419. .type = HDA_FIXUP_PINS,
  2420. .v.pins = ref92hd83xxx_pin_configs,
  2421. },
  2422. [STAC_DELL_S14] = {
  2423. .type = HDA_FIXUP_PINS,
  2424. .v.pins = dell_s14_pin_configs,
  2425. },
  2426. [STAC_DELL_VOSTRO_3500] = {
  2427. .type = HDA_FIXUP_PINS,
  2428. .v.pins = dell_vostro_3500_pin_configs,
  2429. },
  2430. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  2431. .type = HDA_FIXUP_PINS,
  2432. .v.pins = hp_cNB11_intquad_pin_configs,
  2433. .chained = true,
  2434. .chain_id = STAC_92HD83XXX_HP,
  2435. },
  2436. [STAC_92HD83XXX_HP] = {
  2437. .type = HDA_FIXUP_FUNC,
  2438. .v.func = stac92hd83xxx_fixup_hp,
  2439. },
  2440. [STAC_HP_DV7_4000] = {
  2441. .type = HDA_FIXUP_PINS,
  2442. .v.pins = hp_dv7_4000_pin_configs,
  2443. .chained = true,
  2444. .chain_id = STAC_92HD83XXX_HP,
  2445. },
  2446. [STAC_HP_ZEPHYR] = {
  2447. .type = HDA_FIXUP_FUNC,
  2448. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  2449. .chained = true,
  2450. .chain_id = STAC_92HD83XXX_HP,
  2451. },
  2452. [STAC_92HD83XXX_HP_LED] = {
  2453. .type = HDA_FIXUP_FUNC,
  2454. .v.func = stac92hd83xxx_fixup_hp_led,
  2455. .chained = true,
  2456. .chain_id = STAC_92HD83XXX_HP,
  2457. },
  2458. [STAC_92HD83XXX_HP_INV_LED] = {
  2459. .type = HDA_FIXUP_FUNC,
  2460. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  2461. .chained = true,
  2462. .chain_id = STAC_92HD83XXX_HP,
  2463. },
  2464. [STAC_92HD83XXX_HP_MIC_LED] = {
  2465. .type = HDA_FIXUP_FUNC,
  2466. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  2467. .chained = true,
  2468. .chain_id = STAC_92HD83XXX_HP,
  2469. },
  2470. [STAC_HP_LED_GPIO10] = {
  2471. .type = HDA_FIXUP_FUNC,
  2472. .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
  2473. .chained = true,
  2474. .chain_id = STAC_92HD83XXX_HP,
  2475. },
  2476. [STAC_92HD83XXX_HEADSET_JACK] = {
  2477. .type = HDA_FIXUP_FUNC,
  2478. .v.func = stac92hd83xxx_fixup_headset_jack,
  2479. },
  2480. [STAC_HP_ENVY_BASS] = {
  2481. .type = HDA_FIXUP_PINS,
  2482. .v.pins = (const struct hda_pintbl[]) {
  2483. { 0x0f, 0x90170111 },
  2484. {}
  2485. },
  2486. },
  2487. [STAC_HP_BNB13_EQ] = {
  2488. .type = HDA_FIXUP_VERBS,
  2489. .v.verbs = hp_bnb13_eq_verbs,
  2490. .chained = true,
  2491. .chain_id = STAC_92HD83XXX_HP_MIC_LED,
  2492. },
  2493. [STAC_HP_ENVY_TS_BASS] = {
  2494. .type = HDA_FIXUP_PINS,
  2495. .v.pins = (const struct hda_pintbl[]) {
  2496. { 0x10, 0x92170111 },
  2497. {}
  2498. },
  2499. },
  2500. [STAC_HP_ENVY_TS_DAC_BIND] = {
  2501. .type = HDA_FIXUP_FUNC,
  2502. .v.func = hp_envy_ts_fixup_dac_bind,
  2503. .chained = true,
  2504. .chain_id = STAC_HP_ENVY_TS_BASS,
  2505. },
  2506. [STAC_92HD83XXX_GPIO10_EAPD] = {
  2507. .type = HDA_FIXUP_FUNC,
  2508. .v.func = stac92hd83xxx_fixup_gpio10_eapd,
  2509. },
  2510. };
  2511. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  2512. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  2513. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  2514. { .id = STAC_DELL_S14, .name = "dell-s14" },
  2515. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  2516. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  2517. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  2518. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  2519. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  2520. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  2521. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  2522. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  2523. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  2524. { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
  2525. { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
  2526. {}
  2527. };
  2528. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  2529. /* SigmaTel reference board */
  2530. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2531. "DFI LanParty", STAC_92HD83XXX_REF),
  2532. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2533. "DFI LanParty", STAC_92HD83XXX_REF),
  2534. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  2535. "unknown Dell", STAC_DELL_S14),
  2536. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  2537. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  2538. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  2539. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  2540. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  2541. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  2542. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  2543. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  2544. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  2545. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2546. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  2547. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  2548. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  2549. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2550. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  2551. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  2552. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  2553. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  2554. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  2555. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  2556. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  2557. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2558. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  2559. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2560. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  2561. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2562. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  2563. "HP Pavilion dv7", STAC_HP_DV7_4000),
  2564. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  2565. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2566. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  2567. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2568. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  2569. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  2570. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
  2571. "HP Folio 13", STAC_HP_LED_GPIO10),
  2572. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  2573. "HP Folio", STAC_HP_BNB13_EQ),
  2574. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
  2575. "HP bNB13", STAC_HP_BNB13_EQ),
  2576. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
  2577. "HP bNB13", STAC_HP_BNB13_EQ),
  2578. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
  2579. "HP bNB13", STAC_HP_BNB13_EQ),
  2580. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
  2581. "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
  2582. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
  2583. "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
  2584. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
  2585. "HP bNB13", STAC_HP_BNB13_EQ),
  2586. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
  2587. "HP bNB13", STAC_HP_BNB13_EQ),
  2588. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
  2589. "HP bNB13", STAC_HP_BNB13_EQ),
  2590. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
  2591. "HP bNB13", STAC_HP_BNB13_EQ),
  2592. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
  2593. "HP bNB13", STAC_HP_BNB13_EQ),
  2594. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
  2595. "HP bNB13", STAC_HP_BNB13_EQ),
  2596. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
  2597. "HP bNB13", STAC_HP_BNB13_EQ),
  2598. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
  2599. "HP bNB13", STAC_HP_BNB13_EQ),
  2600. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
  2601. "HP bNB13", STAC_HP_BNB13_EQ),
  2602. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
  2603. "HP bNB13", STAC_HP_BNB13_EQ),
  2604. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
  2605. "HP bNB13", STAC_HP_BNB13_EQ),
  2606. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
  2607. "HP bNB13", STAC_HP_BNB13_EQ),
  2608. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
  2609. "HP bNB13", STAC_HP_BNB13_EQ),
  2610. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
  2611. "HP bNB13", STAC_HP_BNB13_EQ),
  2612. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
  2613. "HP bNB13", STAC_HP_BNB13_EQ),
  2614. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
  2615. "HP bNB13", STAC_HP_BNB13_EQ),
  2616. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
  2617. "HP bNB13", STAC_HP_BNB13_EQ),
  2618. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
  2619. "HP bNB13", STAC_HP_BNB13_EQ),
  2620. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
  2621. "HP bNB13", STAC_HP_BNB13_EQ),
  2622. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
  2623. "HP bNB13", STAC_HP_BNB13_EQ),
  2624. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
  2625. "HP bNB13", STAC_HP_BNB13_EQ),
  2626. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
  2627. "HP bNB13", STAC_HP_BNB13_EQ),
  2628. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
  2629. "HP bNB13", STAC_HP_BNB13_EQ),
  2630. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
  2631. "HP bNB13", STAC_HP_BNB13_EQ),
  2632. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
  2633. "HP bNB13", STAC_HP_BNB13_EQ),
  2634. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
  2635. "HP bNB13", STAC_HP_BNB13_EQ),
  2636. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
  2637. "HP bNB13", STAC_HP_BNB13_EQ),
  2638. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
  2639. "HP bNB13", STAC_HP_BNB13_EQ),
  2640. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
  2641. "HP bNB13", STAC_HP_BNB13_EQ),
  2642. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
  2643. "HP bNB13", STAC_HP_BNB13_EQ),
  2644. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
  2645. "HP bNB13", STAC_HP_BNB13_EQ),
  2646. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
  2647. "HP bNB13", STAC_HP_BNB13_EQ),
  2648. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
  2649. "HP bNB13", STAC_HP_BNB13_EQ),
  2650. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
  2651. "HP bNB13", STAC_HP_BNB13_EQ),
  2652. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
  2653. "HP bNB13", STAC_HP_BNB13_EQ),
  2654. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
  2655. "HP bNB13", STAC_HP_BNB13_EQ),
  2656. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
  2657. "HP bNB13", STAC_HP_BNB13_EQ),
  2658. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
  2659. "HP bNB13", STAC_HP_BNB13_EQ),
  2660. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
  2661. "HP bNB13", STAC_HP_BNB13_EQ),
  2662. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
  2663. "HP bNB13", STAC_HP_BNB13_EQ),
  2664. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
  2665. "HP bNB13", STAC_HP_BNB13_EQ),
  2666. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
  2667. "HP bNB13", STAC_HP_BNB13_EQ),
  2668. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
  2669. "HP bNB13", STAC_HP_BNB13_EQ),
  2670. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
  2671. "HP bNB13", STAC_HP_BNB13_EQ),
  2672. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
  2673. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2674. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
  2675. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2676. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
  2677. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2678. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  2679. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2680. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  2681. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2682. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  2683. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2684. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  2685. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2686. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  2687. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2688. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  2689. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2690. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  2691. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2692. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  2693. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2694. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  2695. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2696. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  2697. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2698. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  2699. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2700. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  2701. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2702. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  2703. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2704. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  2705. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2706. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  2707. "HP", STAC_HP_ZEPHYR),
  2708. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2709. "HP Mini", STAC_92HD83XXX_HP_LED),
  2710. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2711. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2712. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2713. "HP Mini", STAC_92HD83XXX_HP_LED),
  2714. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2715. /* match both for 0xfa91 and 0xfa93 */
  2716. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
  2717. "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
  2718. {} /* terminator */
  2719. };
  2720. /* HP dv7 bass switch - GPIO5 */
  2721. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2722. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2723. struct snd_ctl_elem_value *ucontrol)
  2724. {
  2725. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2726. struct sigmatel_spec *spec = codec->spec;
  2727. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2728. return 0;
  2729. }
  2730. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2731. struct snd_ctl_elem_value *ucontrol)
  2732. {
  2733. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2734. struct sigmatel_spec *spec = codec->spec;
  2735. unsigned int gpio_data;
  2736. gpio_data = (spec->gpio_data & ~0x20) |
  2737. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2738. if (gpio_data == spec->gpio_data)
  2739. return 0;
  2740. spec->gpio_data = gpio_data;
  2741. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2742. return 1;
  2743. }
  2744. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2745. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2746. .info = stac_hp_bass_gpio_info,
  2747. .get = stac_hp_bass_gpio_get,
  2748. .put = stac_hp_bass_gpio_put,
  2749. };
  2750. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2751. {
  2752. struct sigmatel_spec *spec = codec->spec;
  2753. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2754. &stac_hp_bass_sw_ctrl))
  2755. return -ENOMEM;
  2756. spec->gpio_mask |= 0x20;
  2757. spec->gpio_dir |= 0x20;
  2758. spec->gpio_data |= 0x20;
  2759. return 0;
  2760. }
  2761. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2762. { 0x0a, 0x02214030 },
  2763. { 0x0b, 0x02a19040 },
  2764. { 0x0c, 0x01a19020 },
  2765. { 0x0d, 0x01014010 },
  2766. { 0x0e, 0x0181302e },
  2767. { 0x0f, 0x01014010 },
  2768. { 0x14, 0x01019020 },
  2769. { 0x18, 0x90a000f0 },
  2770. { 0x19, 0x90a000f0 },
  2771. { 0x1e, 0x01452050 },
  2772. { 0x1f, 0x01452050 },
  2773. {}
  2774. };
  2775. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2776. { 0x0a, 0x0421101f },
  2777. { 0x0b, 0x04a11221 },
  2778. { 0x0c, 0x40f000f0 },
  2779. { 0x0d, 0x90170110 },
  2780. { 0x0e, 0x23a1902e },
  2781. { 0x0f, 0x23014250 },
  2782. { 0x14, 0x40f000f0 },
  2783. { 0x18, 0x90a000f0 },
  2784. { 0x19, 0x40f000f0 },
  2785. { 0x1e, 0x4f0000f0 },
  2786. { 0x1f, 0x4f0000f0 },
  2787. {}
  2788. };
  2789. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2790. { 0x0a, 0x0421101f },
  2791. { 0x0b, 0x04a11221 },
  2792. { 0x0c, 0x90a70330 },
  2793. { 0x0d, 0x90170110 },
  2794. { 0x0e, 0x23a1902e },
  2795. { 0x0f, 0x23014250 },
  2796. { 0x14, 0x40f000f0 },
  2797. { 0x18, 0x40f000f0 },
  2798. { 0x19, 0x40f000f0 },
  2799. { 0x1e, 0x044413b0 },
  2800. { 0x1f, 0x044413b0 },
  2801. {}
  2802. };
  2803. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2804. { 0x0a, 0x0421101f },
  2805. { 0x0b, 0x04a11221 },
  2806. { 0x0c, 0x90a70330 },
  2807. { 0x0d, 0x90170110 },
  2808. { 0x0e, 0x40f000f0 },
  2809. { 0x0f, 0x40f000f0 },
  2810. { 0x14, 0x40f000f0 },
  2811. { 0x18, 0x90a000f0 },
  2812. { 0x19, 0x40f000f0 },
  2813. { 0x1e, 0x044413b0 },
  2814. { 0x1f, 0x044413b0 },
  2815. {}
  2816. };
  2817. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2818. const struct hda_fixup *fix, int action)
  2819. {
  2820. struct sigmatel_spec *spec = codec->spec;
  2821. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2822. return;
  2823. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2824. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2825. }
  2826. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2827. const struct hda_fixup *fix, int action)
  2828. {
  2829. struct sigmatel_spec *spec = codec->spec;
  2830. struct hda_jack_callback *jack;
  2831. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2832. return;
  2833. /* Enable VREF power saving on GPIO1 detect */
  2834. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  2835. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2836. jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
  2837. stac_vref_event);
  2838. if (!IS_ERR(jack))
  2839. jack->private_data = 0x02;
  2840. spec->gpio_mask |= 0x02;
  2841. /* enable internal microphone */
  2842. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2843. }
  2844. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2845. const struct hda_fixup *fix, int action)
  2846. {
  2847. struct sigmatel_spec *spec = codec->spec;
  2848. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2849. return;
  2850. spec->gpio_led = 0x01;
  2851. }
  2852. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2853. const struct hda_fixup *fix, int action)
  2854. {
  2855. unsigned int cap;
  2856. switch (action) {
  2857. case HDA_FIXUP_ACT_PRE_PROBE:
  2858. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2859. break;
  2860. case HDA_FIXUP_ACT_PROBE:
  2861. /* enable bass on HP dv7 */
  2862. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2863. cap &= AC_GPIO_IO_COUNT;
  2864. if (cap >= 6)
  2865. stac_add_hp_bass_switch(codec);
  2866. break;
  2867. }
  2868. }
  2869. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2870. const struct hda_fixup *fix, int action)
  2871. {
  2872. struct sigmatel_spec *spec = codec->spec;
  2873. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2874. return;
  2875. spec->gpio_led = 0x08;
  2876. }
  2877. static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
  2878. {
  2879. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
  2880. /* count line-out, too, as BIOS sets often so */
  2881. return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
  2882. (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2883. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
  2884. }
  2885. static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
  2886. {
  2887. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
  2888. /* It was changed in the BIOS to just satisfy MS DTM.
  2889. * Lets turn it back into slaved HP
  2890. */
  2891. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
  2892. (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
  2893. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
  2894. 0x1f;
  2895. snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
  2896. }
  2897. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2898. const struct hda_fixup *fix, int action)
  2899. {
  2900. struct sigmatel_spec *spec = codec->spec;
  2901. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2902. return;
  2903. /* when both output A and F are assigned, these are supposedly
  2904. * dock and built-in headphones; fix both pin configs
  2905. */
  2906. if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
  2907. fixup_hp_headphone(codec, 0x0a);
  2908. fixup_hp_headphone(codec, 0x0f);
  2909. }
  2910. if (find_mute_led_cfg(codec, 1))
  2911. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  2912. spec->gpio_led,
  2913. spec->gpio_led_polarity);
  2914. }
  2915. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2916. [STAC_92HD71BXX_REF] = {
  2917. .type = HDA_FIXUP_FUNC,
  2918. .v.func = stac92hd71bxx_fixup_ref,
  2919. },
  2920. [STAC_DELL_M4_1] = {
  2921. .type = HDA_FIXUP_PINS,
  2922. .v.pins = dell_m4_1_pin_configs,
  2923. },
  2924. [STAC_DELL_M4_2] = {
  2925. .type = HDA_FIXUP_PINS,
  2926. .v.pins = dell_m4_2_pin_configs,
  2927. },
  2928. [STAC_DELL_M4_3] = {
  2929. .type = HDA_FIXUP_PINS,
  2930. .v.pins = dell_m4_3_pin_configs,
  2931. },
  2932. [STAC_HP_M4] = {
  2933. .type = HDA_FIXUP_FUNC,
  2934. .v.func = stac92hd71bxx_fixup_hp_m4,
  2935. .chained = true,
  2936. .chain_id = STAC_92HD71BXX_HP,
  2937. },
  2938. [STAC_HP_DV4] = {
  2939. .type = HDA_FIXUP_FUNC,
  2940. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2941. .chained = true,
  2942. .chain_id = STAC_HP_DV5,
  2943. },
  2944. [STAC_HP_DV5] = {
  2945. .type = HDA_FIXUP_FUNC,
  2946. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2947. .chained = true,
  2948. .chain_id = STAC_92HD71BXX_HP,
  2949. },
  2950. [STAC_HP_HDX] = {
  2951. .type = HDA_FIXUP_FUNC,
  2952. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2953. .chained = true,
  2954. .chain_id = STAC_92HD71BXX_HP,
  2955. },
  2956. [STAC_92HD71BXX_HP] = {
  2957. .type = HDA_FIXUP_FUNC,
  2958. .v.func = stac92hd71bxx_fixup_hp,
  2959. },
  2960. };
  2961. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2962. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2963. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2964. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2965. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2966. { .id = STAC_HP_M4, .name = "hp-m4" },
  2967. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2968. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2969. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2970. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2971. {}
  2972. };
  2973. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2974. /* SigmaTel reference board */
  2975. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2976. "DFI LanParty", STAC_92HD71BXX_REF),
  2977. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2978. "DFI LanParty", STAC_92HD71BXX_REF),
  2979. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2980. "HP", STAC_HP_DV5),
  2981. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2982. "HP", STAC_HP_DV5),
  2983. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2984. "HP dv4-7", STAC_HP_DV4),
  2985. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2986. "HP dv4-7", STAC_HP_DV5),
  2987. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2988. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2989. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2990. "HP mini 1000", STAC_HP_M4),
  2991. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2992. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2993. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2994. "HP dv6", STAC_HP_DV5),
  2995. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2996. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2997. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2998. "HP DV6", STAC_HP_DV5),
  2999. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  3000. "HP", STAC_HP_DV5),
  3001. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  3002. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  3003. "unknown Dell", STAC_DELL_M4_1),
  3004. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  3005. "unknown Dell", STAC_DELL_M4_1),
  3006. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  3007. "unknown Dell", STAC_DELL_M4_1),
  3008. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  3009. "unknown Dell", STAC_DELL_M4_1),
  3010. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  3011. "unknown Dell", STAC_DELL_M4_1),
  3012. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  3013. "unknown Dell", STAC_DELL_M4_1),
  3014. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  3015. "unknown Dell", STAC_DELL_M4_1),
  3016. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  3017. "unknown Dell", STAC_DELL_M4_2),
  3018. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  3019. "unknown Dell", STAC_DELL_M4_2),
  3020. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  3021. "unknown Dell", STAC_DELL_M4_2),
  3022. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  3023. "unknown Dell", STAC_DELL_M4_2),
  3024. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  3025. "unknown Dell", STAC_DELL_M4_3),
  3026. {} /* terminator */
  3027. };
  3028. static const struct hda_pintbl ref922x_pin_configs[] = {
  3029. { 0x0a, 0x01014010 },
  3030. { 0x0b, 0x01016011 },
  3031. { 0x0c, 0x01012012 },
  3032. { 0x0d, 0x0221401f },
  3033. { 0x0e, 0x01813122 },
  3034. { 0x0f, 0x01011014 },
  3035. { 0x10, 0x01441030 },
  3036. { 0x11, 0x01c41030 },
  3037. { 0x15, 0x40000100 },
  3038. { 0x1b, 0x40000100 },
  3039. {}
  3040. };
  3041. /*
  3042. STAC 922X pin configs for
  3043. 102801A7
  3044. 102801AB
  3045. 102801A9
  3046. 102801D1
  3047. 102801D2
  3048. */
  3049. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  3050. { 0x0a, 0x02214030 },
  3051. { 0x0b, 0x01a19021 },
  3052. { 0x0c, 0x01111012 },
  3053. { 0x0d, 0x01114010 },
  3054. { 0x0e, 0x02a19020 },
  3055. { 0x0f, 0x01117011 },
  3056. { 0x10, 0x400001f0 },
  3057. { 0x11, 0x400001f1 },
  3058. { 0x15, 0x01813122 },
  3059. { 0x1b, 0x400001f2 },
  3060. {}
  3061. };
  3062. /*
  3063. STAC 922X pin configs for
  3064. 102801AC
  3065. 102801D0
  3066. */
  3067. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  3068. { 0x0a, 0x02214030 },
  3069. { 0x0b, 0x01a19021 },
  3070. { 0x0c, 0x01111012 },
  3071. { 0x0d, 0x01114010 },
  3072. { 0x0e, 0x02a19020 },
  3073. { 0x0f, 0x01117011 },
  3074. { 0x10, 0x01451140 },
  3075. { 0x11, 0x400001f0 },
  3076. { 0x15, 0x01813122 },
  3077. { 0x1b, 0x400001f1 },
  3078. {}
  3079. };
  3080. /*
  3081. STAC 922X pin configs for
  3082. 102801BF
  3083. */
  3084. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  3085. { 0x0a, 0x0321101f },
  3086. { 0x0b, 0x01112024 },
  3087. { 0x0c, 0x01111222 },
  3088. { 0x0d, 0x91174220 },
  3089. { 0x0e, 0x03a11050 },
  3090. { 0x0f, 0x01116221 },
  3091. { 0x10, 0x90a70330 },
  3092. { 0x11, 0x01452340 },
  3093. { 0x15, 0x40C003f1 },
  3094. { 0x1b, 0x405003f0 },
  3095. {}
  3096. };
  3097. /*
  3098. STAC 9221 A1 pin configs for
  3099. 102801D7 (Dell XPS M1210)
  3100. */
  3101. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  3102. { 0x0a, 0x02211211 },
  3103. { 0x0b, 0x408103ff },
  3104. { 0x0c, 0x02a1123e },
  3105. { 0x0d, 0x90100310 },
  3106. { 0x0e, 0x408003f1 },
  3107. { 0x0f, 0x0221121f },
  3108. { 0x10, 0x03451340 },
  3109. { 0x11, 0x40c003f2 },
  3110. { 0x15, 0x508003f3 },
  3111. { 0x1b, 0x405003f4 },
  3112. {}
  3113. };
  3114. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  3115. { 0x0a, 0x0221401f },
  3116. { 0x0b, 0x01a19022 },
  3117. { 0x0c, 0x01813021 },
  3118. { 0x0d, 0x01014010 },
  3119. { 0x0e, 0x40000100 },
  3120. { 0x0f, 0x40000100 },
  3121. { 0x10, 0x40000100 },
  3122. { 0x11, 0x40000100 },
  3123. { 0x15, 0x02a19120 },
  3124. { 0x1b, 0x40000100 },
  3125. {}
  3126. };
  3127. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  3128. { 0x0a, 0x0221401f },
  3129. { 0x0b, 0x01011012 },
  3130. { 0x0c, 0x01813024 },
  3131. { 0x0d, 0x01014010 },
  3132. { 0x0e, 0x01a19021 },
  3133. { 0x0f, 0x01016011 },
  3134. { 0x10, 0x01452130 },
  3135. { 0x11, 0x40000100 },
  3136. { 0x15, 0x02a19320 },
  3137. { 0x1b, 0x40000100 },
  3138. {}
  3139. };
  3140. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  3141. { 0x0a, 0x0121e21f },
  3142. { 0x0b, 0x400000ff },
  3143. { 0x0c, 0x9017e110 },
  3144. { 0x0d, 0x400000fd },
  3145. { 0x0e, 0x400000fe },
  3146. { 0x0f, 0x0181e020 },
  3147. { 0x10, 0x1145e030 },
  3148. { 0x11, 0x11c5e240 },
  3149. { 0x15, 0x400000fc },
  3150. { 0x1b, 0x400000fb },
  3151. {}
  3152. };
  3153. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  3154. { 0x0a, 0x0121e21f },
  3155. { 0x0b, 0x90a7012e },
  3156. { 0x0c, 0x9017e110 },
  3157. { 0x0d, 0x400000fd },
  3158. { 0x0e, 0x400000fe },
  3159. { 0x0f, 0x0181e020 },
  3160. { 0x10, 0x1145e230 },
  3161. { 0x11, 0x500000fa },
  3162. { 0x15, 0x400000fc },
  3163. { 0x1b, 0x400000fb },
  3164. {}
  3165. };
  3166. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  3167. { 0x0a, 0x0121e21f },
  3168. { 0x0b, 0x90a7012e },
  3169. { 0x0c, 0x9017e110 },
  3170. { 0x0d, 0x400000fd },
  3171. { 0x0e, 0x400000fe },
  3172. { 0x0f, 0x0181e020 },
  3173. { 0x10, 0x1145e230 },
  3174. { 0x11, 0x11c5e240 },
  3175. { 0x15, 0x400000fc },
  3176. { 0x1b, 0x400000fb },
  3177. {}
  3178. };
  3179. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  3180. { 0x0a, 0x0321e21f },
  3181. { 0x0b, 0x03a1e02e },
  3182. { 0x0c, 0x9017e110 },
  3183. { 0x0d, 0x9017e11f },
  3184. { 0x0e, 0x400000fe },
  3185. { 0x0f, 0x0381e020 },
  3186. { 0x10, 0x1345e230 },
  3187. { 0x11, 0x13c5e240 },
  3188. { 0x15, 0x400000fc },
  3189. { 0x1b, 0x400000fb },
  3190. {}
  3191. };
  3192. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  3193. { 0x0a, 0x0321e21f },
  3194. { 0x0b, 0x03a1e02e },
  3195. { 0x0c, 0x9017e110 },
  3196. { 0x0d, 0x9017e11f },
  3197. { 0x0e, 0x400000fe },
  3198. { 0x0f, 0x0381e020 },
  3199. { 0x10, 0x1345e230 },
  3200. { 0x11, 0x13c5e240 },
  3201. { 0x15, 0x400000fc },
  3202. { 0x1b, 0x400000fb },
  3203. {}
  3204. };
  3205. static const struct hda_pintbl ecs202_pin_configs[] = {
  3206. { 0x0a, 0x0221401f },
  3207. { 0x0b, 0x02a19020 },
  3208. { 0x0c, 0x01a19020 },
  3209. { 0x0d, 0x01114010 },
  3210. { 0x0e, 0x408000f0 },
  3211. { 0x0f, 0x01813022 },
  3212. { 0x10, 0x074510a0 },
  3213. { 0x11, 0x40c400f1 },
  3214. { 0x15, 0x9037012e },
  3215. { 0x1b, 0x40e000f2 },
  3216. {}
  3217. };
  3218. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  3219. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  3220. SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
  3221. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  3222. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  3223. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  3224. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  3225. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  3226. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  3227. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  3228. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  3229. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  3230. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  3231. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  3232. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  3233. {}
  3234. };
  3235. static const struct hda_fixup stac922x_fixups[];
  3236. /* remap the fixup from codec SSID and apply it */
  3237. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  3238. const struct hda_fixup *fix,
  3239. int action)
  3240. {
  3241. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3242. return;
  3243. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  3244. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  3245. stac922x_fixups);
  3246. if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
  3247. snd_hda_apply_fixup(codec, action);
  3248. }
  3249. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  3250. const struct hda_fixup *fix,
  3251. int action)
  3252. {
  3253. struct sigmatel_spec *spec = codec->spec;
  3254. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3255. spec->gpio_mask = spec->gpio_dir = 0x03;
  3256. spec->gpio_data = 0x03;
  3257. }
  3258. }
  3259. static const struct hda_fixup stac922x_fixups[] = {
  3260. [STAC_D945_REF] = {
  3261. .type = HDA_FIXUP_PINS,
  3262. .v.pins = ref922x_pin_configs,
  3263. },
  3264. [STAC_D945GTP3] = {
  3265. .type = HDA_FIXUP_PINS,
  3266. .v.pins = d945gtp3_pin_configs,
  3267. },
  3268. [STAC_D945GTP5] = {
  3269. .type = HDA_FIXUP_PINS,
  3270. .v.pins = d945gtp5_pin_configs,
  3271. },
  3272. [STAC_INTEL_MAC_AUTO] = {
  3273. .type = HDA_FIXUP_FUNC,
  3274. .v.func = stac922x_fixup_intel_mac_auto,
  3275. },
  3276. [STAC_INTEL_MAC_V1] = {
  3277. .type = HDA_FIXUP_PINS,
  3278. .v.pins = intel_mac_v1_pin_configs,
  3279. .chained = true,
  3280. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3281. },
  3282. [STAC_INTEL_MAC_V2] = {
  3283. .type = HDA_FIXUP_PINS,
  3284. .v.pins = intel_mac_v2_pin_configs,
  3285. .chained = true,
  3286. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3287. },
  3288. [STAC_INTEL_MAC_V3] = {
  3289. .type = HDA_FIXUP_PINS,
  3290. .v.pins = intel_mac_v3_pin_configs,
  3291. .chained = true,
  3292. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3293. },
  3294. [STAC_INTEL_MAC_V4] = {
  3295. .type = HDA_FIXUP_PINS,
  3296. .v.pins = intel_mac_v4_pin_configs,
  3297. .chained = true,
  3298. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3299. },
  3300. [STAC_INTEL_MAC_V5] = {
  3301. .type = HDA_FIXUP_PINS,
  3302. .v.pins = intel_mac_v5_pin_configs,
  3303. .chained = true,
  3304. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3305. },
  3306. [STAC_922X_INTEL_MAC_GPIO] = {
  3307. .type = HDA_FIXUP_FUNC,
  3308. .v.func = stac922x_fixup_intel_mac_gpio,
  3309. },
  3310. [STAC_ECS_202] = {
  3311. .type = HDA_FIXUP_PINS,
  3312. .v.pins = ecs202_pin_configs,
  3313. },
  3314. [STAC_922X_DELL_D81] = {
  3315. .type = HDA_FIXUP_PINS,
  3316. .v.pins = dell_922x_d81_pin_configs,
  3317. },
  3318. [STAC_922X_DELL_D82] = {
  3319. .type = HDA_FIXUP_PINS,
  3320. .v.pins = dell_922x_d82_pin_configs,
  3321. },
  3322. [STAC_922X_DELL_M81] = {
  3323. .type = HDA_FIXUP_PINS,
  3324. .v.pins = dell_922x_m81_pin_configs,
  3325. },
  3326. [STAC_922X_DELL_M82] = {
  3327. .type = HDA_FIXUP_PINS,
  3328. .v.pins = dell_922x_m82_pin_configs,
  3329. },
  3330. };
  3331. static const struct hda_model_fixup stac922x_models[] = {
  3332. { .id = STAC_D945_REF, .name = "ref" },
  3333. { .id = STAC_D945GTP5, .name = "5stack" },
  3334. { .id = STAC_D945GTP3, .name = "3stack" },
  3335. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  3336. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  3337. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  3338. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  3339. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  3340. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  3341. { .id = STAC_ECS_202, .name = "ecs202" },
  3342. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  3343. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  3344. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  3345. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  3346. /* for backward compatibility */
  3347. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  3348. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  3349. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  3350. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  3351. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  3352. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  3353. {}
  3354. };
  3355. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  3356. /* SigmaTel reference board */
  3357. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3358. "DFI LanParty", STAC_D945_REF),
  3359. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3360. "DFI LanParty", STAC_D945_REF),
  3361. /* Intel 945G based systems */
  3362. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  3363. "Intel D945G", STAC_D945GTP3),
  3364. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  3365. "Intel D945G", STAC_D945GTP3),
  3366. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  3367. "Intel D945G", STAC_D945GTP3),
  3368. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  3369. "Intel D945G", STAC_D945GTP3),
  3370. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  3371. "Intel D945G", STAC_D945GTP3),
  3372. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  3373. "Intel D945G", STAC_D945GTP3),
  3374. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  3375. "Intel D945G", STAC_D945GTP3),
  3376. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  3377. "Intel D945G", STAC_D945GTP3),
  3378. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  3379. "Intel D945G", STAC_D945GTP3),
  3380. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  3381. "Intel D945G", STAC_D945GTP3),
  3382. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  3383. "Intel D945G", STAC_D945GTP3),
  3384. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  3385. "Intel D945G", STAC_D945GTP3),
  3386. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  3387. "Intel D945G", STAC_D945GTP3),
  3388. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  3389. "Intel D945G", STAC_D945GTP3),
  3390. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  3391. "Intel D945G", STAC_D945GTP3),
  3392. /* Intel D945G 5-stack systems */
  3393. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  3394. "Intel D945G", STAC_D945GTP5),
  3395. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  3396. "Intel D945G", STAC_D945GTP5),
  3397. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  3398. "Intel D945G", STAC_D945GTP5),
  3399. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  3400. "Intel D945G", STAC_D945GTP5),
  3401. /* Intel 945P based systems */
  3402. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  3403. "Intel D945P", STAC_D945GTP3),
  3404. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  3405. "Intel D945P", STAC_D945GTP3),
  3406. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  3407. "Intel D945P", STAC_D945GTP3),
  3408. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  3409. "Intel D945P", STAC_D945GTP3),
  3410. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  3411. "Intel D945P", STAC_D945GTP3),
  3412. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  3413. "Intel D945P", STAC_D945GTP5),
  3414. /* other intel */
  3415. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  3416. "Intel D945", STAC_D945_REF),
  3417. /* other systems */
  3418. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  3419. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  3420. /* Dell systems */
  3421. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  3422. "unknown Dell", STAC_922X_DELL_D81),
  3423. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  3424. "unknown Dell", STAC_922X_DELL_D81),
  3425. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  3426. "unknown Dell", STAC_922X_DELL_D81),
  3427. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  3428. "unknown Dell", STAC_922X_DELL_D82),
  3429. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  3430. "unknown Dell", STAC_922X_DELL_M81),
  3431. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  3432. "unknown Dell", STAC_922X_DELL_D82),
  3433. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  3434. "unknown Dell", STAC_922X_DELL_D81),
  3435. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  3436. "unknown Dell", STAC_922X_DELL_D81),
  3437. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  3438. "Dell XPS M1210", STAC_922X_DELL_M82),
  3439. /* ECS/PC Chips boards */
  3440. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  3441. "ECS/PC chips", STAC_ECS_202),
  3442. {} /* terminator */
  3443. };
  3444. static const struct hda_pintbl ref927x_pin_configs[] = {
  3445. { 0x0a, 0x02214020 },
  3446. { 0x0b, 0x02a19080 },
  3447. { 0x0c, 0x0181304e },
  3448. { 0x0d, 0x01014010 },
  3449. { 0x0e, 0x01a19040 },
  3450. { 0x0f, 0x01011012 },
  3451. { 0x10, 0x01016011 },
  3452. { 0x11, 0x0101201f },
  3453. { 0x12, 0x183301f0 },
  3454. { 0x13, 0x18a001f0 },
  3455. { 0x14, 0x18a001f0 },
  3456. { 0x21, 0x01442070 },
  3457. { 0x22, 0x01c42190 },
  3458. { 0x23, 0x40000100 },
  3459. {}
  3460. };
  3461. static const struct hda_pintbl d965_3st_pin_configs[] = {
  3462. { 0x0a, 0x0221401f },
  3463. { 0x0b, 0x02a19120 },
  3464. { 0x0c, 0x40000100 },
  3465. { 0x0d, 0x01014011 },
  3466. { 0x0e, 0x01a19021 },
  3467. { 0x0f, 0x01813024 },
  3468. { 0x10, 0x40000100 },
  3469. { 0x11, 0x40000100 },
  3470. { 0x12, 0x40000100 },
  3471. { 0x13, 0x40000100 },
  3472. { 0x14, 0x40000100 },
  3473. { 0x21, 0x40000100 },
  3474. { 0x22, 0x40000100 },
  3475. { 0x23, 0x40000100 },
  3476. {}
  3477. };
  3478. static const struct hda_pintbl d965_5st_pin_configs[] = {
  3479. { 0x0a, 0x02214020 },
  3480. { 0x0b, 0x02a19080 },
  3481. { 0x0c, 0x0181304e },
  3482. { 0x0d, 0x01014010 },
  3483. { 0x0e, 0x01a19040 },
  3484. { 0x0f, 0x01011012 },
  3485. { 0x10, 0x01016011 },
  3486. { 0x11, 0x40000100 },
  3487. { 0x12, 0x40000100 },
  3488. { 0x13, 0x40000100 },
  3489. { 0x14, 0x40000100 },
  3490. { 0x21, 0x01442070 },
  3491. { 0x22, 0x40000100 },
  3492. { 0x23, 0x40000100 },
  3493. {}
  3494. };
  3495. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  3496. { 0x0a, 0x40000100 },
  3497. { 0x0b, 0x40000100 },
  3498. { 0x0c, 0x0181304e },
  3499. { 0x0d, 0x01014010 },
  3500. { 0x0e, 0x01a19040 },
  3501. { 0x0f, 0x01011012 },
  3502. { 0x10, 0x01016011 },
  3503. { 0x11, 0x40000100 },
  3504. { 0x12, 0x40000100 },
  3505. { 0x13, 0x40000100 },
  3506. { 0x14, 0x40000100 },
  3507. { 0x21, 0x01442070 },
  3508. { 0x22, 0x40000100 },
  3509. { 0x23, 0x40000100 },
  3510. {}
  3511. };
  3512. static const struct hda_pintbl dell_3st_pin_configs[] = {
  3513. { 0x0a, 0x02211230 },
  3514. { 0x0b, 0x02a11220 },
  3515. { 0x0c, 0x01a19040 },
  3516. { 0x0d, 0x01114210 },
  3517. { 0x0e, 0x01111212 },
  3518. { 0x0f, 0x01116211 },
  3519. { 0x10, 0x01813050 },
  3520. { 0x11, 0x01112214 },
  3521. { 0x12, 0x403003fa },
  3522. { 0x13, 0x90a60040 },
  3523. { 0x14, 0x90a60040 },
  3524. { 0x21, 0x404003fb },
  3525. { 0x22, 0x40c003fc },
  3526. { 0x23, 0x40000100 },
  3527. {}
  3528. };
  3529. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  3530. const struct hda_fixup *fix, int action)
  3531. {
  3532. /* no jack detecion for ref-no-jd model */
  3533. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3534. codec->no_jack_detect = 1;
  3535. }
  3536. static void stac927x_fixup_ref(struct hda_codec *codec,
  3537. const struct hda_fixup *fix, int action)
  3538. {
  3539. struct sigmatel_spec *spec = codec->spec;
  3540. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3541. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  3542. spec->eapd_mask = spec->gpio_mask = 0;
  3543. spec->gpio_dir = spec->gpio_data = 0;
  3544. }
  3545. }
  3546. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  3547. const struct hda_fixup *fix, int action)
  3548. {
  3549. struct sigmatel_spec *spec = codec->spec;
  3550. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3551. return;
  3552. if (codec->core.subsystem_id != 0x1028022f) {
  3553. /* GPIO2 High = Enable EAPD */
  3554. spec->eapd_mask = spec->gpio_mask = 0x04;
  3555. spec->gpio_dir = spec->gpio_data = 0x04;
  3556. }
  3557. snd_hda_add_verbs(codec, dell_3st_core_init);
  3558. spec->volknob_init = 1;
  3559. }
  3560. static void stac927x_fixup_volknob(struct hda_codec *codec,
  3561. const struct hda_fixup *fix, int action)
  3562. {
  3563. struct sigmatel_spec *spec = codec->spec;
  3564. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3565. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  3566. spec->volknob_init = 1;
  3567. }
  3568. }
  3569. static const struct hda_fixup stac927x_fixups[] = {
  3570. [STAC_D965_REF_NO_JD] = {
  3571. .type = HDA_FIXUP_FUNC,
  3572. .v.func = stac927x_fixup_ref_no_jd,
  3573. .chained = true,
  3574. .chain_id = STAC_D965_REF,
  3575. },
  3576. [STAC_D965_REF] = {
  3577. .type = HDA_FIXUP_FUNC,
  3578. .v.func = stac927x_fixup_ref,
  3579. },
  3580. [STAC_D965_3ST] = {
  3581. .type = HDA_FIXUP_PINS,
  3582. .v.pins = d965_3st_pin_configs,
  3583. .chained = true,
  3584. .chain_id = STAC_D965_VERBS,
  3585. },
  3586. [STAC_D965_5ST] = {
  3587. .type = HDA_FIXUP_PINS,
  3588. .v.pins = d965_5st_pin_configs,
  3589. .chained = true,
  3590. .chain_id = STAC_D965_VERBS,
  3591. },
  3592. [STAC_D965_VERBS] = {
  3593. .type = HDA_FIXUP_VERBS,
  3594. .v.verbs = d965_core_init,
  3595. },
  3596. [STAC_D965_5ST_NO_FP] = {
  3597. .type = HDA_FIXUP_PINS,
  3598. .v.pins = d965_5st_no_fp_pin_configs,
  3599. },
  3600. [STAC_NEMO_DEFAULT] = {
  3601. .type = HDA_FIXUP_PINS,
  3602. .v.pins = nemo_pin_configs,
  3603. },
  3604. [STAC_DELL_3ST] = {
  3605. .type = HDA_FIXUP_PINS,
  3606. .v.pins = dell_3st_pin_configs,
  3607. .chained = true,
  3608. .chain_id = STAC_927X_DELL_DMIC,
  3609. },
  3610. [STAC_DELL_BIOS] = {
  3611. .type = HDA_FIXUP_PINS,
  3612. .v.pins = (const struct hda_pintbl[]) {
  3613. /* correct the front output jack as a hp out */
  3614. { 0x0f, 0x0221101f },
  3615. /* correct the front input jack as a mic */
  3616. { 0x0e, 0x02a79130 },
  3617. {}
  3618. },
  3619. .chained = true,
  3620. .chain_id = STAC_927X_DELL_DMIC,
  3621. },
  3622. [STAC_DELL_BIOS_AMIC] = {
  3623. .type = HDA_FIXUP_PINS,
  3624. .v.pins = (const struct hda_pintbl[]) {
  3625. /* configure the analog microphone on some laptops */
  3626. { 0x0c, 0x90a79130 },
  3627. {}
  3628. },
  3629. .chained = true,
  3630. .chain_id = STAC_DELL_BIOS,
  3631. },
  3632. [STAC_DELL_BIOS_SPDIF] = {
  3633. .type = HDA_FIXUP_PINS,
  3634. .v.pins = (const struct hda_pintbl[]) {
  3635. /* correct the device field to SPDIF out */
  3636. { 0x21, 0x01442070 },
  3637. {}
  3638. },
  3639. .chained = true,
  3640. .chain_id = STAC_DELL_BIOS,
  3641. },
  3642. [STAC_927X_DELL_DMIC] = {
  3643. .type = HDA_FIXUP_FUNC,
  3644. .v.func = stac927x_fixup_dell_dmic,
  3645. },
  3646. [STAC_927X_VOLKNOB] = {
  3647. .type = HDA_FIXUP_FUNC,
  3648. .v.func = stac927x_fixup_volknob,
  3649. },
  3650. };
  3651. static const struct hda_model_fixup stac927x_models[] = {
  3652. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  3653. { .id = STAC_D965_REF, .name = "ref" },
  3654. { .id = STAC_D965_3ST, .name = "3stack" },
  3655. { .id = STAC_D965_5ST, .name = "5stack" },
  3656. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  3657. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  3658. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  3659. { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
  3660. { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
  3661. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  3662. {}
  3663. };
  3664. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  3665. /* SigmaTel reference board */
  3666. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3667. "DFI LanParty", STAC_D965_REF),
  3668. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3669. "DFI LanParty", STAC_D965_REF),
  3670. /* Intel 946 based systems */
  3671. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  3672. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  3673. /* 965 based 3 stack systems */
  3674. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  3675. "Intel D965", STAC_D965_3ST),
  3676. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  3677. "Intel D965", STAC_D965_3ST),
  3678. /* Dell 3 stack systems */
  3679. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  3680. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  3681. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  3682. /* Dell 3 stack systems with verb table in BIOS */
  3683. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  3684. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  3685. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  3686. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  3687. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  3688. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  3689. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  3690. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  3691. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  3692. /* 965 based 5 stack systems */
  3693. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  3694. "Intel D965", STAC_D965_5ST),
  3695. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  3696. "Intel D965", STAC_D965_5ST),
  3697. /* Nemo */
  3698. SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
  3699. /* volume-knob fixes */
  3700. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  3701. {} /* terminator */
  3702. };
  3703. static const struct hda_pintbl ref9205_pin_configs[] = {
  3704. { 0x0a, 0x40000100 },
  3705. { 0x0b, 0x40000100 },
  3706. { 0x0c, 0x01016011 },
  3707. { 0x0d, 0x01014010 },
  3708. { 0x0e, 0x01813122 },
  3709. { 0x0f, 0x01a19021 },
  3710. { 0x14, 0x01019020 },
  3711. { 0x16, 0x40000100 },
  3712. { 0x17, 0x90a000f0 },
  3713. { 0x18, 0x90a000f0 },
  3714. { 0x21, 0x01441030 },
  3715. { 0x22, 0x01c41030 },
  3716. {}
  3717. };
  3718. /*
  3719. STAC 9205 pin configs for
  3720. 102801F1
  3721. 102801F2
  3722. 102801FC
  3723. 102801FD
  3724. 10280204
  3725. 1028021F
  3726. 10280228 (Dell Vostro 1500)
  3727. 10280229 (Dell Vostro 1700)
  3728. */
  3729. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  3730. { 0x0a, 0x0321101F },
  3731. { 0x0b, 0x03A11020 },
  3732. { 0x0c, 0x400003FA },
  3733. { 0x0d, 0x90170310 },
  3734. { 0x0e, 0x400003FB },
  3735. { 0x0f, 0x400003FC },
  3736. { 0x14, 0x400003FD },
  3737. { 0x16, 0x40F000F9 },
  3738. { 0x17, 0x90A60330 },
  3739. { 0x18, 0x400003FF },
  3740. { 0x21, 0x0144131F },
  3741. { 0x22, 0x40C003FE },
  3742. {}
  3743. };
  3744. /*
  3745. STAC 9205 pin configs for
  3746. 102801F9
  3747. 102801FA
  3748. 102801FE
  3749. 102801FF (Dell Precision M4300)
  3750. 10280206
  3751. 10280200
  3752. 10280201
  3753. */
  3754. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3755. { 0x0a, 0x0321101f },
  3756. { 0x0b, 0x03a11020 },
  3757. { 0x0c, 0x90a70330 },
  3758. { 0x0d, 0x90170310 },
  3759. { 0x0e, 0x400000fe },
  3760. { 0x0f, 0x400000ff },
  3761. { 0x14, 0x400000fd },
  3762. { 0x16, 0x40f000f9 },
  3763. { 0x17, 0x400000fa },
  3764. { 0x18, 0x400000fc },
  3765. { 0x21, 0x0144131f },
  3766. { 0x22, 0x40c003f8 },
  3767. /* Enable SPDIF in/out */
  3768. { 0x1f, 0x01441030 },
  3769. { 0x20, 0x1c410030 },
  3770. {}
  3771. };
  3772. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3773. { 0x0a, 0x0421101f },
  3774. { 0x0b, 0x04a11020 },
  3775. { 0x0c, 0x400003fa },
  3776. { 0x0d, 0x90170310 },
  3777. { 0x0e, 0x400003fb },
  3778. { 0x0f, 0x400003fc },
  3779. { 0x14, 0x400003fd },
  3780. { 0x16, 0x400003f9 },
  3781. { 0x17, 0x90a60330 },
  3782. { 0x18, 0x400003ff },
  3783. { 0x21, 0x01441340 },
  3784. { 0x22, 0x40c003fe },
  3785. {}
  3786. };
  3787. static void stac9205_fixup_ref(struct hda_codec *codec,
  3788. const struct hda_fixup *fix, int action)
  3789. {
  3790. struct sigmatel_spec *spec = codec->spec;
  3791. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3792. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3793. /* SPDIF-In enabled */
  3794. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3795. }
  3796. }
  3797. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3798. const struct hda_fixup *fix, int action)
  3799. {
  3800. struct sigmatel_spec *spec = codec->spec;
  3801. struct hda_jack_callback *jack;
  3802. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3803. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3804. /* Enable unsol response for GPIO4/Dock HP connection */
  3805. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  3806. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3807. jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
  3808. stac_vref_event);
  3809. if (!IS_ERR(jack))
  3810. jack->private_data = 0x01;
  3811. spec->gpio_dir = 0x0b;
  3812. spec->eapd_mask = 0x01;
  3813. spec->gpio_mask = 0x1b;
  3814. spec->gpio_mute = 0x10;
  3815. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3816. * GPIO3 Low = DRM
  3817. */
  3818. spec->gpio_data = 0x01;
  3819. }
  3820. }
  3821. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3822. const struct hda_fixup *fix, int action)
  3823. {
  3824. struct sigmatel_spec *spec = codec->spec;
  3825. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3826. spec->eapd_switch = 0;
  3827. }
  3828. static const struct hda_fixup stac9205_fixups[] = {
  3829. [STAC_9205_REF] = {
  3830. .type = HDA_FIXUP_FUNC,
  3831. .v.func = stac9205_fixup_ref,
  3832. },
  3833. [STAC_9205_DELL_M42] = {
  3834. .type = HDA_FIXUP_PINS,
  3835. .v.pins = dell_9205_m42_pin_configs,
  3836. },
  3837. [STAC_9205_DELL_M43] = {
  3838. .type = HDA_FIXUP_FUNC,
  3839. .v.func = stac9205_fixup_dell_m43,
  3840. },
  3841. [STAC_9205_DELL_M44] = {
  3842. .type = HDA_FIXUP_PINS,
  3843. .v.pins = dell_9205_m44_pin_configs,
  3844. },
  3845. [STAC_9205_EAPD] = {
  3846. .type = HDA_FIXUP_FUNC,
  3847. .v.func = stac9205_fixup_eapd,
  3848. },
  3849. {}
  3850. };
  3851. static const struct hda_model_fixup stac9205_models[] = {
  3852. { .id = STAC_9205_REF, .name = "ref" },
  3853. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3854. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3855. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3856. { .id = STAC_9205_EAPD, .name = "eapd" },
  3857. {}
  3858. };
  3859. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3860. /* SigmaTel reference board */
  3861. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3862. "DFI LanParty", STAC_9205_REF),
  3863. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3864. "SigmaTel", STAC_9205_REF),
  3865. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3866. "DFI LanParty", STAC_9205_REF),
  3867. /* Dell */
  3868. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3869. "unknown Dell", STAC_9205_DELL_M42),
  3870. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3871. "unknown Dell", STAC_9205_DELL_M42),
  3872. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3873. "Dell Precision", STAC_9205_DELL_M43),
  3874. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3875. "Dell Precision", STAC_9205_DELL_M43),
  3876. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3877. "Dell Precision", STAC_9205_DELL_M43),
  3878. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3879. "unknown Dell", STAC_9205_DELL_M42),
  3880. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3881. "unknown Dell", STAC_9205_DELL_M42),
  3882. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3883. "Dell Precision", STAC_9205_DELL_M43),
  3884. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3885. "Dell Precision M4300", STAC_9205_DELL_M43),
  3886. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3887. "unknown Dell", STAC_9205_DELL_M42),
  3888. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3889. "Dell Precision", STAC_9205_DELL_M43),
  3890. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3891. "Dell Precision", STAC_9205_DELL_M43),
  3892. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3893. "Dell Precision", STAC_9205_DELL_M43),
  3894. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3895. "Dell Inspiron", STAC_9205_DELL_M44),
  3896. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3897. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3898. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3899. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3900. /* Gateway */
  3901. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3902. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3903. {} /* terminator */
  3904. };
  3905. static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
  3906. const struct hda_fixup *fix, int action)
  3907. {
  3908. struct sigmatel_spec *spec = codec->spec;
  3909. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3910. return;
  3911. if (find_mute_led_cfg(codec, spec->default_polarity))
  3912. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  3913. spec->gpio_led,
  3914. spec->gpio_led_polarity);
  3915. }
  3916. static const struct hda_fixup stac92hd95_fixups[] = {
  3917. [STAC_92HD95_HP_LED] = {
  3918. .type = HDA_FIXUP_FUNC,
  3919. .v.func = stac92hd95_fixup_hp_led,
  3920. },
  3921. [STAC_92HD95_HP_BASS] = {
  3922. .type = HDA_FIXUP_VERBS,
  3923. .v.verbs = (const struct hda_verb[]) {
  3924. {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
  3925. {}
  3926. },
  3927. .chained = true,
  3928. .chain_id = STAC_92HD95_HP_LED,
  3929. },
  3930. };
  3931. static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
  3932. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
  3933. {} /* terminator */
  3934. };
  3935. static const struct hda_model_fixup stac92hd95_models[] = {
  3936. { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
  3937. { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
  3938. {}
  3939. };
  3940. static int stac_parse_auto_config(struct hda_codec *codec)
  3941. {
  3942. struct sigmatel_spec *spec = codec->spec;
  3943. int err;
  3944. int flags = 0;
  3945. if (spec->headset_jack)
  3946. flags |= HDA_PINCFG_HEADSET_MIC;
  3947. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
  3948. if (err < 0)
  3949. return err;
  3950. /* add hooks */
  3951. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3952. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3953. spec->gen.automute_hook = stac_update_outputs;
  3954. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3955. if (err < 0)
  3956. return err;
  3957. if (spec->vref_mute_led_nid) {
  3958. err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
  3959. if (err < 0)
  3960. return err;
  3961. }
  3962. /* setup analog beep controls */
  3963. if (spec->anabeep_nid > 0) {
  3964. err = stac_auto_create_beep_ctls(codec,
  3965. spec->anabeep_nid);
  3966. if (err < 0)
  3967. return err;
  3968. }
  3969. /* setup digital beep controls and input device */
  3970. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3971. if (spec->gen.beep_nid) {
  3972. hda_nid_t nid = spec->gen.beep_nid;
  3973. unsigned int caps;
  3974. err = stac_auto_create_beep_ctls(codec, nid);
  3975. if (err < 0)
  3976. return err;
  3977. if (codec->beep) {
  3978. /* IDT/STAC codecs have linear beep tone parameter */
  3979. codec->beep->linear_tone = spec->linear_tone_beep;
  3980. /* if no beep switch is available, make its own one */
  3981. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3982. if (!(caps & AC_AMPCAP_MUTE)) {
  3983. err = stac_beep_switch_ctl(codec);
  3984. if (err < 0)
  3985. return err;
  3986. }
  3987. }
  3988. }
  3989. #endif
  3990. if (spec->gpio_led)
  3991. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3992. if (spec->aloopback_ctl &&
  3993. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3994. unsigned int wr_verb =
  3995. spec->aloopback_ctl->private_value >> 16;
  3996. if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
  3997. return -ENOMEM;
  3998. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3999. return -ENOMEM;
  4000. }
  4001. if (spec->have_spdif_mux) {
  4002. err = stac_create_spdif_mux_ctls(codec);
  4003. if (err < 0)
  4004. return err;
  4005. }
  4006. stac_init_power_map(codec);
  4007. return 0;
  4008. }
  4009. static int stac_init(struct hda_codec *codec)
  4010. {
  4011. struct sigmatel_spec *spec = codec->spec;
  4012. int i;
  4013. /* override some hints */
  4014. stac_store_hints(codec);
  4015. /* set up GPIO */
  4016. /* turn on EAPD statically when spec->eapd_switch isn't set.
  4017. * otherwise, unsol event will turn it on/off dynamically
  4018. */
  4019. if (!spec->eapd_switch)
  4020. spec->gpio_data |= spec->eapd_mask;
  4021. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  4022. snd_hda_gen_init(codec);
  4023. /* sync the power-map */
  4024. if (spec->num_pwrs)
  4025. snd_hda_codec_write(codec, codec->core.afg, 0,
  4026. AC_VERB_IDT_SET_POWER_MAP,
  4027. spec->power_map_bits);
  4028. /* power down inactive ADCs */
  4029. if (spec->powerdown_adcs) {
  4030. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  4031. if (spec->active_adcs & (1 << i))
  4032. continue;
  4033. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  4034. AC_VERB_SET_POWER_STATE,
  4035. AC_PWRST_D3);
  4036. }
  4037. }
  4038. return 0;
  4039. }
  4040. static void stac_shutup(struct hda_codec *codec)
  4041. {
  4042. struct sigmatel_spec *spec = codec->spec;
  4043. snd_hda_shutup_pins(codec);
  4044. if (spec->eapd_mask)
  4045. stac_gpio_set(codec, spec->gpio_mask,
  4046. spec->gpio_dir, spec->gpio_data &
  4047. ~spec->eapd_mask);
  4048. }
  4049. #define stac_free snd_hda_gen_free
  4050. #ifdef CONFIG_SND_PROC_FS
  4051. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  4052. struct hda_codec *codec, hda_nid_t nid)
  4053. {
  4054. if (nid == codec->core.afg)
  4055. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  4056. snd_hda_codec_read(codec, nid, 0,
  4057. AC_VERB_IDT_GET_POWER_MAP, 0));
  4058. }
  4059. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  4060. struct hda_codec *codec,
  4061. unsigned int verb)
  4062. {
  4063. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  4064. snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
  4065. }
  4066. /* stac92hd71bxx, stac92hd73xx */
  4067. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  4068. struct hda_codec *codec, hda_nid_t nid)
  4069. {
  4070. stac92hd_proc_hook(buffer, codec, nid);
  4071. if (nid == codec->core.afg)
  4072. analog_loop_proc_hook(buffer, codec, 0xfa0);
  4073. }
  4074. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  4075. struct hda_codec *codec, hda_nid_t nid)
  4076. {
  4077. if (nid == codec->core.afg)
  4078. analog_loop_proc_hook(buffer, codec, 0xfe0);
  4079. }
  4080. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  4081. struct hda_codec *codec, hda_nid_t nid)
  4082. {
  4083. if (nid == codec->core.afg)
  4084. analog_loop_proc_hook(buffer, codec, 0xfeb);
  4085. }
  4086. #else
  4087. #define stac92hd_proc_hook NULL
  4088. #define stac92hd7x_proc_hook NULL
  4089. #define stac9205_proc_hook NULL
  4090. #define stac927x_proc_hook NULL
  4091. #endif
  4092. #ifdef CONFIG_PM
  4093. static int stac_suspend(struct hda_codec *codec)
  4094. {
  4095. stac_shutup(codec);
  4096. return 0;
  4097. }
  4098. #else
  4099. #define stac_suspend NULL
  4100. #endif /* CONFIG_PM */
  4101. static const struct hda_codec_ops stac_patch_ops = {
  4102. .build_controls = snd_hda_gen_build_controls,
  4103. .build_pcms = snd_hda_gen_build_pcms,
  4104. .init = stac_init,
  4105. .free = stac_free,
  4106. .unsol_event = snd_hda_jack_unsol_event,
  4107. #ifdef CONFIG_PM
  4108. .suspend = stac_suspend,
  4109. #endif
  4110. .reboot_notify = stac_shutup,
  4111. };
  4112. static int alloc_stac_spec(struct hda_codec *codec)
  4113. {
  4114. struct sigmatel_spec *spec;
  4115. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  4116. if (!spec)
  4117. return -ENOMEM;
  4118. snd_hda_gen_spec_init(&spec->gen);
  4119. codec->spec = spec;
  4120. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  4121. spec->gen.dac_min_mute = true;
  4122. codec->patch_ops = stac_patch_ops;
  4123. return 0;
  4124. }
  4125. static int patch_stac9200(struct hda_codec *codec)
  4126. {
  4127. struct sigmatel_spec *spec;
  4128. int err;
  4129. err = alloc_stac_spec(codec);
  4130. if (err < 0)
  4131. return err;
  4132. spec = codec->spec;
  4133. spec->linear_tone_beep = 1;
  4134. spec->gen.own_eapd_ctl = 1;
  4135. codec->power_filter = snd_hda_codec_eapd_power_filter;
  4136. snd_hda_add_verbs(codec, stac9200_eapd_init);
  4137. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  4138. stac9200_fixups);
  4139. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4140. err = stac_parse_auto_config(codec);
  4141. if (err < 0) {
  4142. stac_free(codec);
  4143. return err;
  4144. }
  4145. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4146. return 0;
  4147. }
  4148. static int patch_stac925x(struct hda_codec *codec)
  4149. {
  4150. struct sigmatel_spec *spec;
  4151. int err;
  4152. err = alloc_stac_spec(codec);
  4153. if (err < 0)
  4154. return err;
  4155. spec = codec->spec;
  4156. spec->linear_tone_beep = 1;
  4157. spec->gen.own_eapd_ctl = 1;
  4158. snd_hda_add_verbs(codec, stac925x_core_init);
  4159. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  4160. stac925x_fixups);
  4161. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4162. err = stac_parse_auto_config(codec);
  4163. if (err < 0) {
  4164. stac_free(codec);
  4165. return err;
  4166. }
  4167. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4168. return 0;
  4169. }
  4170. static int patch_stac92hd73xx(struct hda_codec *codec)
  4171. {
  4172. struct sigmatel_spec *spec;
  4173. int err;
  4174. int num_dacs;
  4175. err = alloc_stac_spec(codec);
  4176. if (err < 0)
  4177. return err;
  4178. spec = codec->spec;
  4179. /* enable power_save_node only for new 92HD89xx chips, as it causes
  4180. * click noises on old 92HD73xx chips.
  4181. */
  4182. if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
  4183. codec->power_save_node = 1;
  4184. spec->linear_tone_beep = 0;
  4185. spec->gen.mixer_nid = 0x1d;
  4186. spec->have_spdif_mux = 1;
  4187. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  4188. if (num_dacs < 3 || num_dacs > 5) {
  4189. codec_warn(codec,
  4190. "Could not determine number of channels defaulting to DAC count\n");
  4191. num_dacs = 5;
  4192. }
  4193. switch (num_dacs) {
  4194. case 0x3: /* 6 Channel */
  4195. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  4196. break;
  4197. case 0x4: /* 8 Channel */
  4198. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  4199. break;
  4200. case 0x5: /* 10 Channel */
  4201. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  4202. break;
  4203. }
  4204. spec->aloopback_mask = 0x01;
  4205. spec->aloopback_shift = 8;
  4206. spec->gen.beep_nid = 0x1c; /* digital beep */
  4207. /* GPIO0 High = Enable EAPD */
  4208. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4209. spec->gpio_data = 0x01;
  4210. spec->eapd_switch = 1;
  4211. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  4212. spec->pwr_nids = stac92hd73xx_pwr_nids;
  4213. spec->gen.own_eapd_ctl = 1;
  4214. spec->gen.power_down_unused = 1;
  4215. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  4216. stac92hd73xx_fixups);
  4217. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4218. if (!spec->volknob_init)
  4219. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  4220. err = stac_parse_auto_config(codec);
  4221. if (err < 0) {
  4222. stac_free(codec);
  4223. return err;
  4224. }
  4225. /* Don't GPIO-mute speakers if there are no internal speakers, because
  4226. * the GPIO might be necessary for Headphone
  4227. */
  4228. if (spec->eapd_switch && !has_builtin_speaker(codec))
  4229. spec->eapd_switch = 0;
  4230. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4231. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4232. return 0;
  4233. }
  4234. static void stac_setup_gpio(struct hda_codec *codec)
  4235. {
  4236. struct sigmatel_spec *spec = codec->spec;
  4237. spec->gpio_mask |= spec->eapd_mask;
  4238. if (spec->gpio_led) {
  4239. if (!spec->vref_mute_led_nid) {
  4240. spec->gpio_mask |= spec->gpio_led;
  4241. spec->gpio_dir |= spec->gpio_led;
  4242. spec->gpio_data |= spec->gpio_led;
  4243. } else {
  4244. codec->power_filter = stac_vref_led_power_filter;
  4245. }
  4246. }
  4247. if (spec->mic_mute_led_gpio) {
  4248. spec->gpio_mask |= spec->mic_mute_led_gpio;
  4249. spec->gpio_dir |= spec->mic_mute_led_gpio;
  4250. spec->mic_enabled = 0;
  4251. spec->gpio_data |= spec->mic_mute_led_gpio;
  4252. spec->gen.cap_sync_hook = stac_capture_led_hook;
  4253. }
  4254. }
  4255. static int patch_stac92hd83xxx(struct hda_codec *codec)
  4256. {
  4257. struct sigmatel_spec *spec;
  4258. int err;
  4259. err = alloc_stac_spec(codec);
  4260. if (err < 0)
  4261. return err;
  4262. /* longer delay needed for D3 */
  4263. codec->core.power_caps &= ~AC_PWRST_EPSS;
  4264. spec = codec->spec;
  4265. codec->power_save_node = 1;
  4266. spec->linear_tone_beep = 0;
  4267. spec->gen.own_eapd_ctl = 1;
  4268. spec->gen.power_down_unused = 1;
  4269. spec->gen.mixer_nid = 0x1b;
  4270. spec->gen.beep_nid = 0x21; /* digital beep */
  4271. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  4272. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  4273. spec->default_polarity = -1; /* no default cfg */
  4274. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  4275. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  4276. stac92hd83xxx_fixups);
  4277. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4278. stac_setup_gpio(codec);
  4279. err = stac_parse_auto_config(codec);
  4280. if (err < 0) {
  4281. stac_free(codec);
  4282. return err;
  4283. }
  4284. codec->proc_widget_hook = stac92hd_proc_hook;
  4285. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4286. return 0;
  4287. }
  4288. static const hda_nid_t stac92hd95_pwr_nids[] = {
  4289. 0x0a, 0x0b, 0x0c, 0x0d
  4290. };
  4291. static int patch_stac92hd95(struct hda_codec *codec)
  4292. {
  4293. struct sigmatel_spec *spec;
  4294. int err;
  4295. err = alloc_stac_spec(codec);
  4296. if (err < 0)
  4297. return err;
  4298. /* longer delay needed for D3 */
  4299. codec->core.power_caps &= ~AC_PWRST_EPSS;
  4300. spec = codec->spec;
  4301. codec->power_save_node = 1;
  4302. spec->linear_tone_beep = 0;
  4303. spec->gen.own_eapd_ctl = 1;
  4304. spec->gen.power_down_unused = 1;
  4305. spec->gen.beep_nid = 0x19; /* digital beep */
  4306. spec->pwr_nids = stac92hd95_pwr_nids;
  4307. spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
  4308. spec->default_polarity = 0;
  4309. snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
  4310. stac92hd95_fixups);
  4311. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4312. stac_setup_gpio(codec);
  4313. err = stac_parse_auto_config(codec);
  4314. if (err < 0) {
  4315. stac_free(codec);
  4316. return err;
  4317. }
  4318. codec->proc_widget_hook = stac92hd_proc_hook;
  4319. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4320. return 0;
  4321. }
  4322. static int patch_stac92hd71bxx(struct hda_codec *codec)
  4323. {
  4324. struct sigmatel_spec *spec;
  4325. const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
  4326. int err;
  4327. err = alloc_stac_spec(codec);
  4328. if (err < 0)
  4329. return err;
  4330. spec = codec->spec;
  4331. /* disabled power_save_node since it causes noises on a Dell machine */
  4332. /* codec->power_save_node = 1; */
  4333. spec->linear_tone_beep = 0;
  4334. spec->gen.own_eapd_ctl = 1;
  4335. spec->gen.power_down_unused = 1;
  4336. spec->gen.mixer_nid = 0x17;
  4337. spec->have_spdif_mux = 1;
  4338. /* GPIO0 = EAPD */
  4339. spec->gpio_mask = 0x01;
  4340. spec->gpio_dir = 0x01;
  4341. spec->gpio_data = 0x01;
  4342. switch (codec->core.vendor_id) {
  4343. case 0x111d76b6: /* 4 Port without Analog Mixer */
  4344. case 0x111d76b7:
  4345. unmute_nids++;
  4346. break;
  4347. case 0x111d7608: /* 5 Port with Analog Mixer */
  4348. if ((codec->core.revision_id & 0xf) == 0 ||
  4349. (codec->core.revision_id & 0xf) == 1)
  4350. spec->stream_delay = 40; /* 40 milliseconds */
  4351. /* disable VSW */
  4352. unmute_nids++;
  4353. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  4354. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  4355. break;
  4356. case 0x111d7603: /* 6 Port with Analog Mixer */
  4357. if ((codec->core.revision_id & 0xf) == 1)
  4358. spec->stream_delay = 40; /* 40 milliseconds */
  4359. break;
  4360. }
  4361. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  4362. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  4363. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
  4364. const hda_nid_t *p;
  4365. for (p = unmute_nids; *p; p++)
  4366. snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
  4367. 0xff, 0x00);
  4368. }
  4369. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  4370. spec->aloopback_mask = 0x50;
  4371. spec->aloopback_shift = 0;
  4372. spec->powerdown_adcs = 1;
  4373. spec->gen.beep_nid = 0x26; /* digital beep */
  4374. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  4375. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  4376. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  4377. stac92hd71bxx_fixups);
  4378. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4379. stac_setup_gpio(codec);
  4380. err = stac_parse_auto_config(codec);
  4381. if (err < 0) {
  4382. stac_free(codec);
  4383. return err;
  4384. }
  4385. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4386. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4387. return 0;
  4388. }
  4389. static int patch_stac922x(struct hda_codec *codec)
  4390. {
  4391. struct sigmatel_spec *spec;
  4392. int err;
  4393. err = alloc_stac_spec(codec);
  4394. if (err < 0)
  4395. return err;
  4396. spec = codec->spec;
  4397. spec->linear_tone_beep = 1;
  4398. spec->gen.own_eapd_ctl = 1;
  4399. snd_hda_add_verbs(codec, stac922x_core_init);
  4400. /* Fix Mux capture level; max to 2 */
  4401. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  4402. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  4403. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  4404. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  4405. (0 << AC_AMPCAP_MUTE_SHIFT));
  4406. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  4407. stac922x_fixups);
  4408. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4409. err = stac_parse_auto_config(codec);
  4410. if (err < 0) {
  4411. stac_free(codec);
  4412. return err;
  4413. }
  4414. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4415. return 0;
  4416. }
  4417. static const char * const stac927x_spdif_labels[] = {
  4418. "Digital Playback", "ADAT", "Analog Mux 1",
  4419. "Analog Mux 2", "Analog Mux 3", NULL
  4420. };
  4421. static int patch_stac927x(struct hda_codec *codec)
  4422. {
  4423. struct sigmatel_spec *spec;
  4424. int err;
  4425. err = alloc_stac_spec(codec);
  4426. if (err < 0)
  4427. return err;
  4428. spec = codec->spec;
  4429. spec->linear_tone_beep = 1;
  4430. spec->gen.own_eapd_ctl = 1;
  4431. spec->have_spdif_mux = 1;
  4432. spec->spdif_labels = stac927x_spdif_labels;
  4433. spec->gen.beep_nid = 0x23; /* digital beep */
  4434. /* GPIO0 High = Enable EAPD */
  4435. spec->eapd_mask = spec->gpio_mask = 0x01;
  4436. spec->gpio_dir = spec->gpio_data = 0x01;
  4437. spec->aloopback_ctl = &stac927x_loopback;
  4438. spec->aloopback_mask = 0x40;
  4439. spec->aloopback_shift = 0;
  4440. spec->eapd_switch = 1;
  4441. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  4442. stac927x_fixups);
  4443. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4444. if (!spec->volknob_init)
  4445. snd_hda_add_verbs(codec, stac927x_core_init);
  4446. err = stac_parse_auto_config(codec);
  4447. if (err < 0) {
  4448. stac_free(codec);
  4449. return err;
  4450. }
  4451. codec->proc_widget_hook = stac927x_proc_hook;
  4452. /*
  4453. * !!FIXME!!
  4454. * The STAC927x seem to require fairly long delays for certain
  4455. * command sequences. With too short delays (even if the answer
  4456. * is set to RIRB properly), it results in the silence output
  4457. * on some hardwares like Dell.
  4458. *
  4459. * The below flag enables the longer delay (see get_response
  4460. * in hda_intel.c).
  4461. */
  4462. codec->bus->needs_damn_long_delay = 1;
  4463. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4464. return 0;
  4465. }
  4466. static int patch_stac9205(struct hda_codec *codec)
  4467. {
  4468. struct sigmatel_spec *spec;
  4469. int err;
  4470. err = alloc_stac_spec(codec);
  4471. if (err < 0)
  4472. return err;
  4473. spec = codec->spec;
  4474. spec->linear_tone_beep = 1;
  4475. spec->gen.own_eapd_ctl = 1;
  4476. spec->have_spdif_mux = 1;
  4477. spec->gen.beep_nid = 0x23; /* digital beep */
  4478. snd_hda_add_verbs(codec, stac9205_core_init);
  4479. spec->aloopback_ctl = &stac9205_loopback;
  4480. spec->aloopback_mask = 0x40;
  4481. spec->aloopback_shift = 0;
  4482. /* GPIO0 High = EAPD */
  4483. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4484. spec->gpio_data = 0x01;
  4485. /* Turn on/off EAPD per HP plugging */
  4486. spec->eapd_switch = 1;
  4487. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  4488. stac9205_fixups);
  4489. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4490. err = stac_parse_auto_config(codec);
  4491. if (err < 0) {
  4492. stac_free(codec);
  4493. return err;
  4494. }
  4495. codec->proc_widget_hook = stac9205_proc_hook;
  4496. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4497. return 0;
  4498. }
  4499. /*
  4500. * STAC9872 hack
  4501. */
  4502. static const struct hda_verb stac9872_core_init[] = {
  4503. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  4504. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  4505. {}
  4506. };
  4507. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  4508. { 0x0a, 0x03211020 },
  4509. { 0x0b, 0x411111f0 },
  4510. { 0x0c, 0x411111f0 },
  4511. { 0x0d, 0x03a15030 },
  4512. { 0x0e, 0x411111f0 },
  4513. { 0x0f, 0x90170110 },
  4514. { 0x11, 0x411111f0 },
  4515. { 0x13, 0x411111f0 },
  4516. { 0x14, 0x90a7013e },
  4517. {}
  4518. };
  4519. static const struct hda_model_fixup stac9872_models[] = {
  4520. { .id = STAC_9872_VAIO, .name = "vaio" },
  4521. {}
  4522. };
  4523. static const struct hda_fixup stac9872_fixups[] = {
  4524. [STAC_9872_VAIO] = {
  4525. .type = HDA_FIXUP_PINS,
  4526. .v.pins = stac9872_vaio_pin_configs,
  4527. },
  4528. };
  4529. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  4530. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  4531. "Sony VAIO F/S", STAC_9872_VAIO),
  4532. {} /* terminator */
  4533. };
  4534. static int patch_stac9872(struct hda_codec *codec)
  4535. {
  4536. struct sigmatel_spec *spec;
  4537. int err;
  4538. err = alloc_stac_spec(codec);
  4539. if (err < 0)
  4540. return err;
  4541. spec = codec->spec;
  4542. spec->linear_tone_beep = 1;
  4543. spec->gen.own_eapd_ctl = 1;
  4544. snd_hda_add_verbs(codec, stac9872_core_init);
  4545. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  4546. stac9872_fixups);
  4547. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4548. err = stac_parse_auto_config(codec);
  4549. if (err < 0) {
  4550. stac_free(codec);
  4551. return -EINVAL;
  4552. }
  4553. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4554. return 0;
  4555. }
  4556. /*
  4557. * patch entries
  4558. */
  4559. static const struct hda_device_id snd_hda_id_sigmatel[] = {
  4560. HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
  4561. HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
  4562. HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
  4563. HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
  4564. HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
  4565. HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
  4566. HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
  4567. HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
  4568. HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
  4569. HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
  4570. HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
  4571. HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
  4572. HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
  4573. HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
  4574. HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
  4575. HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
  4576. HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
  4577. HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
  4578. HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
  4579. HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
  4580. HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
  4581. HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
  4582. HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
  4583. HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
  4584. HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
  4585. HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
  4586. HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
  4587. HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
  4588. HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
  4589. HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
  4590. HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
  4591. HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
  4592. /* The following does not take into account .id=0x83847661 when subsys =
  4593. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  4594. * currently not fully supported.
  4595. */
  4596. HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
  4597. HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
  4598. HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
  4599. HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
  4600. HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
  4601. HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
  4602. HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
  4603. HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
  4604. HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
  4605. HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
  4606. HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
  4607. HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
  4608. HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
  4609. HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
  4610. HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
  4611. HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
  4612. HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
  4613. HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
  4614. HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
  4615. HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
  4616. HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
  4617. HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
  4618. HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
  4619. HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
  4620. HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
  4621. HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
  4622. HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
  4623. HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
  4624. HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
  4625. HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
  4626. HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
  4627. HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
  4628. HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
  4629. HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
  4630. HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
  4631. HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
  4632. HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
  4633. HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
  4634. HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
  4635. HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
  4636. HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
  4637. HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
  4638. HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
  4639. HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
  4640. HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
  4641. HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
  4642. HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
  4643. HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
  4644. HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
  4645. HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
  4646. HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
  4647. HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
  4648. HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
  4649. HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
  4650. HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
  4651. HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
  4652. HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
  4653. HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
  4654. HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
  4655. HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
  4656. HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
  4657. HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
  4658. HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
  4659. HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
  4660. HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
  4661. HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
  4662. HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
  4663. HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
  4664. {} /* terminator */
  4665. };
  4666. MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
  4667. MODULE_LICENSE("GPL");
  4668. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  4669. static struct hda_codec_driver sigmatel_driver = {
  4670. .id = snd_hda_id_sigmatel,
  4671. };
  4672. module_hda_codec_driver(sigmatel_driver);