hda_controller.h 7.3 KB

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  1. /*
  2. * Common functionality for the alsa driver code base for HD Audio.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #ifndef __SOUND_HDA_CONTROLLER_H
  15. #define __SOUND_HDA_CONTROLLER_H
  16. #include <linux/timecounter.h>
  17. #include <linux/interrupt.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/initval.h>
  21. #include "hda_codec.h"
  22. #include <sound/hda_register.h>
  23. #define AZX_MAX_CODECS HDA_MAX_CODECS
  24. #define AZX_DEFAULT_CODECS 4
  25. /* driver quirks (capabilities) */
  26. /* bits 0-7 are used for indicating driver type */
  27. #define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */
  28. #define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */
  29. #define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */
  30. #define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */
  31. #ifdef CONFIG_SND_HDA_I915
  32. #define AZX_DCAPS_I915_COMPONENT (1 << 13) /* bind with i915 gfx */
  33. #else
  34. #define AZX_DCAPS_I915_COMPONENT 0 /* NOP */
  35. #endif
  36. /* 14 unused */
  37. #define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */
  38. #define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */
  39. #define AZX_DCAPS_AMD_WORKAROUND (1 << 17) /* AMD-specific workaround */
  40. #define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */
  41. #define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */
  42. #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */
  43. #define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */
  44. /* 22 unused */
  45. #define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */
  46. /* 24 unused */
  47. #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */
  48. #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */
  49. #ifdef CONFIG_SND_HDA_I915
  50. #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
  51. #else
  52. #define AZX_DCAPS_I915_POWERWELL 0 /* NOP */
  53. #endif
  54. #define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
  55. #define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
  56. #define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
  57. enum {
  58. AZX_SNOOP_TYPE_NONE,
  59. AZX_SNOOP_TYPE_SCH,
  60. AZX_SNOOP_TYPE_ATI,
  61. AZX_SNOOP_TYPE_NVIDIA,
  62. };
  63. struct azx_dev {
  64. struct hdac_stream core;
  65. unsigned int irq_pending:1;
  66. /*
  67. * For VIA:
  68. * A flag to ensure DMA position is 0
  69. * when link position is not greater than FIFO size
  70. */
  71. unsigned int insufficient:1;
  72. unsigned int wc_marked:1;
  73. };
  74. #define azx_stream(dev) (&(dev)->core)
  75. #define stream_to_azx_dev(s) container_of(s, struct azx_dev, core)
  76. struct azx;
  77. /* Functions to read/write to hda registers. */
  78. struct hda_controller_ops {
  79. /* Disable msi if supported, PCI only */
  80. int (*disable_msi_reset_irq)(struct azx *);
  81. int (*substream_alloc_pages)(struct azx *chip,
  82. struct snd_pcm_substream *substream,
  83. size_t size);
  84. int (*substream_free_pages)(struct azx *chip,
  85. struct snd_pcm_substream *substream);
  86. void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
  87. struct vm_area_struct *area);
  88. /* Check if current position is acceptable */
  89. int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
  90. /* enable/disable the link power */
  91. int (*link_power)(struct azx *chip, bool enable);
  92. };
  93. struct azx_pcm {
  94. struct azx *chip;
  95. struct snd_pcm *pcm;
  96. struct hda_codec *codec;
  97. struct hda_pcm *info;
  98. struct list_head list;
  99. };
  100. typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
  101. typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
  102. struct azx {
  103. struct hda_bus bus;
  104. struct snd_card *card;
  105. struct pci_dev *pci;
  106. int dev_index;
  107. /* chip type specific */
  108. int driver_type;
  109. unsigned int driver_caps;
  110. int playback_streams;
  111. int playback_index_offset;
  112. int capture_streams;
  113. int capture_index_offset;
  114. int num_streams;
  115. const int *jackpoll_ms; /* per-card jack poll interval */
  116. /* Register interaction. */
  117. const struct hda_controller_ops *ops;
  118. /* position adjustment callbacks */
  119. azx_get_pos_callback_t get_position[2];
  120. azx_get_delay_callback_t get_delay[2];
  121. /* locks */
  122. struct mutex open_mutex; /* Prevents concurrent open/close operations */
  123. /* PCM */
  124. struct list_head pcm_list; /* azx_pcm list */
  125. /* HD codec */
  126. int codec_probe_mask; /* copied from probe_mask option */
  127. unsigned int beep_mode;
  128. #ifdef CONFIG_SND_HDA_PATCH_LOADER
  129. const struct firmware *fw;
  130. #endif
  131. /* flags */
  132. int bdl_pos_adj;
  133. int poll_count;
  134. unsigned int running:1;
  135. unsigned int fallback_to_single_cmd:1;
  136. unsigned int single_cmd:1;
  137. unsigned int polling_mode:1;
  138. unsigned int msi:1;
  139. unsigned int probing:1; /* codec probing phase */
  140. unsigned int snoop:1;
  141. unsigned int uc_buffer:1; /* non-cached pages for stream buffers */
  142. unsigned int align_buffer_size:1;
  143. unsigned int region_requested:1;
  144. unsigned int disabled:1; /* disabled by vga_switcheroo */
  145. /* GTS present */
  146. unsigned int gts_present:1;
  147. #ifdef CONFIG_SND_HDA_DSP_LOADER
  148. struct azx_dev saved_azx_dev;
  149. #endif
  150. };
  151. #define azx_bus(chip) (&(chip)->bus.core)
  152. #define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core)
  153. static inline bool azx_snoop(struct azx *chip)
  154. {
  155. return !IS_ENABLED(CONFIG_X86) || chip->snoop;
  156. }
  157. /*
  158. * macros for easy use
  159. */
  160. #define azx_writel(chip, reg, value) \
  161. snd_hdac_chip_writel(azx_bus(chip), reg, value)
  162. #define azx_readl(chip, reg) \
  163. snd_hdac_chip_readl(azx_bus(chip), reg)
  164. #define azx_writew(chip, reg, value) \
  165. snd_hdac_chip_writew(azx_bus(chip), reg, value)
  166. #define azx_readw(chip, reg) \
  167. snd_hdac_chip_readw(azx_bus(chip), reg)
  168. #define azx_writeb(chip, reg, value) \
  169. snd_hdac_chip_writeb(azx_bus(chip), reg, value)
  170. #define azx_readb(chip, reg) \
  171. snd_hdac_chip_readb(azx_bus(chip), reg)
  172. #define azx_has_pm_runtime(chip) \
  173. ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
  174. /* PCM setup */
  175. static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
  176. {
  177. return substream->runtime->private_data;
  178. }
  179. unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
  180. unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
  181. unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
  182. /* Stream control. */
  183. void azx_stop_all_streams(struct azx *chip);
  184. /* Allocation functions. */
  185. #define azx_alloc_stream_pages(chip) \
  186. snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
  187. #define azx_free_stream_pages(chip) \
  188. snd_hdac_bus_free_stream_pages(azx_bus(chip))
  189. /* Low level azx interface */
  190. void azx_init_chip(struct azx *chip, bool full_reset);
  191. void azx_stop_chip(struct azx *chip);
  192. #define azx_enter_link_reset(chip) \
  193. snd_hdac_bus_enter_link_reset(azx_bus(chip))
  194. irqreturn_t azx_interrupt(int irq, void *dev_id);
  195. /* Codec interface */
  196. int azx_bus_init(struct azx *chip, const char *model,
  197. const struct hdac_io_ops *io_ops);
  198. int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
  199. int azx_codec_configure(struct azx *chip);
  200. int azx_init_streams(struct azx *chip);
  201. void azx_free_streams(struct azx *chip);
  202. #endif /* __SOUND_HDA_CONTROLLER_H */