es1938.c 55 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884
  1. /*
  2. * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
  3. * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
  4. * Jaroslav Kysela <perex@perex.cz>,
  5. * Thomas Sailer <sailer@ife.ee.ethz.ch>,
  6. * Abramo Bagnara <abramo@alsa-project.org>,
  7. * Markus Gruber <gruber@eikon.tum.de>
  8. *
  9. * Rewritten from sonicvibes.c source.
  10. *
  11. * TODO:
  12. * Rewrite better spinlocks
  13. *
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. *
  29. */
  30. /*
  31. NOTES:
  32. - Capture data is written unaligned starting from dma_base + 1 so I need to
  33. disable mmap and to add a copy callback.
  34. - After several cycle of the following:
  35. while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
  36. a "playback write error (DMA or IRQ trouble?)" may happen.
  37. This is due to playback interrupts not generated.
  38. I suspect a timing issue.
  39. - Sometimes the interrupt handler is invoked wrongly during playback.
  40. This generates some harmless "Unexpected hw_pointer: wrong interrupt
  41. acknowledge".
  42. I've seen that using small period sizes.
  43. Reproducible with:
  44. mpg123 test.mp3 &
  45. hdparm -t -T /dev/hda
  46. */
  47. #include <linux/init.h>
  48. #include <linux/interrupt.h>
  49. #include <linux/pci.h>
  50. #include <linux/slab.h>
  51. #include <linux/gameport.h>
  52. #include <linux/module.h>
  53. #include <linux/delay.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/io.h>
  56. #include <sound/core.h>
  57. #include <sound/control.h>
  58. #include <sound/pcm.h>
  59. #include <sound/opl3.h>
  60. #include <sound/mpu401.h>
  61. #include <sound/initval.h>
  62. #include <sound/tlv.h>
  63. MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
  64. MODULE_DESCRIPTION("ESS Solo-1");
  65. MODULE_LICENSE("GPL");
  66. MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
  67. "{ESS,ES1946},"
  68. "{ESS,ES1969},"
  69. "{TerraTec,128i PCI}}");
  70. #if IS_REACHABLE(CONFIG_GAMEPORT)
  71. #define SUPPORT_JOYSTICK 1
  72. #endif
  73. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  74. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  75. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  76. module_param_array(index, int, NULL, 0444);
  77. MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
  78. module_param_array(id, charp, NULL, 0444);
  79. MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
  80. module_param_array(enable, bool, NULL, 0444);
  81. MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
  82. #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
  83. #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
  84. #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
  85. #define SL_PCI_LEGACYCONTROL 0x40
  86. #define SL_PCI_CONFIG 0x50
  87. #define SL_PCI_DDMACONTROL 0x60
  88. #define ESSIO_REG_AUDIO2DMAADDR 0
  89. #define ESSIO_REG_AUDIO2DMACOUNT 4
  90. #define ESSIO_REG_AUDIO2MODE 6
  91. #define ESSIO_REG_IRQCONTROL 7
  92. #define ESSDM_REG_DMAADDR 0x00
  93. #define ESSDM_REG_DMACOUNT 0x04
  94. #define ESSDM_REG_DMACOMMAND 0x08
  95. #define ESSDM_REG_DMASTATUS 0x08
  96. #define ESSDM_REG_DMAMODE 0x0b
  97. #define ESSDM_REG_DMACLEAR 0x0d
  98. #define ESSDM_REG_DMAMASK 0x0f
  99. #define ESSSB_REG_FMLOWADDR 0x00
  100. #define ESSSB_REG_FMHIGHADDR 0x02
  101. #define ESSSB_REG_MIXERADDR 0x04
  102. #define ESSSB_REG_MIXERDATA 0x05
  103. #define ESSSB_IREG_AUDIO1 0x14
  104. #define ESSSB_IREG_MICMIX 0x1a
  105. #define ESSSB_IREG_RECSRC 0x1c
  106. #define ESSSB_IREG_MASTER 0x32
  107. #define ESSSB_IREG_FM 0x36
  108. #define ESSSB_IREG_AUXACD 0x38
  109. #define ESSSB_IREG_AUXB 0x3a
  110. #define ESSSB_IREG_PCSPEAKER 0x3c
  111. #define ESSSB_IREG_LINE 0x3e
  112. #define ESSSB_IREG_SPATCONTROL 0x50
  113. #define ESSSB_IREG_SPATLEVEL 0x52
  114. #define ESSSB_IREG_MASTER_LEFT 0x60
  115. #define ESSSB_IREG_MASTER_RIGHT 0x62
  116. #define ESSSB_IREG_MPU401CONTROL 0x64
  117. #define ESSSB_IREG_MICMIXRECORD 0x68
  118. #define ESSSB_IREG_AUDIO2RECORD 0x69
  119. #define ESSSB_IREG_AUXACDRECORD 0x6a
  120. #define ESSSB_IREG_FMRECORD 0x6b
  121. #define ESSSB_IREG_AUXBRECORD 0x6c
  122. #define ESSSB_IREG_MONO 0x6d
  123. #define ESSSB_IREG_LINERECORD 0x6e
  124. #define ESSSB_IREG_MONORECORD 0x6f
  125. #define ESSSB_IREG_AUDIO2SAMPLE 0x70
  126. #define ESSSB_IREG_AUDIO2MODE 0x71
  127. #define ESSSB_IREG_AUDIO2FILTER 0x72
  128. #define ESSSB_IREG_AUDIO2TCOUNTL 0x74
  129. #define ESSSB_IREG_AUDIO2TCOUNTH 0x76
  130. #define ESSSB_IREG_AUDIO2CONTROL1 0x78
  131. #define ESSSB_IREG_AUDIO2CONTROL2 0x7a
  132. #define ESSSB_IREG_AUDIO2 0x7c
  133. #define ESSSB_REG_RESET 0x06
  134. #define ESSSB_REG_READDATA 0x0a
  135. #define ESSSB_REG_WRITEDATA 0x0c
  136. #define ESSSB_REG_READSTATUS 0x0c
  137. #define ESSSB_REG_STATUS 0x0e
  138. #define ESS_CMD_EXTSAMPLERATE 0xa1
  139. #define ESS_CMD_FILTERDIV 0xa2
  140. #define ESS_CMD_DMACNTRELOADL 0xa4
  141. #define ESS_CMD_DMACNTRELOADH 0xa5
  142. #define ESS_CMD_ANALOGCONTROL 0xa8
  143. #define ESS_CMD_IRQCONTROL 0xb1
  144. #define ESS_CMD_DRQCONTROL 0xb2
  145. #define ESS_CMD_RECLEVEL 0xb4
  146. #define ESS_CMD_SETFORMAT 0xb6
  147. #define ESS_CMD_SETFORMAT2 0xb7
  148. #define ESS_CMD_DMACONTROL 0xb8
  149. #define ESS_CMD_DMATYPE 0xb9
  150. #define ESS_CMD_OFFSETLEFT 0xba
  151. #define ESS_CMD_OFFSETRIGHT 0xbb
  152. #define ESS_CMD_READREG 0xc0
  153. #define ESS_CMD_ENABLEEXT 0xc6
  154. #define ESS_CMD_PAUSEDMA 0xd0
  155. #define ESS_CMD_ENABLEAUDIO1 0xd1
  156. #define ESS_CMD_STOPAUDIO1 0xd3
  157. #define ESS_CMD_AUDIO1STATUS 0xd8
  158. #define ESS_CMD_CONTDMA 0xd4
  159. #define ESS_CMD_TESTIRQ 0xf2
  160. #define ESS_RECSRC_MIC 0
  161. #define ESS_RECSRC_AUXACD 2
  162. #define ESS_RECSRC_AUXB 5
  163. #define ESS_RECSRC_LINE 6
  164. #define ESS_RECSRC_NONE 7
  165. #define DAC1 0x01
  166. #define ADC1 0x02
  167. #define DAC2 0x04
  168. /*
  169. */
  170. #define SAVED_REG_SIZE 32 /* max. number of registers to save */
  171. struct es1938 {
  172. int irq;
  173. unsigned long io_port;
  174. unsigned long sb_port;
  175. unsigned long vc_port;
  176. unsigned long mpu_port;
  177. unsigned long game_port;
  178. unsigned long ddma_port;
  179. unsigned char irqmask;
  180. unsigned char revision;
  181. struct snd_kcontrol *hw_volume;
  182. struct snd_kcontrol *hw_switch;
  183. struct snd_kcontrol *master_volume;
  184. struct snd_kcontrol *master_switch;
  185. struct pci_dev *pci;
  186. struct snd_card *card;
  187. struct snd_pcm *pcm;
  188. struct snd_pcm_substream *capture_substream;
  189. struct snd_pcm_substream *playback1_substream;
  190. struct snd_pcm_substream *playback2_substream;
  191. struct snd_rawmidi *rmidi;
  192. unsigned int dma1_size;
  193. unsigned int dma2_size;
  194. unsigned int dma1_start;
  195. unsigned int dma2_start;
  196. unsigned int dma1_shift;
  197. unsigned int dma2_shift;
  198. unsigned int last_capture_dmaaddr;
  199. unsigned int active;
  200. spinlock_t reg_lock;
  201. spinlock_t mixer_lock;
  202. struct snd_info_entry *proc_entry;
  203. #ifdef SUPPORT_JOYSTICK
  204. struct gameport *gameport;
  205. #endif
  206. #ifdef CONFIG_PM_SLEEP
  207. unsigned char saved_regs[SAVED_REG_SIZE];
  208. #endif
  209. };
  210. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
  211. static const struct pci_device_id snd_es1938_ids[] = {
  212. { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
  213. { 0, }
  214. };
  215. MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
  216. #define RESET_LOOP_TIMEOUT 0x10000
  217. #define WRITE_LOOP_TIMEOUT 0x10000
  218. #define GET_LOOP_TIMEOUT 0x01000
  219. /* -----------------------------------------------------------------
  220. * Write to a mixer register
  221. * -----------------------------------------------------------------*/
  222. static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
  223. {
  224. unsigned long flags;
  225. spin_lock_irqsave(&chip->mixer_lock, flags);
  226. outb(reg, SLSB_REG(chip, MIXERADDR));
  227. outb(val, SLSB_REG(chip, MIXERDATA));
  228. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  229. dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
  230. }
  231. /* -----------------------------------------------------------------
  232. * Read from a mixer register
  233. * -----------------------------------------------------------------*/
  234. static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
  235. {
  236. int data;
  237. unsigned long flags;
  238. spin_lock_irqsave(&chip->mixer_lock, flags);
  239. outb(reg, SLSB_REG(chip, MIXERADDR));
  240. data = inb(SLSB_REG(chip, MIXERDATA));
  241. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  242. dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
  243. return data;
  244. }
  245. /* -----------------------------------------------------------------
  246. * Write to some bits of a mixer register (return old value)
  247. * -----------------------------------------------------------------*/
  248. static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
  249. unsigned char mask, unsigned char val)
  250. {
  251. unsigned long flags;
  252. unsigned char old, new, oval;
  253. spin_lock_irqsave(&chip->mixer_lock, flags);
  254. outb(reg, SLSB_REG(chip, MIXERADDR));
  255. old = inb(SLSB_REG(chip, MIXERDATA));
  256. oval = old & mask;
  257. if (val != oval) {
  258. new = (old & ~mask) | (val & mask);
  259. outb(new, SLSB_REG(chip, MIXERDATA));
  260. dev_dbg(chip->card->dev,
  261. "Mixer reg %02x was %02x, set to %02x\n",
  262. reg, old, new);
  263. }
  264. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  265. return oval;
  266. }
  267. /* -----------------------------------------------------------------
  268. * Write command to Controller Registers
  269. * -----------------------------------------------------------------*/
  270. static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
  271. {
  272. int i;
  273. unsigned char v;
  274. for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
  275. if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
  276. outb(cmd, SLSB_REG(chip, WRITEDATA));
  277. return;
  278. }
  279. }
  280. dev_err(chip->card->dev,
  281. "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
  282. }
  283. /* -----------------------------------------------------------------
  284. * Read the Read Data Buffer
  285. * -----------------------------------------------------------------*/
  286. static int snd_es1938_get_byte(struct es1938 *chip)
  287. {
  288. int i;
  289. unsigned char v;
  290. for (i = GET_LOOP_TIMEOUT; i; i--)
  291. if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
  292. return inb(SLSB_REG(chip, READDATA));
  293. dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
  294. return -ENODEV;
  295. }
  296. /* -----------------------------------------------------------------
  297. * Write value cmd register
  298. * -----------------------------------------------------------------*/
  299. static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
  300. {
  301. unsigned long flags;
  302. spin_lock_irqsave(&chip->reg_lock, flags);
  303. snd_es1938_write_cmd(chip, reg);
  304. snd_es1938_write_cmd(chip, val);
  305. spin_unlock_irqrestore(&chip->reg_lock, flags);
  306. dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
  307. }
  308. /* -----------------------------------------------------------------
  309. * Read data from cmd register and return it
  310. * -----------------------------------------------------------------*/
  311. static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
  312. {
  313. unsigned char val;
  314. unsigned long flags;
  315. spin_lock_irqsave(&chip->reg_lock, flags);
  316. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  317. snd_es1938_write_cmd(chip, reg);
  318. val = snd_es1938_get_byte(chip);
  319. spin_unlock_irqrestore(&chip->reg_lock, flags);
  320. dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
  321. return val;
  322. }
  323. /* -----------------------------------------------------------------
  324. * Write data to cmd register and return old value
  325. * -----------------------------------------------------------------*/
  326. static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
  327. unsigned char val)
  328. {
  329. unsigned long flags;
  330. unsigned char old, new, oval;
  331. spin_lock_irqsave(&chip->reg_lock, flags);
  332. snd_es1938_write_cmd(chip, ESS_CMD_READREG);
  333. snd_es1938_write_cmd(chip, reg);
  334. old = snd_es1938_get_byte(chip);
  335. oval = old & mask;
  336. if (val != oval) {
  337. snd_es1938_write_cmd(chip, reg);
  338. new = (old & ~mask) | (val & mask);
  339. snd_es1938_write_cmd(chip, new);
  340. dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
  341. reg, old, new);
  342. }
  343. spin_unlock_irqrestore(&chip->reg_lock, flags);
  344. return oval;
  345. }
  346. /* --------------------------------------------------------------------
  347. * Reset the chip
  348. * --------------------------------------------------------------------*/
  349. static void snd_es1938_reset(struct es1938 *chip)
  350. {
  351. int i;
  352. outb(3, SLSB_REG(chip, RESET));
  353. inb(SLSB_REG(chip, RESET));
  354. outb(0, SLSB_REG(chip, RESET));
  355. for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
  356. if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
  357. if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
  358. goto __next;
  359. }
  360. }
  361. dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
  362. __next:
  363. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
  364. /* Demand transfer DMA: 4 bytes per DMA request */
  365. snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
  366. /* Change behaviour of register A1
  367. 4x oversampling
  368. 2nd channel DAC asynchronous */
  369. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
  370. /* enable/select DMA channel and IRQ channel */
  371. snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
  372. snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
  373. snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
  374. /* Set spatializer parameters to recommended values */
  375. snd_es1938_mixer_write(chip, 0x54, 0x8f);
  376. snd_es1938_mixer_write(chip, 0x56, 0x95);
  377. snd_es1938_mixer_write(chip, 0x58, 0x94);
  378. snd_es1938_mixer_write(chip, 0x5a, 0x80);
  379. }
  380. /* --------------------------------------------------------------------
  381. * Reset the FIFOs
  382. * --------------------------------------------------------------------*/
  383. static void snd_es1938_reset_fifo(struct es1938 *chip)
  384. {
  385. outb(2, SLSB_REG(chip, RESET));
  386. outb(0, SLSB_REG(chip, RESET));
  387. }
  388. static const struct snd_ratnum clocks[2] = {
  389. {
  390. .num = 793800,
  391. .den_min = 1,
  392. .den_max = 128,
  393. .den_step = 1,
  394. },
  395. {
  396. .num = 768000,
  397. .den_min = 1,
  398. .den_max = 128,
  399. .den_step = 1,
  400. }
  401. };
  402. static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
  403. .nrats = 2,
  404. .rats = clocks,
  405. };
  406. static void snd_es1938_rate_set(struct es1938 *chip,
  407. struct snd_pcm_substream *substream,
  408. int mode)
  409. {
  410. unsigned int bits, div0;
  411. struct snd_pcm_runtime *runtime = substream->runtime;
  412. if (runtime->rate_num == clocks[0].num)
  413. bits = 128 - runtime->rate_den;
  414. else
  415. bits = 256 - runtime->rate_den;
  416. /* set filter register */
  417. div0 = 256 - 7160000*20/(8*82*runtime->rate);
  418. if (mode == DAC2) {
  419. snd_es1938_mixer_write(chip, 0x70, bits);
  420. snd_es1938_mixer_write(chip, 0x72, div0);
  421. } else {
  422. snd_es1938_write(chip, 0xA1, bits);
  423. snd_es1938_write(chip, 0xA2, div0);
  424. }
  425. }
  426. /* --------------------------------------------------------------------
  427. * Configure Solo1 builtin DMA Controller
  428. * --------------------------------------------------------------------*/
  429. static void snd_es1938_playback1_setdma(struct es1938 *chip)
  430. {
  431. outb(0x00, SLIO_REG(chip, AUDIO2MODE));
  432. outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
  433. outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
  434. outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
  435. }
  436. static void snd_es1938_playback2_setdma(struct es1938 *chip)
  437. {
  438. /* Enable DMA controller */
  439. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  440. /* 1. Master reset */
  441. outb(0, SLDM_REG(chip, DMACLEAR));
  442. /* 2. Mask DMA */
  443. outb(1, SLDM_REG(chip, DMAMASK));
  444. outb(0x18, SLDM_REG(chip, DMAMODE));
  445. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  446. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  447. /* 3. Unmask DMA */
  448. outb(0, SLDM_REG(chip, DMAMASK));
  449. }
  450. static void snd_es1938_capture_setdma(struct es1938 *chip)
  451. {
  452. /* Enable DMA controller */
  453. outb(0xc4, SLDM_REG(chip, DMACOMMAND));
  454. /* 1. Master reset */
  455. outb(0, SLDM_REG(chip, DMACLEAR));
  456. /* 2. Mask DMA */
  457. outb(1, SLDM_REG(chip, DMAMASK));
  458. outb(0x14, SLDM_REG(chip, DMAMODE));
  459. outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
  460. chip->last_capture_dmaaddr = chip->dma1_start;
  461. outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
  462. /* 3. Unmask DMA */
  463. outb(0, SLDM_REG(chip, DMAMASK));
  464. }
  465. /* ----------------------------------------------------------------------
  466. *
  467. * *** PCM part ***
  468. */
  469. static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
  470. int cmd)
  471. {
  472. struct es1938 *chip = snd_pcm_substream_chip(substream);
  473. int val;
  474. switch (cmd) {
  475. case SNDRV_PCM_TRIGGER_START:
  476. case SNDRV_PCM_TRIGGER_RESUME:
  477. val = 0x0f;
  478. chip->active |= ADC1;
  479. break;
  480. case SNDRV_PCM_TRIGGER_STOP:
  481. case SNDRV_PCM_TRIGGER_SUSPEND:
  482. val = 0x00;
  483. chip->active &= ~ADC1;
  484. break;
  485. default:
  486. return -EINVAL;
  487. }
  488. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  489. return 0;
  490. }
  491. static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
  492. int cmd)
  493. {
  494. struct es1938 *chip = snd_pcm_substream_chip(substream);
  495. switch (cmd) {
  496. case SNDRV_PCM_TRIGGER_START:
  497. case SNDRV_PCM_TRIGGER_RESUME:
  498. /* According to the documentation this should be:
  499. 0x13 but that value may randomly swap stereo channels */
  500. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
  501. udelay(10);
  502. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
  503. /* This two stage init gives the FIFO -> DAC connection time to
  504. * settle before first data from DMA flows in. This should ensure
  505. * no swapping of stereo channels. Report a bug if otherwise :-) */
  506. outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
  507. chip->active |= DAC2;
  508. break;
  509. case SNDRV_PCM_TRIGGER_STOP:
  510. case SNDRV_PCM_TRIGGER_SUSPEND:
  511. outb(0, SLIO_REG(chip, AUDIO2MODE));
  512. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
  513. chip->active &= ~DAC2;
  514. break;
  515. default:
  516. return -EINVAL;
  517. }
  518. return 0;
  519. }
  520. static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
  521. int cmd)
  522. {
  523. struct es1938 *chip = snd_pcm_substream_chip(substream);
  524. int val;
  525. switch (cmd) {
  526. case SNDRV_PCM_TRIGGER_START:
  527. case SNDRV_PCM_TRIGGER_RESUME:
  528. val = 5;
  529. chip->active |= DAC1;
  530. break;
  531. case SNDRV_PCM_TRIGGER_STOP:
  532. case SNDRV_PCM_TRIGGER_SUSPEND:
  533. val = 0;
  534. chip->active &= ~DAC1;
  535. break;
  536. default:
  537. return -EINVAL;
  538. }
  539. snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
  540. return 0;
  541. }
  542. static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
  543. int cmd)
  544. {
  545. switch (substream->number) {
  546. case 0:
  547. return snd_es1938_playback1_trigger(substream, cmd);
  548. case 1:
  549. return snd_es1938_playback2_trigger(substream, cmd);
  550. }
  551. snd_BUG();
  552. return -EINVAL;
  553. }
  554. /* --------------------------------------------------------------------
  555. * First channel for Extended Mode Audio 1 ADC Operation
  556. * --------------------------------------------------------------------*/
  557. static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
  558. {
  559. struct es1938 *chip = snd_pcm_substream_chip(substream);
  560. struct snd_pcm_runtime *runtime = substream->runtime;
  561. int u, is8, mono;
  562. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  563. unsigned int count = snd_pcm_lib_period_bytes(substream);
  564. chip->dma1_size = size;
  565. chip->dma1_start = runtime->dma_addr;
  566. mono = (runtime->channels > 1) ? 0 : 1;
  567. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  568. u = snd_pcm_format_unsigned(runtime->format);
  569. chip->dma1_shift = 2 - mono - is8;
  570. snd_es1938_reset_fifo(chip);
  571. /* program type */
  572. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  573. /* set clock and counters */
  574. snd_es1938_rate_set(chip, substream, ADC1);
  575. count = 0x10000 - count;
  576. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  577. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  578. /* initialize and configure ADC */
  579. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
  580. snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
  581. (u ? 0x00 : 0x20) |
  582. (is8 ? 0x00 : 0x04) |
  583. (mono ? 0x40 : 0x08));
  584. // snd_es1938_reset_fifo(chip);
  585. /* 11. configure system interrupt controller and DMA controller */
  586. snd_es1938_capture_setdma(chip);
  587. return 0;
  588. }
  589. /* ------------------------------------------------------------------------------
  590. * Second Audio channel DAC Operation
  591. * ------------------------------------------------------------------------------*/
  592. static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
  593. {
  594. struct es1938 *chip = snd_pcm_substream_chip(substream);
  595. struct snd_pcm_runtime *runtime = substream->runtime;
  596. int u, is8, mono;
  597. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  598. unsigned int count = snd_pcm_lib_period_bytes(substream);
  599. chip->dma2_size = size;
  600. chip->dma2_start = runtime->dma_addr;
  601. mono = (runtime->channels > 1) ? 0 : 1;
  602. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  603. u = snd_pcm_format_unsigned(runtime->format);
  604. chip->dma2_shift = 2 - mono - is8;
  605. snd_es1938_reset_fifo(chip);
  606. /* set clock and counters */
  607. snd_es1938_rate_set(chip, substream, DAC2);
  608. count >>= 1;
  609. count = 0x10000 - count;
  610. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
  611. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
  612. /* initialize and configure Audio 2 DAC */
  613. snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
  614. (mono ? 0 : 2) | (is8 ? 0 : 1));
  615. /* program DMA */
  616. snd_es1938_playback1_setdma(chip);
  617. return 0;
  618. }
  619. static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
  620. {
  621. struct es1938 *chip = snd_pcm_substream_chip(substream);
  622. struct snd_pcm_runtime *runtime = substream->runtime;
  623. int u, is8, mono;
  624. unsigned int size = snd_pcm_lib_buffer_bytes(substream);
  625. unsigned int count = snd_pcm_lib_period_bytes(substream);
  626. chip->dma1_size = size;
  627. chip->dma1_start = runtime->dma_addr;
  628. mono = (runtime->channels > 1) ? 0 : 1;
  629. is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
  630. u = snd_pcm_format_unsigned(runtime->format);
  631. chip->dma1_shift = 2 - mono - is8;
  632. count = 0x10000 - count;
  633. /* reset */
  634. snd_es1938_reset_fifo(chip);
  635. snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
  636. /* set clock and counters */
  637. snd_es1938_rate_set(chip, substream, DAC1);
  638. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
  639. snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
  640. /* initialized and configure DAC */
  641. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
  642. snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
  643. snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
  644. 0x90 | (mono ? 0x40 : 0x08) |
  645. (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
  646. /* program DMA */
  647. snd_es1938_playback2_setdma(chip);
  648. return 0;
  649. }
  650. static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
  651. {
  652. switch (substream->number) {
  653. case 0:
  654. return snd_es1938_playback1_prepare(substream);
  655. case 1:
  656. return snd_es1938_playback2_prepare(substream);
  657. }
  658. snd_BUG();
  659. return -EINVAL;
  660. }
  661. /* during the incrementing of dma counters the DMA register reads sometimes
  662. returns garbage. To ensure a valid hw pointer, the following checks which
  663. should be very unlikely to fail are used:
  664. - is the current DMA address in the valid DMA range ?
  665. - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
  666. One can argue this could differ by one byte depending on which register is
  667. updated first, so the implementation below allows for that.
  668. */
  669. static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
  670. {
  671. struct es1938 *chip = snd_pcm_substream_chip(substream);
  672. size_t ptr;
  673. #if 0
  674. size_t old, new;
  675. /* This stuff is *needed*, don't ask why - AB */
  676. old = inw(SLDM_REG(chip, DMACOUNT));
  677. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  678. old = new;
  679. ptr = chip->dma1_size - 1 - new;
  680. #else
  681. size_t count;
  682. unsigned int diff;
  683. ptr = inl(SLDM_REG(chip, DMAADDR));
  684. count = inw(SLDM_REG(chip, DMACOUNT));
  685. diff = chip->dma1_start + chip->dma1_size - ptr - count;
  686. if (diff > 3 || ptr < chip->dma1_start
  687. || ptr >= chip->dma1_start+chip->dma1_size)
  688. ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
  689. else
  690. chip->last_capture_dmaaddr = ptr; /* good, remember it */
  691. ptr -= chip->dma1_start;
  692. #endif
  693. return ptr >> chip->dma1_shift;
  694. }
  695. static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
  696. {
  697. struct es1938 *chip = snd_pcm_substream_chip(substream);
  698. size_t ptr;
  699. #if 1
  700. ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
  701. #else
  702. ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
  703. #endif
  704. return ptr >> chip->dma2_shift;
  705. }
  706. static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
  707. {
  708. struct es1938 *chip = snd_pcm_substream_chip(substream);
  709. size_t ptr;
  710. size_t old, new;
  711. #if 1
  712. /* This stuff is *needed*, don't ask why - AB */
  713. old = inw(SLDM_REG(chip, DMACOUNT));
  714. while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
  715. old = new;
  716. ptr = chip->dma1_size - 1 - new;
  717. #else
  718. ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
  719. #endif
  720. return ptr >> chip->dma1_shift;
  721. }
  722. static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
  723. {
  724. switch (substream->number) {
  725. case 0:
  726. return snd_es1938_playback1_pointer(substream);
  727. case 1:
  728. return snd_es1938_playback2_pointer(substream);
  729. }
  730. snd_BUG();
  731. return -EINVAL;
  732. }
  733. static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
  734. int channel, unsigned long pos,
  735. void __user *dst, unsigned long count)
  736. {
  737. struct snd_pcm_runtime *runtime = substream->runtime;
  738. struct es1938 *chip = snd_pcm_substream_chip(substream);
  739. if (snd_BUG_ON(pos + count > chip->dma1_size))
  740. return -EINVAL;
  741. if (pos + count < chip->dma1_size) {
  742. if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
  743. return -EFAULT;
  744. } else {
  745. if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
  746. return -EFAULT;
  747. if (put_user(runtime->dma_area[0],
  748. ((unsigned char __user *)dst) + count - 1))
  749. return -EFAULT;
  750. }
  751. return 0;
  752. }
  753. static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
  754. int channel, unsigned long pos,
  755. void *dst, unsigned long count)
  756. {
  757. struct snd_pcm_runtime *runtime = substream->runtime;
  758. struct es1938 *chip = snd_pcm_substream_chip(substream);
  759. if (snd_BUG_ON(pos + count > chip->dma1_size))
  760. return -EINVAL;
  761. if (pos + count < chip->dma1_size) {
  762. memcpy(dst, runtime->dma_area + pos + 1, count);
  763. } else {
  764. memcpy(dst, runtime->dma_area + pos + 1, count - 1);
  765. runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
  766. }
  767. return 0;
  768. }
  769. /*
  770. * buffer management
  771. */
  772. static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
  773. struct snd_pcm_hw_params *hw_params)
  774. {
  775. int err;
  776. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  777. return err;
  778. return 0;
  779. }
  780. static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
  781. {
  782. return snd_pcm_lib_free_pages(substream);
  783. }
  784. /* ----------------------------------------------------------------------
  785. * Audio1 Capture (ADC)
  786. * ----------------------------------------------------------------------*/
  787. static const struct snd_pcm_hardware snd_es1938_capture =
  788. {
  789. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  790. SNDRV_PCM_INFO_BLOCK_TRANSFER),
  791. .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  792. SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
  793. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  794. .rate_min = 6000,
  795. .rate_max = 48000,
  796. .channels_min = 1,
  797. .channels_max = 2,
  798. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  799. .period_bytes_min = 64,
  800. .period_bytes_max = 0x8000,
  801. .periods_min = 1,
  802. .periods_max = 1024,
  803. .fifo_size = 256,
  804. };
  805. /* -----------------------------------------------------------------------
  806. * Audio2 Playback (DAC)
  807. * -----------------------------------------------------------------------*/
  808. static const struct snd_pcm_hardware snd_es1938_playback =
  809. {
  810. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  811. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  812. SNDRV_PCM_INFO_MMAP_VALID),
  813. .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  814. SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
  815. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  816. .rate_min = 6000,
  817. .rate_max = 48000,
  818. .channels_min = 1,
  819. .channels_max = 2,
  820. .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
  821. .period_bytes_min = 64,
  822. .period_bytes_max = 0x8000,
  823. .periods_min = 1,
  824. .periods_max = 1024,
  825. .fifo_size = 256,
  826. };
  827. static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
  828. {
  829. struct es1938 *chip = snd_pcm_substream_chip(substream);
  830. struct snd_pcm_runtime *runtime = substream->runtime;
  831. if (chip->playback2_substream)
  832. return -EAGAIN;
  833. chip->capture_substream = substream;
  834. runtime->hw = snd_es1938_capture;
  835. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  836. &hw_constraints_clocks);
  837. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  838. return 0;
  839. }
  840. static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
  841. {
  842. struct es1938 *chip = snd_pcm_substream_chip(substream);
  843. struct snd_pcm_runtime *runtime = substream->runtime;
  844. switch (substream->number) {
  845. case 0:
  846. chip->playback1_substream = substream;
  847. break;
  848. case 1:
  849. if (chip->capture_substream)
  850. return -EAGAIN;
  851. chip->playback2_substream = substream;
  852. break;
  853. default:
  854. snd_BUG();
  855. return -EINVAL;
  856. }
  857. runtime->hw = snd_es1938_playback;
  858. snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  859. &hw_constraints_clocks);
  860. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
  861. return 0;
  862. }
  863. static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
  864. {
  865. struct es1938 *chip = snd_pcm_substream_chip(substream);
  866. chip->capture_substream = NULL;
  867. return 0;
  868. }
  869. static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
  870. {
  871. struct es1938 *chip = snd_pcm_substream_chip(substream);
  872. switch (substream->number) {
  873. case 0:
  874. chip->playback1_substream = NULL;
  875. break;
  876. case 1:
  877. chip->playback2_substream = NULL;
  878. break;
  879. default:
  880. snd_BUG();
  881. return -EINVAL;
  882. }
  883. return 0;
  884. }
  885. static const struct snd_pcm_ops snd_es1938_playback_ops = {
  886. .open = snd_es1938_playback_open,
  887. .close = snd_es1938_playback_close,
  888. .ioctl = snd_pcm_lib_ioctl,
  889. .hw_params = snd_es1938_pcm_hw_params,
  890. .hw_free = snd_es1938_pcm_hw_free,
  891. .prepare = snd_es1938_playback_prepare,
  892. .trigger = snd_es1938_playback_trigger,
  893. .pointer = snd_es1938_playback_pointer,
  894. };
  895. static const struct snd_pcm_ops snd_es1938_capture_ops = {
  896. .open = snd_es1938_capture_open,
  897. .close = snd_es1938_capture_close,
  898. .ioctl = snd_pcm_lib_ioctl,
  899. .hw_params = snd_es1938_pcm_hw_params,
  900. .hw_free = snd_es1938_pcm_hw_free,
  901. .prepare = snd_es1938_capture_prepare,
  902. .trigger = snd_es1938_capture_trigger,
  903. .pointer = snd_es1938_capture_pointer,
  904. .copy_user = snd_es1938_capture_copy,
  905. .copy_kernel = snd_es1938_capture_copy_kernel,
  906. };
  907. static int snd_es1938_new_pcm(struct es1938 *chip, int device)
  908. {
  909. struct snd_pcm *pcm;
  910. int err;
  911. if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
  912. return err;
  913. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
  914. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
  915. pcm->private_data = chip;
  916. pcm->info_flags = 0;
  917. strcpy(pcm->name, "ESS Solo-1");
  918. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  919. snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
  920. chip->pcm = pcm;
  921. return 0;
  922. }
  923. /* -------------------------------------------------------------------
  924. *
  925. * *** Mixer part ***
  926. */
  927. static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
  928. struct snd_ctl_elem_info *uinfo)
  929. {
  930. static const char * const texts[8] = {
  931. "Mic", "Mic Master", "CD", "AOUT",
  932. "Mic1", "Mix", "Line", "Master"
  933. };
  934. return snd_ctl_enum_info(uinfo, 1, 8, texts);
  935. }
  936. static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  940. ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
  941. return 0;
  942. }
  943. static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
  944. struct snd_ctl_elem_value *ucontrol)
  945. {
  946. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  947. unsigned char val = ucontrol->value.enumerated.item[0];
  948. if (val > 7)
  949. return -EINVAL;
  950. return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
  951. }
  952. #define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
  953. static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
  954. struct snd_ctl_elem_value *ucontrol)
  955. {
  956. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  957. unsigned char val = snd_es1938_mixer_read(chip, 0x50);
  958. ucontrol->value.integer.value[0] = !!(val & 8);
  959. return 0;
  960. }
  961. static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
  962. struct snd_ctl_elem_value *ucontrol)
  963. {
  964. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  965. unsigned char oval, nval;
  966. int change;
  967. nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
  968. oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
  969. change = nval != oval;
  970. if (change) {
  971. snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
  972. snd_es1938_mixer_write(chip, 0x50, nval);
  973. }
  974. return change;
  975. }
  976. static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
  977. struct snd_ctl_elem_info *uinfo)
  978. {
  979. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  980. uinfo->count = 2;
  981. uinfo->value.integer.min = 0;
  982. uinfo->value.integer.max = 63;
  983. return 0;
  984. }
  985. static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
  986. struct snd_ctl_elem_value *ucontrol)
  987. {
  988. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  989. ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
  990. ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
  991. return 0;
  992. }
  993. #define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
  994. static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
  995. struct snd_ctl_elem_value *ucontrol)
  996. {
  997. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  998. ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
  999. ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
  1000. return 0;
  1001. }
  1002. static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
  1003. {
  1004. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1005. chip->master_volume = NULL;
  1006. chip->master_switch = NULL;
  1007. chip->hw_volume = NULL;
  1008. chip->hw_switch = NULL;
  1009. }
  1010. static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
  1011. unsigned char mask, unsigned char val)
  1012. {
  1013. if (reg < 0xa0)
  1014. return snd_es1938_mixer_bits(chip, reg, mask, val);
  1015. else
  1016. return snd_es1938_bits(chip, reg, mask, val);
  1017. }
  1018. static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
  1019. {
  1020. if (reg < 0xa0)
  1021. return snd_es1938_mixer_read(chip, reg);
  1022. else
  1023. return snd_es1938_read(chip, reg);
  1024. }
  1025. #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
  1026. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1027. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
  1028. .name = xname, .index = xindex, \
  1029. .info = snd_es1938_info_single, \
  1030. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  1031. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  1032. .tlv = { .p = xtlv } }
  1033. #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
  1034. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1035. .info = snd_es1938_info_single, \
  1036. .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
  1037. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  1038. static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
  1039. struct snd_ctl_elem_info *uinfo)
  1040. {
  1041. int mask = (kcontrol->private_value >> 16) & 0xff;
  1042. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1043. uinfo->count = 1;
  1044. uinfo->value.integer.min = 0;
  1045. uinfo->value.integer.max = mask;
  1046. return 0;
  1047. }
  1048. static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
  1049. struct snd_ctl_elem_value *ucontrol)
  1050. {
  1051. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1052. int reg = kcontrol->private_value & 0xff;
  1053. int shift = (kcontrol->private_value >> 8) & 0xff;
  1054. int mask = (kcontrol->private_value >> 16) & 0xff;
  1055. int invert = (kcontrol->private_value >> 24) & 0xff;
  1056. int val;
  1057. val = snd_es1938_reg_read(chip, reg);
  1058. ucontrol->value.integer.value[0] = (val >> shift) & mask;
  1059. if (invert)
  1060. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1061. return 0;
  1062. }
  1063. static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
  1064. struct snd_ctl_elem_value *ucontrol)
  1065. {
  1066. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1067. int reg = kcontrol->private_value & 0xff;
  1068. int shift = (kcontrol->private_value >> 8) & 0xff;
  1069. int mask = (kcontrol->private_value >> 16) & 0xff;
  1070. int invert = (kcontrol->private_value >> 24) & 0xff;
  1071. unsigned char val;
  1072. val = (ucontrol->value.integer.value[0] & mask);
  1073. if (invert)
  1074. val = mask - val;
  1075. mask <<= shift;
  1076. val <<= shift;
  1077. return snd_es1938_reg_bits(chip, reg, mask, val) != val;
  1078. }
  1079. #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
  1080. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1081. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
  1082. .name = xname, .index = xindex, \
  1083. .info = snd_es1938_info_double, \
  1084. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1085. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
  1086. .tlv = { .p = xtlv } }
  1087. #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  1088. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1089. .info = snd_es1938_info_double, \
  1090. .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
  1091. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  1092. static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
  1093. struct snd_ctl_elem_info *uinfo)
  1094. {
  1095. int mask = (kcontrol->private_value >> 24) & 0xff;
  1096. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  1097. uinfo->count = 2;
  1098. uinfo->value.integer.min = 0;
  1099. uinfo->value.integer.max = mask;
  1100. return 0;
  1101. }
  1102. static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
  1103. struct snd_ctl_elem_value *ucontrol)
  1104. {
  1105. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1106. int left_reg = kcontrol->private_value & 0xff;
  1107. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1108. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1109. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1110. int mask = (kcontrol->private_value >> 24) & 0xff;
  1111. int invert = (kcontrol->private_value >> 22) & 1;
  1112. unsigned char left, right;
  1113. left = snd_es1938_reg_read(chip, left_reg);
  1114. if (left_reg != right_reg)
  1115. right = snd_es1938_reg_read(chip, right_reg);
  1116. else
  1117. right = left;
  1118. ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
  1119. ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
  1120. if (invert) {
  1121. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  1122. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  1123. }
  1124. return 0;
  1125. }
  1126. static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
  1127. struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. struct es1938 *chip = snd_kcontrol_chip(kcontrol);
  1130. int left_reg = kcontrol->private_value & 0xff;
  1131. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  1132. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  1133. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  1134. int mask = (kcontrol->private_value >> 24) & 0xff;
  1135. int invert = (kcontrol->private_value >> 22) & 1;
  1136. int change;
  1137. unsigned char val1, val2, mask1, mask2;
  1138. val1 = ucontrol->value.integer.value[0] & mask;
  1139. val2 = ucontrol->value.integer.value[1] & mask;
  1140. if (invert) {
  1141. val1 = mask - val1;
  1142. val2 = mask - val2;
  1143. }
  1144. val1 <<= shift_left;
  1145. val2 <<= shift_right;
  1146. mask1 = mask << shift_left;
  1147. mask2 = mask << shift_right;
  1148. if (left_reg != right_reg) {
  1149. change = 0;
  1150. if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
  1151. change = 1;
  1152. if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
  1153. change = 1;
  1154. } else {
  1155. change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
  1156. val1 | val2) != (val1 | val2));
  1157. }
  1158. return change;
  1159. }
  1160. static const DECLARE_TLV_DB_RANGE(db_scale_master,
  1161. 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
  1162. 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
  1163. );
  1164. static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
  1165. 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
  1166. 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
  1167. );
  1168. static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
  1169. 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
  1170. 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
  1171. );
  1172. static const DECLARE_TLV_DB_RANGE(db_scale_mic,
  1173. 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
  1174. 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
  1175. );
  1176. static const DECLARE_TLV_DB_RANGE(db_scale_line,
  1177. 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
  1178. 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
  1179. );
  1180. static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
  1181. static struct snd_kcontrol_new snd_es1938_controls[] = {
  1182. ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
  1183. db_scale_master),
  1184. ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
  1185. {
  1186. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1187. .name = "Hardware Master Playback Volume",
  1188. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1189. .info = snd_es1938_info_hw_volume,
  1190. .get = snd_es1938_get_hw_volume,
  1191. },
  1192. {
  1193. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1194. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  1195. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1196. .name = "Hardware Master Playback Switch",
  1197. .info = snd_es1938_info_hw_switch,
  1198. .get = snd_es1938_get_hw_switch,
  1199. .tlv = { .p = db_scale_master },
  1200. },
  1201. ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
  1202. ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
  1203. db_scale_line),
  1204. ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
  1205. ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
  1206. db_scale_mic),
  1207. ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
  1208. db_scale_line),
  1209. ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
  1210. db_scale_mic),
  1211. ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
  1212. db_scale_line),
  1213. ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
  1214. db_scale_capture),
  1215. ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
  1216. ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
  1217. ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
  1218. {
  1219. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1220. .name = "Capture Source",
  1221. .info = snd_es1938_info_mux,
  1222. .get = snd_es1938_get_mux,
  1223. .put = snd_es1938_put_mux,
  1224. },
  1225. ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
  1226. db_scale_line),
  1227. ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
  1228. db_scale_audio2),
  1229. ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
  1230. db_scale_mic),
  1231. ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
  1232. db_scale_line),
  1233. ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
  1234. db_scale_mic),
  1235. ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
  1236. db_scale_line),
  1237. ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
  1238. db_scale_line),
  1239. ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
  1240. db_scale_line),
  1241. ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
  1242. db_scale_audio2),
  1243. ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
  1244. db_scale_audio1),
  1245. ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
  1246. {
  1247. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1248. .name = "3D Control - Switch",
  1249. .info = snd_es1938_info_spatializer_enable,
  1250. .get = snd_es1938_get_spatializer_enable,
  1251. .put = snd_es1938_put_spatializer_enable,
  1252. },
  1253. ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
  1254. };
  1255. /* ---------------------------------------------------------------------------- */
  1256. /* ---------------------------------------------------------------------------- */
  1257. /*
  1258. * initialize the chip - used by resume callback, too
  1259. */
  1260. static void snd_es1938_chip_init(struct es1938 *chip)
  1261. {
  1262. /* reset chip */
  1263. snd_es1938_reset(chip);
  1264. /* configure native mode */
  1265. /* enable bus master */
  1266. pci_set_master(chip->pci);
  1267. /* disable legacy audio */
  1268. pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
  1269. /* set DDMA base */
  1270. pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
  1271. /* set DMA/IRQ policy */
  1272. pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
  1273. /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
  1274. outb(0xf0, SLIO_REG(chip, IRQCONTROL));
  1275. /* reset DMA */
  1276. outb(0, SLDM_REG(chip, DMACLEAR));
  1277. }
  1278. #ifdef CONFIG_PM_SLEEP
  1279. /*
  1280. * PM support
  1281. */
  1282. static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
  1283. 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
  1284. 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
  1285. 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
  1286. 0xa8, 0xb4,
  1287. };
  1288. static int es1938_suspend(struct device *dev)
  1289. {
  1290. struct snd_card *card = dev_get_drvdata(dev);
  1291. struct es1938 *chip = card->private_data;
  1292. unsigned char *s, *d;
  1293. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1294. snd_pcm_suspend_all(chip->pcm);
  1295. /* save mixer-related registers */
  1296. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
  1297. *d = snd_es1938_reg_read(chip, *s);
  1298. outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
  1299. if (chip->irq >= 0) {
  1300. free_irq(chip->irq, chip);
  1301. chip->irq = -1;
  1302. }
  1303. return 0;
  1304. }
  1305. static int es1938_resume(struct device *dev)
  1306. {
  1307. struct pci_dev *pci = to_pci_dev(dev);
  1308. struct snd_card *card = dev_get_drvdata(dev);
  1309. struct es1938 *chip = card->private_data;
  1310. unsigned char *s, *d;
  1311. if (request_irq(pci->irq, snd_es1938_interrupt,
  1312. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1313. dev_err(dev, "unable to grab IRQ %d, disabling device\n",
  1314. pci->irq);
  1315. snd_card_disconnect(card);
  1316. return -EIO;
  1317. }
  1318. chip->irq = pci->irq;
  1319. snd_es1938_chip_init(chip);
  1320. /* restore mixer-related registers */
  1321. for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
  1322. if (*s < 0xa0)
  1323. snd_es1938_mixer_write(chip, *s, *d);
  1324. else
  1325. snd_es1938_write(chip, *s, *d);
  1326. }
  1327. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1328. return 0;
  1329. }
  1330. static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
  1331. #define ES1938_PM_OPS &es1938_pm
  1332. #else
  1333. #define ES1938_PM_OPS NULL
  1334. #endif /* CONFIG_PM_SLEEP */
  1335. #ifdef SUPPORT_JOYSTICK
  1336. static int snd_es1938_create_gameport(struct es1938 *chip)
  1337. {
  1338. struct gameport *gp;
  1339. chip->gameport = gp = gameport_allocate_port();
  1340. if (!gp) {
  1341. dev_err(chip->card->dev,
  1342. "cannot allocate memory for gameport\n");
  1343. return -ENOMEM;
  1344. }
  1345. gameport_set_name(gp, "ES1938");
  1346. gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
  1347. gameport_set_dev_parent(gp, &chip->pci->dev);
  1348. gp->io = chip->game_port;
  1349. gameport_register_port(gp);
  1350. return 0;
  1351. }
  1352. static void snd_es1938_free_gameport(struct es1938 *chip)
  1353. {
  1354. if (chip->gameport) {
  1355. gameport_unregister_port(chip->gameport);
  1356. chip->gameport = NULL;
  1357. }
  1358. }
  1359. #else
  1360. static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
  1361. static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
  1362. #endif /* SUPPORT_JOYSTICK */
  1363. static int snd_es1938_free(struct es1938 *chip)
  1364. {
  1365. /* disable irqs */
  1366. outb(0x00, SLIO_REG(chip, IRQCONTROL));
  1367. if (chip->rmidi)
  1368. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
  1369. snd_es1938_free_gameport(chip);
  1370. if (chip->irq >= 0)
  1371. free_irq(chip->irq, chip);
  1372. pci_release_regions(chip->pci);
  1373. pci_disable_device(chip->pci);
  1374. kfree(chip);
  1375. return 0;
  1376. }
  1377. static int snd_es1938_dev_free(struct snd_device *device)
  1378. {
  1379. struct es1938 *chip = device->device_data;
  1380. return snd_es1938_free(chip);
  1381. }
  1382. static int snd_es1938_create(struct snd_card *card,
  1383. struct pci_dev *pci,
  1384. struct es1938 **rchip)
  1385. {
  1386. struct es1938 *chip;
  1387. int err;
  1388. static struct snd_device_ops ops = {
  1389. .dev_free = snd_es1938_dev_free,
  1390. };
  1391. *rchip = NULL;
  1392. /* enable PCI device */
  1393. if ((err = pci_enable_device(pci)) < 0)
  1394. return err;
  1395. /* check, if we can restrict PCI DMA transfers to 24 bits */
  1396. if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
  1397. dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
  1398. dev_err(card->dev,
  1399. "architecture does not support 24bit PCI busmaster DMA\n");
  1400. pci_disable_device(pci);
  1401. return -ENXIO;
  1402. }
  1403. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1404. if (chip == NULL) {
  1405. pci_disable_device(pci);
  1406. return -ENOMEM;
  1407. }
  1408. spin_lock_init(&chip->reg_lock);
  1409. spin_lock_init(&chip->mixer_lock);
  1410. chip->card = card;
  1411. chip->pci = pci;
  1412. chip->irq = -1;
  1413. if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
  1414. kfree(chip);
  1415. pci_disable_device(pci);
  1416. return err;
  1417. }
  1418. chip->io_port = pci_resource_start(pci, 0);
  1419. chip->sb_port = pci_resource_start(pci, 1);
  1420. chip->vc_port = pci_resource_start(pci, 2);
  1421. chip->mpu_port = pci_resource_start(pci, 3);
  1422. chip->game_port = pci_resource_start(pci, 4);
  1423. if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
  1424. KBUILD_MODNAME, chip)) {
  1425. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  1426. snd_es1938_free(chip);
  1427. return -EBUSY;
  1428. }
  1429. chip->irq = pci->irq;
  1430. dev_dbg(card->dev,
  1431. "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
  1432. chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
  1433. chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
  1434. snd_es1938_chip_init(chip);
  1435. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  1436. snd_es1938_free(chip);
  1437. return err;
  1438. }
  1439. *rchip = chip;
  1440. return 0;
  1441. }
  1442. /* --------------------------------------------------------------------
  1443. * Interrupt handler
  1444. * -------------------------------------------------------------------- */
  1445. static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
  1446. {
  1447. struct es1938 *chip = dev_id;
  1448. unsigned char status, audiostatus;
  1449. int handled = 0;
  1450. status = inb(SLIO_REG(chip, IRQCONTROL));
  1451. #if 0
  1452. dev_dbg(chip->card->dev,
  1453. "Es1938debug - interrupt status: =0x%x\n", status);
  1454. #endif
  1455. /* AUDIO 1 */
  1456. if (status & 0x10) {
  1457. #if 0
  1458. dev_dbg(chip->card->dev,
  1459. "Es1938debug - AUDIO channel 1 interrupt\n");
  1460. dev_dbg(chip->card->dev,
  1461. "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
  1462. inw(SLDM_REG(chip, DMACOUNT)));
  1463. dev_dbg(chip->card->dev,
  1464. "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
  1465. inl(SLDM_REG(chip, DMAADDR)));
  1466. dev_dbg(chip->card->dev,
  1467. "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
  1468. inl(SLDM_REG(chip, DMASTATUS)));
  1469. #endif
  1470. /* clear irq */
  1471. handled = 1;
  1472. audiostatus = inb(SLSB_REG(chip, STATUS));
  1473. if (chip->active & ADC1)
  1474. snd_pcm_period_elapsed(chip->capture_substream);
  1475. else if (chip->active & DAC1)
  1476. snd_pcm_period_elapsed(chip->playback2_substream);
  1477. }
  1478. /* AUDIO 2 */
  1479. if (status & 0x20) {
  1480. #if 0
  1481. dev_dbg(chip->card->dev,
  1482. "Es1938debug - AUDIO channel 2 interrupt\n");
  1483. dev_dbg(chip->card->dev,
  1484. "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
  1485. inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
  1486. dev_dbg(chip->card->dev,
  1487. "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
  1488. inl(SLIO_REG(chip, AUDIO2DMAADDR)));
  1489. #endif
  1490. /* clear irq */
  1491. handled = 1;
  1492. snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
  1493. if (chip->active & DAC2)
  1494. snd_pcm_period_elapsed(chip->playback1_substream);
  1495. }
  1496. /* Hardware volume */
  1497. if (status & 0x40) {
  1498. int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
  1499. handled = 1;
  1500. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
  1501. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
  1502. if (!split) {
  1503. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  1504. &chip->master_switch->id);
  1505. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  1506. &chip->master_volume->id);
  1507. }
  1508. /* ack interrupt */
  1509. snd_es1938_mixer_write(chip, 0x66, 0x00);
  1510. }
  1511. /* MPU401 */
  1512. if (status & 0x80) {
  1513. // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
  1514. // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
  1515. // andreas@flying-snail.de
  1516. // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
  1517. if (chip->rmidi) {
  1518. handled = 1;
  1519. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  1520. }
  1521. }
  1522. return IRQ_RETVAL(handled);
  1523. }
  1524. #define ES1938_DMA_SIZE 64
  1525. static int snd_es1938_mixer(struct es1938 *chip)
  1526. {
  1527. struct snd_card *card;
  1528. unsigned int idx;
  1529. int err;
  1530. card = chip->card;
  1531. strcpy(card->mixername, "ESS Solo-1");
  1532. for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
  1533. struct snd_kcontrol *kctl;
  1534. kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
  1535. switch (idx) {
  1536. case 0:
  1537. chip->master_volume = kctl;
  1538. kctl->private_free = snd_es1938_hwv_free;
  1539. break;
  1540. case 1:
  1541. chip->master_switch = kctl;
  1542. kctl->private_free = snd_es1938_hwv_free;
  1543. break;
  1544. case 2:
  1545. chip->hw_volume = kctl;
  1546. kctl->private_free = snd_es1938_hwv_free;
  1547. break;
  1548. case 3:
  1549. chip->hw_switch = kctl;
  1550. kctl->private_free = snd_es1938_hwv_free;
  1551. break;
  1552. }
  1553. if ((err = snd_ctl_add(card, kctl)) < 0)
  1554. return err;
  1555. }
  1556. return 0;
  1557. }
  1558. static int snd_es1938_probe(struct pci_dev *pci,
  1559. const struct pci_device_id *pci_id)
  1560. {
  1561. static int dev;
  1562. struct snd_card *card;
  1563. struct es1938 *chip;
  1564. struct snd_opl3 *opl3;
  1565. int idx, err;
  1566. if (dev >= SNDRV_CARDS)
  1567. return -ENODEV;
  1568. if (!enable[dev]) {
  1569. dev++;
  1570. return -ENOENT;
  1571. }
  1572. err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1573. 0, &card);
  1574. if (err < 0)
  1575. return err;
  1576. for (idx = 0; idx < 5; idx++) {
  1577. if (pci_resource_start(pci, idx) == 0 ||
  1578. !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
  1579. snd_card_free(card);
  1580. return -ENODEV;
  1581. }
  1582. }
  1583. if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
  1584. snd_card_free(card);
  1585. return err;
  1586. }
  1587. card->private_data = chip;
  1588. strcpy(card->driver, "ES1938");
  1589. strcpy(card->shortname, "ESS ES1938 (Solo-1)");
  1590. sprintf(card->longname, "%s rev %i, irq %i",
  1591. card->shortname,
  1592. chip->revision,
  1593. chip->irq);
  1594. if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
  1595. snd_card_free(card);
  1596. return err;
  1597. }
  1598. if ((err = snd_es1938_mixer(chip)) < 0) {
  1599. snd_card_free(card);
  1600. return err;
  1601. }
  1602. if (snd_opl3_create(card,
  1603. SLSB_REG(chip, FMLOWADDR),
  1604. SLSB_REG(chip, FMHIGHADDR),
  1605. OPL3_HW_OPL3, 1, &opl3) < 0) {
  1606. dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
  1607. SLSB_REG(chip, FMLOWADDR));
  1608. } else {
  1609. if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
  1610. snd_card_free(card);
  1611. return err;
  1612. }
  1613. if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
  1614. snd_card_free(card);
  1615. return err;
  1616. }
  1617. }
  1618. if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
  1619. chip->mpu_port,
  1620. MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
  1621. -1, &chip->rmidi) < 0) {
  1622. dev_err(card->dev, "unable to initialize MPU-401\n");
  1623. } else {
  1624. // this line is vital for MIDI interrupt handling on ess-solo1
  1625. // andreas@flying-snail.de
  1626. snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
  1627. }
  1628. snd_es1938_create_gameport(chip);
  1629. if ((err = snd_card_register(card)) < 0) {
  1630. snd_card_free(card);
  1631. return err;
  1632. }
  1633. pci_set_drvdata(pci, card);
  1634. dev++;
  1635. return 0;
  1636. }
  1637. static void snd_es1938_remove(struct pci_dev *pci)
  1638. {
  1639. snd_card_free(pci_get_drvdata(pci));
  1640. }
  1641. static struct pci_driver es1938_driver = {
  1642. .name = KBUILD_MODNAME,
  1643. .id_table = snd_es1938_ids,
  1644. .probe = snd_es1938_probe,
  1645. .remove = snd_es1938_remove,
  1646. .driver = {
  1647. .pm = ES1938_PM_OPS,
  1648. },
  1649. };
  1650. module_pci_driver(es1938_driver);