emufx.c 100 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Creative Labs, Inc.
  4. * Routines for effect processor FX8010
  5. *
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
  7. * Added EMU 1010 support.
  8. *
  9. * BUGS:
  10. * --
  11. *
  12. * TODO:
  13. * --
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. *
  29. */
  30. #include <linux/pci.h>
  31. #include <linux/capability.h>
  32. #include <linux/delay.h>
  33. #include <linux/slab.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/init.h>
  36. #include <linux/mutex.h>
  37. #include <linux/moduleparam.h>
  38. #include <linux/nospec.h>
  39. #include <sound/core.h>
  40. #include <sound/tlv.h>
  41. #include <sound/emu10k1.h>
  42. #if 0 /* for testing purposes - digital out -> capture */
  43. #define EMU10K1_CAPTURE_DIGITAL_OUT
  44. #endif
  45. #if 0 /* for testing purposes - set S/PDIF to AC3 output */
  46. #define EMU10K1_SET_AC3_IEC958
  47. #endif
  48. #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
  49. #define EMU10K1_CENTER_LFE_FROM_FRONT
  50. #endif
  51. static bool high_res_gpr_volume;
  52. module_param(high_res_gpr_volume, bool, 0444);
  53. MODULE_PARM_DESC(high_res_gpr_volume, "GPR mixer controls use 31-bit range.");
  54. /*
  55. * Tables
  56. */
  57. static char *fxbuses[16] = {
  58. /* 0x00 */ "PCM Left",
  59. /* 0x01 */ "PCM Right",
  60. /* 0x02 */ "PCM Surround Left",
  61. /* 0x03 */ "PCM Surround Right",
  62. /* 0x04 */ "MIDI Left",
  63. /* 0x05 */ "MIDI Right",
  64. /* 0x06 */ "Center",
  65. /* 0x07 */ "LFE",
  66. /* 0x08 */ NULL,
  67. /* 0x09 */ NULL,
  68. /* 0x0a */ NULL,
  69. /* 0x0b */ NULL,
  70. /* 0x0c */ "MIDI Reverb",
  71. /* 0x0d */ "MIDI Chorus",
  72. /* 0x0e */ NULL,
  73. /* 0x0f */ NULL
  74. };
  75. static char *creative_ins[16] = {
  76. /* 0x00 */ "AC97 Left",
  77. /* 0x01 */ "AC97 Right",
  78. /* 0x02 */ "TTL IEC958 Left",
  79. /* 0x03 */ "TTL IEC958 Right",
  80. /* 0x04 */ "Zoom Video Left",
  81. /* 0x05 */ "Zoom Video Right",
  82. /* 0x06 */ "Optical IEC958 Left",
  83. /* 0x07 */ "Optical IEC958 Right",
  84. /* 0x08 */ "Line/Mic 1 Left",
  85. /* 0x09 */ "Line/Mic 1 Right",
  86. /* 0x0a */ "Coaxial IEC958 Left",
  87. /* 0x0b */ "Coaxial IEC958 Right",
  88. /* 0x0c */ "Line/Mic 2 Left",
  89. /* 0x0d */ "Line/Mic 2 Right",
  90. /* 0x0e */ NULL,
  91. /* 0x0f */ NULL
  92. };
  93. static char *audigy_ins[16] = {
  94. /* 0x00 */ "AC97 Left",
  95. /* 0x01 */ "AC97 Right",
  96. /* 0x02 */ "Audigy CD Left",
  97. /* 0x03 */ "Audigy CD Right",
  98. /* 0x04 */ "Optical IEC958 Left",
  99. /* 0x05 */ "Optical IEC958 Right",
  100. /* 0x06 */ NULL,
  101. /* 0x07 */ NULL,
  102. /* 0x08 */ "Line/Mic 2 Left",
  103. /* 0x09 */ "Line/Mic 2 Right",
  104. /* 0x0a */ "SPDIF Left",
  105. /* 0x0b */ "SPDIF Right",
  106. /* 0x0c */ "Aux2 Left",
  107. /* 0x0d */ "Aux2 Right",
  108. /* 0x0e */ NULL,
  109. /* 0x0f */ NULL
  110. };
  111. static char *creative_outs[32] = {
  112. /* 0x00 */ "AC97 Left",
  113. /* 0x01 */ "AC97 Right",
  114. /* 0x02 */ "Optical IEC958 Left",
  115. /* 0x03 */ "Optical IEC958 Right",
  116. /* 0x04 */ "Center",
  117. /* 0x05 */ "LFE",
  118. /* 0x06 */ "Headphone Left",
  119. /* 0x07 */ "Headphone Right",
  120. /* 0x08 */ "Surround Left",
  121. /* 0x09 */ "Surround Right",
  122. /* 0x0a */ "PCM Capture Left",
  123. /* 0x0b */ "PCM Capture Right",
  124. /* 0x0c */ "MIC Capture",
  125. /* 0x0d */ "AC97 Surround Left",
  126. /* 0x0e */ "AC97 Surround Right",
  127. /* 0x0f */ NULL,
  128. /* 0x10 */ NULL,
  129. /* 0x11 */ "Analog Center",
  130. /* 0x12 */ "Analog LFE",
  131. /* 0x13 */ NULL,
  132. /* 0x14 */ NULL,
  133. /* 0x15 */ NULL,
  134. /* 0x16 */ NULL,
  135. /* 0x17 */ NULL,
  136. /* 0x18 */ NULL,
  137. /* 0x19 */ NULL,
  138. /* 0x1a */ NULL,
  139. /* 0x1b */ NULL,
  140. /* 0x1c */ NULL,
  141. /* 0x1d */ NULL,
  142. /* 0x1e */ NULL,
  143. /* 0x1f */ NULL,
  144. };
  145. static char *audigy_outs[32] = {
  146. /* 0x00 */ "Digital Front Left",
  147. /* 0x01 */ "Digital Front Right",
  148. /* 0x02 */ "Digital Center",
  149. /* 0x03 */ "Digital LEF",
  150. /* 0x04 */ "Headphone Left",
  151. /* 0x05 */ "Headphone Right",
  152. /* 0x06 */ "Digital Rear Left",
  153. /* 0x07 */ "Digital Rear Right",
  154. /* 0x08 */ "Front Left",
  155. /* 0x09 */ "Front Right",
  156. /* 0x0a */ "Center",
  157. /* 0x0b */ "LFE",
  158. /* 0x0c */ NULL,
  159. /* 0x0d */ NULL,
  160. /* 0x0e */ "Rear Left",
  161. /* 0x0f */ "Rear Right",
  162. /* 0x10 */ "AC97 Front Left",
  163. /* 0x11 */ "AC97 Front Right",
  164. /* 0x12 */ "ADC Caputre Left",
  165. /* 0x13 */ "ADC Capture Right",
  166. /* 0x14 */ NULL,
  167. /* 0x15 */ NULL,
  168. /* 0x16 */ NULL,
  169. /* 0x17 */ NULL,
  170. /* 0x18 */ NULL,
  171. /* 0x19 */ NULL,
  172. /* 0x1a */ NULL,
  173. /* 0x1b */ NULL,
  174. /* 0x1c */ NULL,
  175. /* 0x1d */ NULL,
  176. /* 0x1e */ NULL,
  177. /* 0x1f */ NULL,
  178. };
  179. static const u32 bass_table[41][5] = {
  180. { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
  181. { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
  182. { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
  183. { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
  184. { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
  185. { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
  186. { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
  187. { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
  188. { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
  189. { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
  190. { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
  191. { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
  192. { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
  193. { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
  194. { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
  195. { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
  196. { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
  197. { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
  198. { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
  199. { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
  200. { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
  201. { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
  202. { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
  203. { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
  204. { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
  205. { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
  206. { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
  207. { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
  208. { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
  209. { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
  210. { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
  211. { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
  212. { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
  213. { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
  214. { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
  215. { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
  216. { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
  217. { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
  218. { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
  219. { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
  220. { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
  221. };
  222. static const u32 treble_table[41][5] = {
  223. { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
  224. { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
  225. { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
  226. { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
  227. { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
  228. { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
  229. { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
  230. { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
  231. { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
  232. { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
  233. { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
  234. { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
  235. { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
  236. { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
  237. { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
  238. { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
  239. { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
  240. { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
  241. { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
  242. { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
  243. { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
  244. { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
  245. { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
  246. { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
  247. { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
  248. { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
  249. { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
  250. { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
  251. { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
  252. { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
  253. { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
  254. { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
  255. { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
  256. { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
  257. { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
  258. { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
  259. { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
  260. { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
  261. { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
  262. { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
  263. { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
  264. };
  265. /* dB gain = (float) 20 * log10( float(db_table_value) / 0x8000000 ) */
  266. static const u32 db_table[101] = {
  267. 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
  268. 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
  269. 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
  270. 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
  271. 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
  272. 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
  273. 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
  274. 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
  275. 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
  276. 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
  277. 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
  278. 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
  279. 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
  280. 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
  281. 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
  282. 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
  283. 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
  284. 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
  285. 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
  286. 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
  287. 0x7fffffff,
  288. };
  289. /* EMU10k1/EMU10k2 DSP control db gain */
  290. static const DECLARE_TLV_DB_SCALE(snd_emu10k1_db_scale1, -4000, 40, 1);
  291. static const DECLARE_TLV_DB_LINEAR(snd_emu10k1_db_linear, TLV_DB_GAIN_MUTE, 0);
  292. /* EMU10K1 bass/treble db gain */
  293. static const DECLARE_TLV_DB_SCALE(snd_emu10k1_bass_treble_db_scale, -1200, 60, 0);
  294. static const u32 onoff_table[2] = {
  295. 0x00000000, 0x00000001
  296. };
  297. /*
  298. * controls
  299. */
  300. static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  301. {
  302. struct snd_emu10k1_fx8010_ctl *ctl =
  303. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  304. if (ctl->min == 0 && ctl->max == 1)
  305. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  306. else
  307. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  308. uinfo->count = ctl->vcount;
  309. uinfo->value.integer.min = ctl->min;
  310. uinfo->value.integer.max = ctl->max;
  311. return 0;
  312. }
  313. static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  314. {
  315. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  316. struct snd_emu10k1_fx8010_ctl *ctl =
  317. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  318. unsigned long flags;
  319. unsigned int i;
  320. spin_lock_irqsave(&emu->reg_lock, flags);
  321. for (i = 0; i < ctl->vcount; i++)
  322. ucontrol->value.integer.value[i] = ctl->value[i];
  323. spin_unlock_irqrestore(&emu->reg_lock, flags);
  324. return 0;
  325. }
  326. static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  327. {
  328. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  329. struct snd_emu10k1_fx8010_ctl *ctl =
  330. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  331. unsigned long flags;
  332. unsigned int nval, val;
  333. unsigned int i, j;
  334. int change = 0;
  335. spin_lock_irqsave(&emu->reg_lock, flags);
  336. for (i = 0; i < ctl->vcount; i++) {
  337. nval = ucontrol->value.integer.value[i];
  338. if (nval < ctl->min)
  339. nval = ctl->min;
  340. if (nval > ctl->max)
  341. nval = ctl->max;
  342. if (nval != ctl->value[i])
  343. change = 1;
  344. val = ctl->value[i] = nval;
  345. switch (ctl->translation) {
  346. case EMU10K1_GPR_TRANSLATION_NONE:
  347. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
  348. break;
  349. case EMU10K1_GPR_TRANSLATION_TABLE100:
  350. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
  351. break;
  352. case EMU10K1_GPR_TRANSLATION_BASS:
  353. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  354. change = -EIO;
  355. goto __error;
  356. }
  357. for (j = 0; j < 5; j++)
  358. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
  359. break;
  360. case EMU10K1_GPR_TRANSLATION_TREBLE:
  361. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  362. change = -EIO;
  363. goto __error;
  364. }
  365. for (j = 0; j < 5; j++)
  366. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
  367. break;
  368. case EMU10K1_GPR_TRANSLATION_ONOFF:
  369. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
  370. break;
  371. }
  372. }
  373. __error:
  374. spin_unlock_irqrestore(&emu->reg_lock, flags);
  375. return change;
  376. }
  377. /*
  378. * Interrupt handler
  379. */
  380. static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
  381. {
  382. struct snd_emu10k1_fx8010_irq *irq, *nirq;
  383. irq = emu->fx8010.irq_handlers;
  384. while (irq) {
  385. nirq = irq->next; /* irq ptr can be removed from list */
  386. if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
  387. if (irq->handler)
  388. irq->handler(emu, irq->private_data);
  389. snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
  390. }
  391. irq = nirq;
  392. }
  393. }
  394. int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
  395. snd_fx8010_irq_handler_t *handler,
  396. unsigned char gpr_running,
  397. void *private_data,
  398. struct snd_emu10k1_fx8010_irq **r_irq)
  399. {
  400. struct snd_emu10k1_fx8010_irq *irq;
  401. unsigned long flags;
  402. irq = kmalloc(sizeof(*irq), GFP_ATOMIC);
  403. if (irq == NULL)
  404. return -ENOMEM;
  405. irq->handler = handler;
  406. irq->gpr_running = gpr_running;
  407. irq->private_data = private_data;
  408. irq->next = NULL;
  409. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  410. if (emu->fx8010.irq_handlers == NULL) {
  411. emu->fx8010.irq_handlers = irq;
  412. emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
  413. snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
  414. } else {
  415. irq->next = emu->fx8010.irq_handlers;
  416. emu->fx8010.irq_handlers = irq;
  417. }
  418. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  419. if (r_irq)
  420. *r_irq = irq;
  421. return 0;
  422. }
  423. int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
  424. struct snd_emu10k1_fx8010_irq *irq)
  425. {
  426. struct snd_emu10k1_fx8010_irq *tmp;
  427. unsigned long flags;
  428. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  429. if ((tmp = emu->fx8010.irq_handlers) == irq) {
  430. emu->fx8010.irq_handlers = tmp->next;
  431. if (emu->fx8010.irq_handlers == NULL) {
  432. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  433. emu->dsp_interrupt = NULL;
  434. }
  435. } else {
  436. while (tmp && tmp->next != irq)
  437. tmp = tmp->next;
  438. if (tmp)
  439. tmp->next = tmp->next->next;
  440. }
  441. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  442. kfree(irq);
  443. return 0;
  444. }
  445. /*************************************************************************
  446. * EMU10K1 effect manager
  447. *************************************************************************/
  448. static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
  449. unsigned int *ptr,
  450. u32 op, u32 r, u32 a, u32 x, u32 y)
  451. {
  452. u_int32_t *code;
  453. if (snd_BUG_ON(*ptr >= 512))
  454. return;
  455. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  456. set_bit(*ptr, icode->code_valid);
  457. code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
  458. code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
  459. (*ptr)++;
  460. }
  461. #define OP(icode, ptr, op, r, a, x, y) \
  462. snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
  463. static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
  464. unsigned int *ptr,
  465. u32 op, u32 r, u32 a, u32 x, u32 y)
  466. {
  467. u_int32_t *code;
  468. if (snd_BUG_ON(*ptr >= 1024))
  469. return;
  470. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  471. set_bit(*ptr, icode->code_valid);
  472. code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
  473. code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
  474. (*ptr)++;
  475. }
  476. #define A_OP(icode, ptr, op, r, a, x, y) \
  477. snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
  478. static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
  479. {
  480. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  481. snd_emu10k1_ptr_write(emu, pc, 0, data);
  482. }
  483. unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
  484. {
  485. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  486. return snd_emu10k1_ptr_read(emu, pc, 0);
  487. }
  488. static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
  489. struct snd_emu10k1_fx8010_code *icode,
  490. bool in_kernel)
  491. {
  492. int gpr;
  493. u32 val;
  494. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  495. if (!test_bit(gpr, icode->gpr_valid))
  496. continue;
  497. if (in_kernel)
  498. val = *(u32 *)&icode->gpr_map[gpr];
  499. else if (get_user(val, &icode->gpr_map[gpr]))
  500. return -EFAULT;
  501. snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
  502. }
  503. return 0;
  504. }
  505. static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
  506. struct snd_emu10k1_fx8010_code *icode)
  507. {
  508. int gpr;
  509. u32 val;
  510. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  511. set_bit(gpr, icode->gpr_valid);
  512. val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
  513. if (put_user(val, &icode->gpr_map[gpr]))
  514. return -EFAULT;
  515. }
  516. return 0;
  517. }
  518. static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
  519. struct snd_emu10k1_fx8010_code *icode,
  520. bool in_kernel)
  521. {
  522. int tram;
  523. u32 addr, val;
  524. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  525. if (!test_bit(tram, icode->tram_valid))
  526. continue;
  527. if (in_kernel) {
  528. val = *(u32 *)&icode->tram_data_map[tram];
  529. addr = *(u32 *)&icode->tram_addr_map[tram];
  530. } else {
  531. if (get_user(val, &icode->tram_data_map[tram]) ||
  532. get_user(addr, &icode->tram_addr_map[tram]))
  533. return -EFAULT;
  534. }
  535. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
  536. if (!emu->audigy) {
  537. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
  538. } else {
  539. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
  540. snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
  541. }
  542. }
  543. return 0;
  544. }
  545. static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
  546. struct snd_emu10k1_fx8010_code *icode)
  547. {
  548. int tram;
  549. u32 val, addr;
  550. memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
  551. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  552. set_bit(tram, icode->tram_valid);
  553. val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
  554. if (!emu->audigy) {
  555. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
  556. } else {
  557. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
  558. addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
  559. }
  560. if (put_user(val, &icode->tram_data_map[tram]) ||
  561. put_user(addr, &icode->tram_addr_map[tram]))
  562. return -EFAULT;
  563. }
  564. return 0;
  565. }
  566. static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
  567. struct snd_emu10k1_fx8010_code *icode,
  568. bool in_kernel)
  569. {
  570. u32 pc, lo, hi;
  571. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  572. if (!test_bit(pc / 2, icode->code_valid))
  573. continue;
  574. if (in_kernel) {
  575. lo = *(u32 *)&icode->code[pc + 0];
  576. hi = *(u32 *)&icode->code[pc + 1];
  577. } else {
  578. if (get_user(lo, &icode->code[pc + 0]) ||
  579. get_user(hi, &icode->code[pc + 1]))
  580. return -EFAULT;
  581. }
  582. snd_emu10k1_efx_write(emu, pc + 0, lo);
  583. snd_emu10k1_efx_write(emu, pc + 1, hi);
  584. }
  585. return 0;
  586. }
  587. static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
  588. struct snd_emu10k1_fx8010_code *icode)
  589. {
  590. u32 pc;
  591. memset(icode->code_valid, 0, sizeof(icode->code_valid));
  592. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  593. set_bit(pc / 2, icode->code_valid);
  594. if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0]))
  595. return -EFAULT;
  596. if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1]))
  597. return -EFAULT;
  598. }
  599. return 0;
  600. }
  601. static struct snd_emu10k1_fx8010_ctl *
  602. snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id)
  603. {
  604. struct snd_emu10k1_fx8010_ctl *ctl;
  605. struct snd_kcontrol *kcontrol;
  606. list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) {
  607. kcontrol = ctl->kcontrol;
  608. if (kcontrol->id.iface == id->iface &&
  609. !strcmp(kcontrol->id.name, id->name) &&
  610. kcontrol->id.index == id->index)
  611. return ctl;
  612. }
  613. return NULL;
  614. }
  615. #define MAX_TLV_SIZE 256
  616. static unsigned int *copy_tlv(const unsigned int __user *_tlv, bool in_kernel)
  617. {
  618. unsigned int data[2];
  619. unsigned int *tlv;
  620. if (!_tlv)
  621. return NULL;
  622. if (in_kernel)
  623. memcpy(data, (void *)_tlv, sizeof(data));
  624. else if (copy_from_user(data, _tlv, sizeof(data)))
  625. return NULL;
  626. if (data[1] >= MAX_TLV_SIZE)
  627. return NULL;
  628. tlv = kmalloc(data[1] + sizeof(data), GFP_KERNEL);
  629. if (!tlv)
  630. return NULL;
  631. memcpy(tlv, data, sizeof(data));
  632. if (in_kernel) {
  633. memcpy(tlv + 2, (void *)(_tlv + 2), data[1]);
  634. } else if (copy_from_user(tlv + 2, _tlv + 2, data[1])) {
  635. kfree(tlv);
  636. return NULL;
  637. }
  638. return tlv;
  639. }
  640. static int copy_gctl(struct snd_emu10k1 *emu,
  641. struct snd_emu10k1_fx8010_control_gpr *gctl,
  642. struct snd_emu10k1_fx8010_control_gpr __user *_gctl,
  643. int idx, bool in_kernel)
  644. {
  645. struct snd_emu10k1_fx8010_control_old_gpr __user *octl;
  646. if (emu->support_tlv) {
  647. if (in_kernel)
  648. memcpy(gctl, (void *)&_gctl[idx], sizeof(*gctl));
  649. else if (copy_from_user(gctl, &_gctl[idx], sizeof(*gctl)))
  650. return -EFAULT;
  651. return 0;
  652. }
  653. octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)_gctl;
  654. if (in_kernel)
  655. memcpy(gctl, (void *)&octl[idx], sizeof(*octl));
  656. else if (copy_from_user(gctl, &octl[idx], sizeof(*octl)))
  657. return -EFAULT;
  658. gctl->tlv = NULL;
  659. return 0;
  660. }
  661. static int copy_gctl_to_user(struct snd_emu10k1 *emu,
  662. struct snd_emu10k1_fx8010_control_gpr __user *_gctl,
  663. struct snd_emu10k1_fx8010_control_gpr *gctl,
  664. int idx)
  665. {
  666. struct snd_emu10k1_fx8010_control_old_gpr __user *octl;
  667. if (emu->support_tlv)
  668. return copy_to_user(&_gctl[idx], gctl, sizeof(*gctl));
  669. octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)_gctl;
  670. return copy_to_user(&octl[idx], gctl, sizeof(*octl));
  671. }
  672. static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
  673. struct snd_emu10k1_fx8010_code *icode,
  674. bool in_kernel)
  675. {
  676. unsigned int i;
  677. struct snd_ctl_elem_id __user *_id;
  678. struct snd_ctl_elem_id id;
  679. struct snd_emu10k1_fx8010_control_gpr *gctl;
  680. int err;
  681. for (i = 0, _id = icode->gpr_del_controls;
  682. i < icode->gpr_del_control_count; i++, _id++) {
  683. if (in_kernel)
  684. id = *(struct snd_ctl_elem_id *)_id;
  685. else if (copy_from_user(&id, _id, sizeof(id)))
  686. return -EFAULT;
  687. if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
  688. return -ENOENT;
  689. }
  690. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  691. if (! gctl)
  692. return -ENOMEM;
  693. err = 0;
  694. for (i = 0; i < icode->gpr_add_control_count; i++) {
  695. if (copy_gctl(emu, gctl, icode->gpr_add_controls, i,
  696. in_kernel)) {
  697. err = -EFAULT;
  698. goto __error;
  699. }
  700. if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
  701. continue;
  702. down_read(&emu->card->controls_rwsem);
  703. if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) {
  704. up_read(&emu->card->controls_rwsem);
  705. err = -EEXIST;
  706. goto __error;
  707. }
  708. up_read(&emu->card->controls_rwsem);
  709. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  710. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  711. err = -EINVAL;
  712. goto __error;
  713. }
  714. }
  715. for (i = 0; i < icode->gpr_list_control_count; i++) {
  716. /* FIXME: we need to check the WRITE access */
  717. if (copy_gctl(emu, gctl, icode->gpr_list_controls, i,
  718. in_kernel)) {
  719. err = -EFAULT;
  720. goto __error;
  721. }
  722. }
  723. __error:
  724. kfree(gctl);
  725. return err;
  726. }
  727. static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
  728. {
  729. struct snd_emu10k1_fx8010_ctl *ctl;
  730. ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
  731. kctl->private_value = 0;
  732. list_del(&ctl->list);
  733. kfree(ctl);
  734. kfree(kctl->tlv.p);
  735. }
  736. static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
  737. struct snd_emu10k1_fx8010_code *icode,
  738. bool in_kernel)
  739. {
  740. unsigned int i, j;
  741. struct snd_emu10k1_fx8010_control_gpr *gctl;
  742. struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
  743. struct snd_kcontrol_new knew;
  744. struct snd_kcontrol *kctl;
  745. struct snd_ctl_elem_value *val;
  746. int err = 0;
  747. val = kmalloc(sizeof(*val), GFP_KERNEL);
  748. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  749. nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
  750. if (!val || !gctl || !nctl) {
  751. err = -ENOMEM;
  752. goto __error;
  753. }
  754. for (i = 0; i < icode->gpr_add_control_count; i++) {
  755. if (copy_gctl(emu, gctl, icode->gpr_add_controls, i,
  756. in_kernel)) {
  757. err = -EFAULT;
  758. goto __error;
  759. }
  760. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  761. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  762. err = -EINVAL;
  763. goto __error;
  764. }
  765. if (! gctl->id.name[0]) {
  766. err = -EINVAL;
  767. goto __error;
  768. }
  769. ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
  770. memset(&knew, 0, sizeof(knew));
  771. knew.iface = gctl->id.iface;
  772. knew.name = gctl->id.name;
  773. knew.index = gctl->id.index;
  774. knew.device = gctl->id.device;
  775. knew.subdevice = gctl->id.subdevice;
  776. knew.info = snd_emu10k1_gpr_ctl_info;
  777. knew.tlv.p = copy_tlv(gctl->tlv, in_kernel);
  778. if (knew.tlv.p)
  779. knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  780. SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  781. knew.get = snd_emu10k1_gpr_ctl_get;
  782. knew.put = snd_emu10k1_gpr_ctl_put;
  783. memset(nctl, 0, sizeof(*nctl));
  784. nctl->vcount = gctl->vcount;
  785. nctl->count = gctl->count;
  786. for (j = 0; j < 32; j++) {
  787. nctl->gpr[j] = gctl->gpr[j];
  788. nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
  789. val->value.integer.value[j] = gctl->value[j];
  790. }
  791. nctl->min = gctl->min;
  792. nctl->max = gctl->max;
  793. nctl->translation = gctl->translation;
  794. if (ctl == NULL) {
  795. ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
  796. if (ctl == NULL) {
  797. err = -ENOMEM;
  798. kfree(knew.tlv.p);
  799. goto __error;
  800. }
  801. knew.private_value = (unsigned long)ctl;
  802. *ctl = *nctl;
  803. if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) {
  804. kfree(ctl);
  805. kfree(knew.tlv.p);
  806. goto __error;
  807. }
  808. kctl->private_free = snd_emu10k1_ctl_private_free;
  809. ctl->kcontrol = kctl;
  810. list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
  811. } else {
  812. /* overwrite */
  813. nctl->list = ctl->list;
  814. nctl->kcontrol = ctl->kcontrol;
  815. *ctl = *nctl;
  816. snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
  817. SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
  818. }
  819. snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
  820. }
  821. __error:
  822. kfree(nctl);
  823. kfree(gctl);
  824. kfree(val);
  825. return err;
  826. }
  827. static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
  828. struct snd_emu10k1_fx8010_code *icode,
  829. bool in_kernel)
  830. {
  831. unsigned int i;
  832. struct snd_ctl_elem_id id;
  833. struct snd_ctl_elem_id __user *_id;
  834. struct snd_emu10k1_fx8010_ctl *ctl;
  835. struct snd_card *card = emu->card;
  836. for (i = 0, _id = icode->gpr_del_controls;
  837. i < icode->gpr_del_control_count; i++, _id++) {
  838. if (in_kernel)
  839. id = *(struct snd_ctl_elem_id *)_id;
  840. else if (copy_from_user(&id, _id, sizeof(id)))
  841. return -EFAULT;
  842. down_write(&card->controls_rwsem);
  843. ctl = snd_emu10k1_look_for_ctl(emu, &id);
  844. if (ctl)
  845. snd_ctl_remove(card, ctl->kcontrol);
  846. up_write(&card->controls_rwsem);
  847. }
  848. return 0;
  849. }
  850. static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
  851. struct snd_emu10k1_fx8010_code *icode)
  852. {
  853. unsigned int i = 0, j;
  854. unsigned int total = 0;
  855. struct snd_emu10k1_fx8010_control_gpr *gctl;
  856. struct snd_emu10k1_fx8010_ctl *ctl;
  857. struct snd_ctl_elem_id *id;
  858. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  859. if (! gctl)
  860. return -ENOMEM;
  861. list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) {
  862. total++;
  863. if (icode->gpr_list_controls &&
  864. i < icode->gpr_list_control_count) {
  865. memset(gctl, 0, sizeof(*gctl));
  866. id = &ctl->kcontrol->id;
  867. gctl->id.iface = id->iface;
  868. strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name));
  869. gctl->id.index = id->index;
  870. gctl->id.device = id->device;
  871. gctl->id.subdevice = id->subdevice;
  872. gctl->vcount = ctl->vcount;
  873. gctl->count = ctl->count;
  874. for (j = 0; j < 32; j++) {
  875. gctl->gpr[j] = ctl->gpr[j];
  876. gctl->value[j] = ctl->value[j];
  877. }
  878. gctl->min = ctl->min;
  879. gctl->max = ctl->max;
  880. gctl->translation = ctl->translation;
  881. if (copy_gctl_to_user(emu, icode->gpr_list_controls,
  882. gctl, i)) {
  883. kfree(gctl);
  884. return -EFAULT;
  885. }
  886. i++;
  887. }
  888. }
  889. icode->gpr_list_control_total = total;
  890. kfree(gctl);
  891. return 0;
  892. }
  893. static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
  894. struct snd_emu10k1_fx8010_code *icode,
  895. bool in_kernel)
  896. {
  897. int err = 0;
  898. mutex_lock(&emu->fx8010.lock);
  899. err = snd_emu10k1_verify_controls(emu, icode, in_kernel);
  900. if (err < 0)
  901. goto __error;
  902. strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
  903. /* stop FX processor - this may be dangerous, but it's better to miss
  904. some samples than generate wrong ones - [jk] */
  905. if (emu->audigy)
  906. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  907. else
  908. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  909. /* ok, do the main job */
  910. err = snd_emu10k1_del_controls(emu, icode, in_kernel);
  911. if (err < 0)
  912. goto __error;
  913. err = snd_emu10k1_gpr_poke(emu, icode, in_kernel);
  914. if (err < 0)
  915. goto __error;
  916. err = snd_emu10k1_tram_poke(emu, icode, in_kernel);
  917. if (err < 0)
  918. goto __error;
  919. err = snd_emu10k1_code_poke(emu, icode, in_kernel);
  920. if (err < 0)
  921. goto __error;
  922. err = snd_emu10k1_add_controls(emu, icode, in_kernel);
  923. if (err < 0)
  924. goto __error;
  925. /* start FX processor when the DSP code is updated */
  926. if (emu->audigy)
  927. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  928. else
  929. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  930. __error:
  931. mutex_unlock(&emu->fx8010.lock);
  932. return err;
  933. }
  934. static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
  935. struct snd_emu10k1_fx8010_code *icode)
  936. {
  937. int err;
  938. mutex_lock(&emu->fx8010.lock);
  939. strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name));
  940. /* ok, do the main job */
  941. err = snd_emu10k1_gpr_peek(emu, icode);
  942. if (err >= 0)
  943. err = snd_emu10k1_tram_peek(emu, icode);
  944. if (err >= 0)
  945. err = snd_emu10k1_code_peek(emu, icode);
  946. if (err >= 0)
  947. err = snd_emu10k1_list_controls(emu, icode);
  948. mutex_unlock(&emu->fx8010.lock);
  949. return err;
  950. }
  951. static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
  952. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  953. {
  954. unsigned int i;
  955. int err = 0;
  956. struct snd_emu10k1_fx8010_pcm *pcm;
  957. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  958. return -EINVAL;
  959. ipcm->substream = array_index_nospec(ipcm->substream,
  960. EMU10K1_FX8010_PCM_COUNT);
  961. if (ipcm->channels > 32)
  962. return -EINVAL;
  963. pcm = &emu->fx8010.pcm[ipcm->substream];
  964. mutex_lock(&emu->fx8010.lock);
  965. spin_lock_irq(&emu->reg_lock);
  966. if (pcm->opened) {
  967. err = -EBUSY;
  968. goto __error;
  969. }
  970. if (ipcm->channels == 0) { /* remove */
  971. pcm->valid = 0;
  972. } else {
  973. /* FIXME: we need to add universal code to the PCM transfer routine */
  974. if (ipcm->channels != 2) {
  975. err = -EINVAL;
  976. goto __error;
  977. }
  978. pcm->valid = 1;
  979. pcm->opened = 0;
  980. pcm->channels = ipcm->channels;
  981. pcm->tram_start = ipcm->tram_start;
  982. pcm->buffer_size = ipcm->buffer_size;
  983. pcm->gpr_size = ipcm->gpr_size;
  984. pcm->gpr_count = ipcm->gpr_count;
  985. pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
  986. pcm->gpr_ptr = ipcm->gpr_ptr;
  987. pcm->gpr_trigger = ipcm->gpr_trigger;
  988. pcm->gpr_running = ipcm->gpr_running;
  989. for (i = 0; i < pcm->channels; i++)
  990. pcm->etram[i] = ipcm->etram[i];
  991. }
  992. __error:
  993. spin_unlock_irq(&emu->reg_lock);
  994. mutex_unlock(&emu->fx8010.lock);
  995. return err;
  996. }
  997. static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
  998. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  999. {
  1000. unsigned int i;
  1001. int err = 0;
  1002. struct snd_emu10k1_fx8010_pcm *pcm;
  1003. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  1004. return -EINVAL;
  1005. ipcm->substream = array_index_nospec(ipcm->substream,
  1006. EMU10K1_FX8010_PCM_COUNT);
  1007. pcm = &emu->fx8010.pcm[ipcm->substream];
  1008. mutex_lock(&emu->fx8010.lock);
  1009. spin_lock_irq(&emu->reg_lock);
  1010. ipcm->channels = pcm->channels;
  1011. ipcm->tram_start = pcm->tram_start;
  1012. ipcm->buffer_size = pcm->buffer_size;
  1013. ipcm->gpr_size = pcm->gpr_size;
  1014. ipcm->gpr_ptr = pcm->gpr_ptr;
  1015. ipcm->gpr_count = pcm->gpr_count;
  1016. ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
  1017. ipcm->gpr_trigger = pcm->gpr_trigger;
  1018. ipcm->gpr_running = pcm->gpr_running;
  1019. for (i = 0; i < pcm->channels; i++)
  1020. ipcm->etram[i] = pcm->etram[i];
  1021. ipcm->res1 = ipcm->res2 = 0;
  1022. ipcm->pad = 0;
  1023. spin_unlock_irq(&emu->reg_lock);
  1024. mutex_unlock(&emu->fx8010.lock);
  1025. return err;
  1026. }
  1027. #define SND_EMU10K1_GPR_CONTROLS 44
  1028. #define SND_EMU10K1_INPUTS 12
  1029. #define SND_EMU10K1_PLAYBACK_CHANNELS 8
  1030. #define SND_EMU10K1_CAPTURE_CHANNELS 4
  1031. static void
  1032. snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1033. const char *name, int gpr, int defval)
  1034. {
  1035. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1036. strcpy(ctl->id.name, name);
  1037. ctl->vcount = ctl->count = 1;
  1038. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1039. if (high_res_gpr_volume) {
  1040. ctl->min = 0;
  1041. ctl->max = 0x7fffffff;
  1042. ctl->tlv = snd_emu10k1_db_linear;
  1043. ctl->translation = EMU10K1_GPR_TRANSLATION_NONE;
  1044. } else {
  1045. ctl->min = 0;
  1046. ctl->max = 100;
  1047. ctl->tlv = snd_emu10k1_db_scale1;
  1048. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  1049. }
  1050. }
  1051. static void
  1052. snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1053. const char *name, int gpr, int defval)
  1054. {
  1055. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1056. strcpy(ctl->id.name, name);
  1057. ctl->vcount = ctl->count = 2;
  1058. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1059. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  1060. if (high_res_gpr_volume) {
  1061. ctl->min = 0;
  1062. ctl->max = 0x7fffffff;
  1063. ctl->tlv = snd_emu10k1_db_linear;
  1064. ctl->translation = EMU10K1_GPR_TRANSLATION_NONE;
  1065. } else {
  1066. ctl->min = 0;
  1067. ctl->max = 100;
  1068. ctl->tlv = snd_emu10k1_db_scale1;
  1069. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  1070. }
  1071. }
  1072. static void
  1073. snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1074. const char *name, int gpr, int defval)
  1075. {
  1076. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1077. strcpy(ctl->id.name, name);
  1078. ctl->vcount = ctl->count = 1;
  1079. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1080. ctl->min = 0;
  1081. ctl->max = 1;
  1082. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  1083. }
  1084. static void
  1085. snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1086. const char *name, int gpr, int defval)
  1087. {
  1088. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1089. strcpy(ctl->id.name, name);
  1090. ctl->vcount = ctl->count = 2;
  1091. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1092. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  1093. ctl->min = 0;
  1094. ctl->max = 1;
  1095. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  1096. }
  1097. /*
  1098. * Used for emu1010 - conversion from 32-bit capture inputs from HANA
  1099. * to 2 x 16-bit registers in audigy - their values are read via DMA.
  1100. * Conversion is performed by Audigy DSP instructions of FX8010.
  1101. */
  1102. static int snd_emu10k1_audigy_dsp_convert_32_to_2x16(
  1103. struct snd_emu10k1_fx8010_code *icode,
  1104. u32 *ptr, int tmp, int bit_shifter16,
  1105. int reg_in, int reg_out)
  1106. {
  1107. A_OP(icode, ptr, iACC3, A_GPR(tmp + 1), reg_in, A_C_00000000, A_C_00000000);
  1108. A_OP(icode, ptr, iANDXOR, A_GPR(tmp), A_GPR(tmp + 1), A_GPR(bit_shifter16 - 1), A_C_00000000);
  1109. A_OP(icode, ptr, iTSTNEG, A_GPR(tmp + 2), A_GPR(tmp), A_C_80000000, A_GPR(bit_shifter16 - 2));
  1110. A_OP(icode, ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_C_80000000, A_C_00000000);
  1111. A_OP(icode, ptr, iANDXOR, A_GPR(tmp), A_GPR(tmp), A_GPR(bit_shifter16 - 3), A_C_00000000);
  1112. A_OP(icode, ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A_GPR(tmp), A_C_00010000);
  1113. A_OP(icode, ptr, iANDXOR, reg_out, A_GPR(tmp), A_C_ffffffff, A_GPR(tmp + 2));
  1114. A_OP(icode, ptr, iACC3, reg_out + 1, A_GPR(tmp + 1), A_C_00000000, A_C_00000000);
  1115. return 1;
  1116. }
  1117. /*
  1118. * initial DSP configuration for Audigy
  1119. */
  1120. static int _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
  1121. {
  1122. int err, i, z, gpr, nctl;
  1123. int bit_shifter16;
  1124. const int playback = 10;
  1125. const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
  1126. const int stereo_mix = capture + 2;
  1127. const int tmp = 0x88;
  1128. u32 ptr;
  1129. struct snd_emu10k1_fx8010_code *icode = NULL;
  1130. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1131. u32 *gpr_map;
  1132. err = -ENOMEM;
  1133. icode = kzalloc(sizeof(*icode), GFP_KERNEL);
  1134. if (!icode)
  1135. return err;
  1136. icode->gpr_map = (u_int32_t __user *) kcalloc(512 + 256 + 256 + 2 * 1024,
  1137. sizeof(u_int32_t), GFP_KERNEL);
  1138. if (!icode->gpr_map)
  1139. goto __err_gpr;
  1140. controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1141. sizeof(*controls), GFP_KERNEL);
  1142. if (!controls)
  1143. goto __err_ctrls;
  1144. gpr_map = (u32 __force *)icode->gpr_map;
  1145. icode->tram_data_map = icode->gpr_map + 512;
  1146. icode->tram_addr_map = icode->tram_data_map + 256;
  1147. icode->code = icode->tram_addr_map + 256;
  1148. /* clear free GPRs */
  1149. for (i = 0; i < 512; i++)
  1150. set_bit(i, icode->gpr_valid);
  1151. /* clear TRAM data & address lines */
  1152. for (i = 0; i < 256; i++)
  1153. set_bit(i, icode->tram_valid);
  1154. strcpy(icode->name, "Audigy DSP code for ALSA");
  1155. ptr = 0;
  1156. nctl = 0;
  1157. gpr = stereo_mix + 10;
  1158. gpr_map[gpr++] = 0x00007fff;
  1159. gpr_map[gpr++] = 0x00008000;
  1160. gpr_map[gpr++] = 0x0000ffff;
  1161. bit_shifter16 = gpr;
  1162. /* stop FX processor */
  1163. snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
  1164. #if 1
  1165. /* PCM front Playback Volume (independent from stereo mix)
  1166. * playback = 0 + ( gpr * FXBUS_PCM_LEFT_FRONT >> 31)
  1167. * where gpr contains attenuation from corresponding mixer control
  1168. * (snd_emu10k1_init_stereo_control)
  1169. */
  1170. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
  1171. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
  1172. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
  1173. gpr += 2;
  1174. /* PCM Surround Playback (independent from stereo mix) */
  1175. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
  1176. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
  1177. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
  1178. gpr += 2;
  1179. /* PCM Side Playback (independent from stereo mix) */
  1180. if (emu->card_capabilities->spk71) {
  1181. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
  1182. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
  1183. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
  1184. gpr += 2;
  1185. }
  1186. /* PCM Center Playback (independent from stereo mix) */
  1187. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
  1188. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
  1189. gpr++;
  1190. /* PCM LFE Playback (independent from stereo mix) */
  1191. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
  1192. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
  1193. gpr++;
  1194. /*
  1195. * Stereo Mix
  1196. */
  1197. /* Wave (PCM) Playback Volume (will be renamed later) */
  1198. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1199. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1200. snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
  1201. gpr += 2;
  1202. /* Synth Playback */
  1203. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1204. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1205. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
  1206. gpr += 2;
  1207. /* Wave (PCM) Capture */
  1208. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1209. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1210. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
  1211. gpr += 2;
  1212. /* Synth Capture */
  1213. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1214. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1215. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
  1216. gpr += 2;
  1217. /*
  1218. * inputs
  1219. */
  1220. #define A_ADD_VOLUME_IN(var,vol,input) \
  1221. A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
  1222. /* emu1212 DSP 0 and DSP 1 Capture */
  1223. if (emu->card_capabilities->emu_model) {
  1224. if (emu->card_capabilities->ca0108_chip) {
  1225. /* Note:JCD:No longer bit shift lower 16bits to upper 16bits of 32bit value. */
  1226. A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x0), A_C_00000001);
  1227. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_GPR(tmp));
  1228. A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x1), A_C_00000001);
  1229. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr), A_GPR(tmp));
  1230. } else {
  1231. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_P16VIN(0x0));
  1232. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_P16VIN(0x1));
  1233. }
  1234. snd_emu10k1_init_stereo_control(&controls[nctl++], "EMU Capture Volume", gpr, 0);
  1235. gpr += 2;
  1236. }
  1237. /* AC'97 Playback Volume - used only for mic (renamed later) */
  1238. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
  1239. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
  1240. snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
  1241. gpr += 2;
  1242. /* AC'97 Capture Volume - used only for mic */
  1243. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
  1244. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
  1245. snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
  1246. gpr += 2;
  1247. /* mic capture buffer */
  1248. A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
  1249. /* Audigy CD Playback Volume */
  1250. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
  1251. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1252. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1253. emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
  1254. gpr, 0);
  1255. gpr += 2;
  1256. /* Audigy CD Capture Volume */
  1257. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
  1258. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1259. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1260. emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
  1261. gpr, 0);
  1262. gpr += 2;
  1263. /* Optical SPDIF Playback Volume */
  1264. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
  1265. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1266. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
  1267. gpr += 2;
  1268. /* Optical SPDIF Capture Volume */
  1269. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
  1270. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1271. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
  1272. gpr += 2;
  1273. /* Line2 Playback Volume */
  1274. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
  1275. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
  1276. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1277. emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
  1278. gpr, 0);
  1279. gpr += 2;
  1280. /* Line2 Capture Volume */
  1281. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
  1282. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
  1283. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1284. emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
  1285. gpr, 0);
  1286. gpr += 2;
  1287. /* Philips ADC Playback Volume */
  1288. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
  1289. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
  1290. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
  1291. gpr += 2;
  1292. /* Philips ADC Capture Volume */
  1293. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
  1294. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
  1295. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
  1296. gpr += 2;
  1297. /* Aux2 Playback Volume */
  1298. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
  1299. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
  1300. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1301. emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
  1302. gpr, 0);
  1303. gpr += 2;
  1304. /* Aux2 Capture Volume */
  1305. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
  1306. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
  1307. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1308. emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
  1309. gpr, 0);
  1310. gpr += 2;
  1311. /* Stereo Mix Front Playback Volume */
  1312. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
  1313. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1314. snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
  1315. gpr += 2;
  1316. /* Stereo Mix Surround Playback */
  1317. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
  1318. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1319. snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
  1320. gpr += 2;
  1321. /* Stereo Mix Center Playback */
  1322. /* Center = sub = Left/2 + Right/2 */
  1323. A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
  1324. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
  1325. snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
  1326. gpr++;
  1327. /* Stereo Mix LFE Playback */
  1328. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
  1329. snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
  1330. gpr++;
  1331. if (emu->card_capabilities->spk71) {
  1332. /* Stereo Mix Side Playback */
  1333. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
  1334. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1335. snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
  1336. gpr += 2;
  1337. }
  1338. /*
  1339. * outputs
  1340. */
  1341. #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
  1342. #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
  1343. {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
  1344. #define _A_SWITCH(icode, ptr, dst, src, sw) \
  1345. A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
  1346. #define A_SWITCH(icode, ptr, dst, src, sw) \
  1347. _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
  1348. #define _A_SWITCH_NEG(icode, ptr, dst, src) \
  1349. A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
  1350. #define A_SWITCH_NEG(icode, ptr, dst, src) \
  1351. _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
  1352. /*
  1353. * Process tone control
  1354. */
  1355. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */
  1356. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */
  1357. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */
  1358. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */
  1359. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */
  1360. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */
  1361. if (emu->card_capabilities->spk71) {
  1362. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */
  1363. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */
  1364. }
  1365. ctl = &controls[nctl + 0];
  1366. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1367. strcpy(ctl->id.name, "Tone Control - Bass");
  1368. ctl->vcount = 2;
  1369. ctl->count = 10;
  1370. ctl->min = 0;
  1371. ctl->max = 40;
  1372. ctl->value[0] = ctl->value[1] = 20;
  1373. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1374. ctl = &controls[nctl + 1];
  1375. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1376. strcpy(ctl->id.name, "Tone Control - Treble");
  1377. ctl->vcount = 2;
  1378. ctl->count = 10;
  1379. ctl->min = 0;
  1380. ctl->max = 40;
  1381. ctl->value[0] = ctl->value[1] = 20;
  1382. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1383. #define BASS_GPR 0x8c
  1384. #define TREBLE_GPR 0x96
  1385. for (z = 0; z < 5; z++) {
  1386. int j;
  1387. for (j = 0; j < 2; j++) {
  1388. controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1389. controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1390. }
  1391. }
  1392. for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
  1393. int j, k, l, d;
  1394. for (j = 0; j < 2; j++) { /* left/right */
  1395. k = 0xb0 + (z * 8) + (j * 4);
  1396. l = 0xe0 + (z * 8) + (j * 4);
  1397. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1398. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j));
  1399. A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j));
  1400. A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j));
  1401. A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j));
  1402. A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j));
  1403. A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
  1404. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j));
  1405. A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j));
  1406. A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j));
  1407. A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j));
  1408. A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j));
  1409. A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
  1410. A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
  1411. if (z == 2) /* center */
  1412. break;
  1413. }
  1414. }
  1415. nctl += 2;
  1416. #undef BASS_GPR
  1417. #undef TREBLE_GPR
  1418. for (z = 0; z < 8; z++) {
  1419. A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1420. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1421. A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1422. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1423. }
  1424. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
  1425. gpr += 2;
  1426. /* Master volume (will be renamed later) */
  1427. A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
  1428. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
  1429. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
  1430. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
  1431. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
  1432. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
  1433. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
  1434. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
  1435. snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
  1436. gpr += 2;
  1437. /* analog speakers */
  1438. A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1439. A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1440. A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1441. A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1442. if (emu->card_capabilities->spk71)
  1443. A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1444. /* headphone */
  1445. A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1446. /* digital outputs */
  1447. /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
  1448. if (emu->card_capabilities->emu_model) {
  1449. /* EMU1010 Outputs from PCM Front, Rear, Center, LFE, Side */
  1450. dev_info(emu->card->dev, "EMU outputs on\n");
  1451. for (z = 0; z < 8; z++) {
  1452. if (emu->card_capabilities->ca0108_chip) {
  1453. A_OP(icode, &ptr, iACC3, A3_EMU32OUT(z), A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_C_00000000, A_C_00000000);
  1454. } else {
  1455. A_OP(icode, &ptr, iACC3, A_EMU32OUTL(z), A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_C_00000000, A_C_00000000);
  1456. }
  1457. }
  1458. }
  1459. /* IEC958 Optical Raw Playback Switch */
  1460. gpr_map[gpr++] = 0;
  1461. gpr_map[gpr++] = 0x1008;
  1462. gpr_map[gpr++] = 0xffff0000;
  1463. for (z = 0; z < 2; z++) {
  1464. A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
  1465. A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
  1466. A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
  1467. A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
  1468. A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
  1469. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1470. A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1471. if ((z==1) && (emu->card_capabilities->spdif_bug)) {
  1472. /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
  1473. dev_info(emu->card->dev,
  1474. "Installing spdif_bug patch: %s\n",
  1475. emu->card_capabilities->name);
  1476. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
  1477. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1478. } else {
  1479. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1480. }
  1481. }
  1482. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1483. gpr += 2;
  1484. A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1485. A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1486. A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1487. /* ADC buffer */
  1488. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1489. A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1490. #else
  1491. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
  1492. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
  1493. #endif
  1494. if (emu->card_capabilities->emu_model) {
  1495. if (emu->card_capabilities->ca0108_chip) {
  1496. dev_info(emu->card->dev, "EMU2 inputs on\n");
  1497. for (z = 0; z < 0x10; z++) {
  1498. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp,
  1499. bit_shifter16,
  1500. A3_EMU32IN(z),
  1501. A_FXBUS2(z*2) );
  1502. }
  1503. } else {
  1504. dev_info(emu->card->dev, "EMU inputs on\n");
  1505. /* Capture 16 (originally 8) channels of S32_LE sound */
  1506. /*
  1507. dev_dbg(emu->card->dev, "emufx.c: gpr=0x%x, tmp=0x%x\n",
  1508. gpr, tmp);
  1509. */
  1510. /* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */
  1511. /* A_P16VIN(0) is delayed by one sample,
  1512. * so all other A_P16VIN channels will need to also be delayed
  1513. */
  1514. /* Left ADC in. 1 of 2 */
  1515. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) );
  1516. /* Right ADC in 1 of 2 */
  1517. gpr_map[gpr++] = 0x00000000;
  1518. /* Delaying by one sample: instead of copying the input
  1519. * value A_P16VIN to output A_FXBUS2 as in the first channel,
  1520. * we use an auxiliary register, delaying the value by one
  1521. * sample
  1522. */
  1523. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) );
  1524. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000);
  1525. gpr_map[gpr++] = 0x00000000;
  1526. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(4) );
  1527. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x2), A_C_00000000, A_C_00000000);
  1528. gpr_map[gpr++] = 0x00000000;
  1529. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(6) );
  1530. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x3), A_C_00000000, A_C_00000000);
  1531. /* For 96kHz mode */
  1532. /* Left ADC in. 2 of 2 */
  1533. gpr_map[gpr++] = 0x00000000;
  1534. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0x8) );
  1535. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x4), A_C_00000000, A_C_00000000);
  1536. /* Right ADC in 2 of 2 */
  1537. gpr_map[gpr++] = 0x00000000;
  1538. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xa) );
  1539. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x5), A_C_00000000, A_C_00000000);
  1540. gpr_map[gpr++] = 0x00000000;
  1541. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xc) );
  1542. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x6), A_C_00000000, A_C_00000000);
  1543. gpr_map[gpr++] = 0x00000000;
  1544. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) );
  1545. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000);
  1546. /* Pavel Hofman - we still have voices, A_FXBUS2s, and
  1547. * A_P16VINs available -
  1548. * let's add 8 more capture channels - total of 16
  1549. */
  1550. gpr_map[gpr++] = 0x00000000;
  1551. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1552. bit_shifter16,
  1553. A_GPR(gpr - 1),
  1554. A_FXBUS2(0x10));
  1555. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x8),
  1556. A_C_00000000, A_C_00000000);
  1557. gpr_map[gpr++] = 0x00000000;
  1558. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1559. bit_shifter16,
  1560. A_GPR(gpr - 1),
  1561. A_FXBUS2(0x12));
  1562. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x9),
  1563. A_C_00000000, A_C_00000000);
  1564. gpr_map[gpr++] = 0x00000000;
  1565. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1566. bit_shifter16,
  1567. A_GPR(gpr - 1),
  1568. A_FXBUS2(0x14));
  1569. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xa),
  1570. A_C_00000000, A_C_00000000);
  1571. gpr_map[gpr++] = 0x00000000;
  1572. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1573. bit_shifter16,
  1574. A_GPR(gpr - 1),
  1575. A_FXBUS2(0x16));
  1576. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xb),
  1577. A_C_00000000, A_C_00000000);
  1578. gpr_map[gpr++] = 0x00000000;
  1579. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1580. bit_shifter16,
  1581. A_GPR(gpr - 1),
  1582. A_FXBUS2(0x18));
  1583. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xc),
  1584. A_C_00000000, A_C_00000000);
  1585. gpr_map[gpr++] = 0x00000000;
  1586. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1587. bit_shifter16,
  1588. A_GPR(gpr - 1),
  1589. A_FXBUS2(0x1a));
  1590. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xd),
  1591. A_C_00000000, A_C_00000000);
  1592. gpr_map[gpr++] = 0x00000000;
  1593. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1594. bit_shifter16,
  1595. A_GPR(gpr - 1),
  1596. A_FXBUS2(0x1c));
  1597. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xe),
  1598. A_C_00000000, A_C_00000000);
  1599. gpr_map[gpr++] = 0x00000000;
  1600. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1601. bit_shifter16,
  1602. A_GPR(gpr - 1),
  1603. A_FXBUS2(0x1e));
  1604. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xf),
  1605. A_C_00000000, A_C_00000000);
  1606. }
  1607. #if 0
  1608. for (z = 4; z < 8; z++) {
  1609. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000);
  1610. }
  1611. for (z = 0xc; z < 0x10; z++) {
  1612. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000);
  1613. }
  1614. #endif
  1615. } else {
  1616. /* EFX capture - capture the 16 EXTINs */
  1617. /* Capture 16 channels of S16_LE sound */
  1618. for (z = 0; z < 16; z++) {
  1619. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
  1620. }
  1621. }
  1622. #endif /* JCD test */
  1623. /*
  1624. * ok, set up done..
  1625. */
  1626. if (gpr > tmp) {
  1627. snd_BUG();
  1628. err = -EIO;
  1629. goto __err;
  1630. }
  1631. /* clear remaining instruction memory */
  1632. while (ptr < 0x400)
  1633. A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
  1634. icode->gpr_add_control_count = nctl;
  1635. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1636. emu->support_tlv = 1; /* support TLV */
  1637. err = snd_emu10k1_icode_poke(emu, icode, true);
  1638. emu->support_tlv = 0; /* clear again */
  1639. __err:
  1640. kfree(controls);
  1641. __err_ctrls:
  1642. kfree((void __force *)icode->gpr_map);
  1643. __err_gpr:
  1644. kfree(icode);
  1645. return err;
  1646. }
  1647. /*
  1648. * initial DSP configuration for Emu10k1
  1649. */
  1650. /* when volume = max, then copy only to avoid volume modification */
  1651. /* with iMAC0 (negative values) */
  1652. static void _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1653. {
  1654. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1655. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1656. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001);
  1657. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1658. }
  1659. static void _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1660. {
  1661. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1662. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1663. OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001);
  1664. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1665. OP(icode, ptr, iMAC0, dst, dst, src, vol);
  1666. }
  1667. static void _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1668. {
  1669. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1670. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1671. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1672. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1673. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1674. }
  1675. #define VOLUME(icode, ptr, dst, src, vol) \
  1676. _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1677. #define VOLUME_IN(icode, ptr, dst, src, vol) \
  1678. _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1679. #define VOLUME_ADD(icode, ptr, dst, src, vol) \
  1680. _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1681. #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
  1682. _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1683. #define VOLUME_OUT(icode, ptr, dst, src, vol) \
  1684. _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
  1685. #define _SWITCH(icode, ptr, dst, src, sw) \
  1686. OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
  1687. #define SWITCH(icode, ptr, dst, src, sw) \
  1688. _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
  1689. #define SWITCH_IN(icode, ptr, dst, src, sw) \
  1690. _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
  1691. #define _SWITCH_NEG(icode, ptr, dst, src) \
  1692. OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
  1693. #define SWITCH_NEG(icode, ptr, dst, src) \
  1694. _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
  1695. static int _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1696. {
  1697. int err, i, z, gpr, tmp, playback, capture;
  1698. u32 ptr;
  1699. struct snd_emu10k1_fx8010_code *icode;
  1700. struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
  1701. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1702. u32 *gpr_map;
  1703. err = -ENOMEM;
  1704. icode = kzalloc(sizeof(*icode), GFP_KERNEL);
  1705. if (!icode)
  1706. return err;
  1707. icode->gpr_map = (u_int32_t __user *) kcalloc(256 + 160 + 160 + 2 * 512,
  1708. sizeof(u_int32_t), GFP_KERNEL);
  1709. if (!icode->gpr_map)
  1710. goto __err_gpr;
  1711. controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1712. sizeof(struct snd_emu10k1_fx8010_control_gpr),
  1713. GFP_KERNEL);
  1714. if (!controls)
  1715. goto __err_ctrls;
  1716. ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
  1717. if (!ipcm)
  1718. goto __err_ipcm;
  1719. gpr_map = (u32 __force *)icode->gpr_map;
  1720. icode->tram_data_map = icode->gpr_map + 256;
  1721. icode->tram_addr_map = icode->tram_data_map + 160;
  1722. icode->code = icode->tram_addr_map + 160;
  1723. /* clear free GPRs */
  1724. for (i = 0; i < 256; i++)
  1725. set_bit(i, icode->gpr_valid);
  1726. /* clear TRAM data & address lines */
  1727. for (i = 0; i < 160; i++)
  1728. set_bit(i, icode->tram_valid);
  1729. strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
  1730. ptr = 0; i = 0;
  1731. /* we have 12 inputs */
  1732. playback = SND_EMU10K1_INPUTS;
  1733. /* we have 6 playback channels and tone control doubles */
  1734. capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2);
  1735. gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
  1736. tmp = 0x88; /* we need 4 temporary GPR */
  1737. /* from 0x8c to 0xff is the area for tone control */
  1738. /* stop FX processor */
  1739. snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP);
  1740. /*
  1741. * Process FX Buses
  1742. */
  1743. OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004);
  1744. OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004);
  1745. OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004);
  1746. OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004);
  1747. OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004);
  1748. OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004);
  1749. OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004);
  1750. OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004);
  1751. OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
  1752. OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
  1753. OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004);
  1754. OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004);
  1755. /* Raw S/PDIF PCM */
  1756. ipcm->substream = 0;
  1757. ipcm->channels = 2;
  1758. ipcm->tram_start = 0;
  1759. ipcm->buffer_size = (64 * 1024) / 2;
  1760. ipcm->gpr_size = gpr++;
  1761. ipcm->gpr_ptr = gpr++;
  1762. ipcm->gpr_count = gpr++;
  1763. ipcm->gpr_tmpcount = gpr++;
  1764. ipcm->gpr_trigger = gpr++;
  1765. ipcm->gpr_running = gpr++;
  1766. ipcm->etram[0] = 0;
  1767. ipcm->etram[1] = 1;
  1768. gpr_map[gpr + 0] = 0xfffff000;
  1769. gpr_map[gpr + 1] = 0xffff0000;
  1770. gpr_map[gpr + 2] = 0x70000000;
  1771. gpr_map[gpr + 3] = 0x00000007;
  1772. gpr_map[gpr + 4] = 0x001f << 11;
  1773. gpr_map[gpr + 5] = 0x001c << 11;
  1774. gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
  1775. gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
  1776. gpr_map[gpr + 8] = 0x2000000 + (2<<11);
  1777. gpr_map[gpr + 9] = 0x4000000 + (2<<11);
  1778. gpr_map[gpr + 10] = 1<<11;
  1779. gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
  1780. gpr_map[gpr + 12] = 0;
  1781. /* if the trigger flag is not set, skip */
  1782. /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
  1783. /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
  1784. /* if the running flag is set, we're running */
  1785. /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
  1786. /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
  1787. /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
  1788. /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
  1789. /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
  1790. /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
  1791. /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
  1792. /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
  1793. /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
  1794. /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
  1795. /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
  1796. /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
  1797. /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1798. /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1799. /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1800. /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
  1801. /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
  1802. /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1803. /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1804. /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1805. /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
  1806. /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
  1807. /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
  1808. /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
  1809. /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
  1810. /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
  1811. /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
  1812. /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1813. /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
  1814. /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
  1815. /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
  1816. /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
  1817. /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
  1818. /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
  1819. /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
  1820. /* 24: */
  1821. gpr += 13;
  1822. /* Wave Playback Volume */
  1823. for (z = 0; z < 2; z++)
  1824. VOLUME(icode, &ptr, playback + z, z, gpr + z);
  1825. snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
  1826. gpr += 2;
  1827. /* Wave Surround Playback Volume */
  1828. for (z = 0; z < 2; z++)
  1829. VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
  1830. snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
  1831. gpr += 2;
  1832. /* Wave Center/LFE Playback Volume */
  1833. OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
  1834. OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002);
  1835. VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
  1836. snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
  1837. VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
  1838. snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
  1839. /* Wave Capture Volume + Switch */
  1840. for (z = 0; z < 2; z++) {
  1841. SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
  1842. VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1843. }
  1844. snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
  1845. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
  1846. gpr += 4;
  1847. /* Synth Playback Volume */
  1848. for (z = 0; z < 2; z++)
  1849. VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
  1850. snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
  1851. gpr += 2;
  1852. /* Synth Capture Volume + Switch */
  1853. for (z = 0; z < 2; z++) {
  1854. SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
  1855. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1856. }
  1857. snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
  1858. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
  1859. gpr += 4;
  1860. /* Surround Digital Playback Volume (renamed later without Digital) */
  1861. for (z = 0; z < 2; z++)
  1862. VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
  1863. snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
  1864. gpr += 2;
  1865. /* Surround Capture Volume + Switch */
  1866. for (z = 0; z < 2; z++) {
  1867. SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
  1868. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1869. }
  1870. snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
  1871. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
  1872. gpr += 4;
  1873. /* Center Playback Volume (renamed later without Digital) */
  1874. VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
  1875. snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
  1876. /* LFE Playback Volume + Switch (renamed later without Digital) */
  1877. VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
  1878. snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
  1879. /* Front Playback Volume */
  1880. for (z = 0; z < 2; z++)
  1881. VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
  1882. snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
  1883. gpr += 2;
  1884. /* Front Capture Volume + Switch */
  1885. for (z = 0; z < 2; z++) {
  1886. SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
  1887. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1888. }
  1889. snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
  1890. snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
  1891. gpr += 3;
  1892. /*
  1893. * Process inputs
  1894. */
  1895. if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
  1896. /* AC'97 Playback Volume */
  1897. VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
  1898. VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
  1899. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
  1900. /* AC'97 Capture Volume */
  1901. VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
  1902. VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
  1903. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
  1904. }
  1905. if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
  1906. /* IEC958 TTL Playback Volume */
  1907. for (z = 0; z < 2; z++)
  1908. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
  1909. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
  1910. gpr += 2;
  1911. /* IEC958 TTL Capture Volume + Switch */
  1912. for (z = 0; z < 2; z++) {
  1913. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
  1914. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1915. }
  1916. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
  1917. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
  1918. gpr += 4;
  1919. }
  1920. if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
  1921. /* Zoom Video Playback Volume */
  1922. for (z = 0; z < 2; z++)
  1923. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
  1924. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
  1925. gpr += 2;
  1926. /* Zoom Video Capture Volume + Switch */
  1927. for (z = 0; z < 2; z++) {
  1928. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
  1929. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1930. }
  1931. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
  1932. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
  1933. gpr += 4;
  1934. }
  1935. if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
  1936. /* IEC958 Optical Playback Volume */
  1937. for (z = 0; z < 2; z++)
  1938. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
  1939. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
  1940. gpr += 2;
  1941. /* IEC958 Optical Capture Volume */
  1942. for (z = 0; z < 2; z++) {
  1943. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
  1944. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1945. }
  1946. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
  1947. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
  1948. gpr += 4;
  1949. }
  1950. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
  1951. /* Line LiveDrive Playback Volume */
  1952. for (z = 0; z < 2; z++)
  1953. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
  1954. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
  1955. gpr += 2;
  1956. /* Line LiveDrive Capture Volume + Switch */
  1957. for (z = 0; z < 2; z++) {
  1958. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
  1959. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1960. }
  1961. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
  1962. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
  1963. gpr += 4;
  1964. }
  1965. if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
  1966. /* IEC958 Coax Playback Volume */
  1967. for (z = 0; z < 2; z++)
  1968. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
  1969. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
  1970. gpr += 2;
  1971. /* IEC958 Coax Capture Volume + Switch */
  1972. for (z = 0; z < 2; z++) {
  1973. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
  1974. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1975. }
  1976. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
  1977. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
  1978. gpr += 4;
  1979. }
  1980. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
  1981. /* Line LiveDrive Playback Volume */
  1982. for (z = 0; z < 2; z++)
  1983. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
  1984. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
  1985. controls[i-1].id.index = 1;
  1986. gpr += 2;
  1987. /* Line LiveDrive Capture Volume */
  1988. for (z = 0; z < 2; z++) {
  1989. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
  1990. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1991. }
  1992. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
  1993. controls[i-1].id.index = 1;
  1994. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
  1995. controls[i-1].id.index = 1;
  1996. gpr += 4;
  1997. }
  1998. /*
  1999. * Process tone control
  2000. */
  2001. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */
  2002. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */
  2003. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */
  2004. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */
  2005. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */
  2006. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */
  2007. ctl = &controls[i + 0];
  2008. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  2009. strcpy(ctl->id.name, "Tone Control - Bass");
  2010. ctl->vcount = 2;
  2011. ctl->count = 10;
  2012. ctl->min = 0;
  2013. ctl->max = 40;
  2014. ctl->value[0] = ctl->value[1] = 20;
  2015. ctl->tlv = snd_emu10k1_bass_treble_db_scale;
  2016. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  2017. ctl = &controls[i + 1];
  2018. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  2019. strcpy(ctl->id.name, "Tone Control - Treble");
  2020. ctl->vcount = 2;
  2021. ctl->count = 10;
  2022. ctl->min = 0;
  2023. ctl->max = 40;
  2024. ctl->value[0] = ctl->value[1] = 20;
  2025. ctl->tlv = snd_emu10k1_bass_treble_db_scale;
  2026. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  2027. #define BASS_GPR 0x8c
  2028. #define TREBLE_GPR 0x96
  2029. for (z = 0; z < 5; z++) {
  2030. int j;
  2031. for (j = 0; j < 2; j++) {
  2032. controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  2033. controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  2034. }
  2035. }
  2036. for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
  2037. int j, k, l, d;
  2038. for (j = 0; j < 2; j++) { /* left/right */
  2039. k = 0xa0 + (z * 8) + (j * 4);
  2040. l = 0xd0 + (z * 8) + (j * 4);
  2041. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  2042. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
  2043. OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
  2044. OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
  2045. OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
  2046. OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
  2047. OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
  2048. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
  2049. OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
  2050. OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
  2051. OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
  2052. OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
  2053. OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
  2054. OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
  2055. if (z == 2) /* center */
  2056. break;
  2057. }
  2058. }
  2059. i += 2;
  2060. #undef BASS_GPR
  2061. #undef TREBLE_GPR
  2062. for (z = 0; z < 6; z++) {
  2063. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  2064. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  2065. SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  2066. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2067. }
  2068. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
  2069. gpr += 2;
  2070. /*
  2071. * Process outputs
  2072. */
  2073. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
  2074. /* AC'97 Playback Volume */
  2075. for (z = 0; z < 2; z++)
  2076. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000);
  2077. }
  2078. if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
  2079. /* IEC958 Optical Raw Playback Switch */
  2080. for (z = 0; z < 2; z++) {
  2081. SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
  2082. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  2083. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  2084. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2085. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  2086. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2087. #endif
  2088. }
  2089. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  2090. gpr += 2;
  2091. }
  2092. if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
  2093. /* Headphone Playback Volume */
  2094. for (z = 0; z < 2; z++) {
  2095. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z);
  2096. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
  2097. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  2098. OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2099. VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
  2100. }
  2101. snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
  2102. controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
  2103. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
  2104. controls[i-1].id.index = 1;
  2105. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
  2106. controls[i-1].id.index = 1;
  2107. gpr += 4;
  2108. }
  2109. if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
  2110. for (z = 0; z < 2; z++)
  2111. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  2112. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
  2113. for (z = 0; z < 2; z++)
  2114. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  2115. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
  2116. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  2117. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  2118. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  2119. #else
  2120. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  2121. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  2122. #endif
  2123. }
  2124. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
  2125. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  2126. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  2127. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  2128. #else
  2129. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  2130. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  2131. #endif
  2132. }
  2133. #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
  2134. for (z = 0; z < 2; z++)
  2135. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
  2136. #endif
  2137. if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
  2138. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
  2139. /* EFX capture - capture the 16 EXTINS */
  2140. if (emu->card_capabilities->sblive51) {
  2141. /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
  2142. * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
  2143. *
  2144. * Since only 14 of the 16 EXTINs are used, this is not a big problem.
  2145. * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
  2146. * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
  2147. * channel. Multitrack recorders will still see the center/lfe output signal
  2148. * on the second and third channels.
  2149. */
  2150. OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0));
  2151. OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1));
  2152. OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2));
  2153. OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3));
  2154. for (z = 4; z < 14; z++)
  2155. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  2156. } else {
  2157. for (z = 0; z < 16; z++)
  2158. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  2159. }
  2160. if (gpr > tmp) {
  2161. snd_BUG();
  2162. err = -EIO;
  2163. goto __err;
  2164. }
  2165. if (i > SND_EMU10K1_GPR_CONTROLS) {
  2166. snd_BUG();
  2167. err = -EIO;
  2168. goto __err;
  2169. }
  2170. /* clear remaining instruction memory */
  2171. while (ptr < 0x200)
  2172. OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
  2173. if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0)
  2174. goto __err;
  2175. icode->gpr_add_control_count = i;
  2176. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  2177. emu->support_tlv = 1; /* support TLV */
  2178. err = snd_emu10k1_icode_poke(emu, icode, true);
  2179. emu->support_tlv = 0; /* clear again */
  2180. if (err >= 0)
  2181. err = snd_emu10k1_ipcm_poke(emu, ipcm);
  2182. __err:
  2183. kfree(ipcm);
  2184. __err_ipcm:
  2185. kfree(controls);
  2186. __err_ctrls:
  2187. kfree((void __force *)icode->gpr_map);
  2188. __err_gpr:
  2189. kfree(icode);
  2190. return err;
  2191. }
  2192. int snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  2193. {
  2194. spin_lock_init(&emu->fx8010.irq_lock);
  2195. INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
  2196. if (emu->audigy)
  2197. return _snd_emu10k1_audigy_init_efx(emu);
  2198. else
  2199. return _snd_emu10k1_init_efx(emu);
  2200. }
  2201. void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
  2202. {
  2203. /* stop processor */
  2204. if (emu->audigy)
  2205. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
  2206. else
  2207. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
  2208. }
  2209. #if 0 /* FIXME: who use them? */
  2210. int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
  2211. {
  2212. if (output < 0 || output >= 6)
  2213. return -EINVAL;
  2214. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
  2215. return 0;
  2216. }
  2217. int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
  2218. {
  2219. if (output < 0 || output >= 6)
  2220. return -EINVAL;
  2221. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
  2222. return 0;
  2223. }
  2224. #endif
  2225. int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
  2226. {
  2227. u8 size_reg = 0;
  2228. /* size is in samples */
  2229. if (size != 0) {
  2230. size = (size - 1) >> 13;
  2231. while (size) {
  2232. size >>= 1;
  2233. size_reg++;
  2234. }
  2235. size = 0x2000 << size_reg;
  2236. }
  2237. if ((emu->fx8010.etram_pages.bytes / 2) == size)
  2238. return 0;
  2239. spin_lock_irq(&emu->emu_lock);
  2240. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2241. spin_unlock_irq(&emu->emu_lock);
  2242. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  2243. snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
  2244. if (emu->fx8010.etram_pages.area != NULL) {
  2245. snd_dma_free_pages(&emu->fx8010.etram_pages);
  2246. emu->fx8010.etram_pages.area = NULL;
  2247. emu->fx8010.etram_pages.bytes = 0;
  2248. }
  2249. if (size > 0) {
  2250. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci),
  2251. size * 2, &emu->fx8010.etram_pages) < 0)
  2252. return -ENOMEM;
  2253. memset(emu->fx8010.etram_pages.area, 0, size * 2);
  2254. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2255. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2256. spin_lock_irq(&emu->emu_lock);
  2257. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2258. spin_unlock_irq(&emu->emu_lock);
  2259. }
  2260. return 0;
  2261. }
  2262. static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
  2263. {
  2264. return 0;
  2265. }
  2266. static void copy_string(char *dst, char *src, char *null, int idx)
  2267. {
  2268. if (src == NULL)
  2269. sprintf(dst, "%s %02X", null, idx);
  2270. else
  2271. strcpy(dst, src);
  2272. }
  2273. static void snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
  2274. struct snd_emu10k1_fx8010_info *info)
  2275. {
  2276. char **fxbus, **extin, **extout;
  2277. unsigned short fxbus_mask, extin_mask, extout_mask;
  2278. int res;
  2279. info->internal_tram_size = emu->fx8010.itram_size;
  2280. info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
  2281. fxbus = fxbuses;
  2282. extin = emu->audigy ? audigy_ins : creative_ins;
  2283. extout = emu->audigy ? audigy_outs : creative_outs;
  2284. fxbus_mask = emu->fx8010.fxbus_mask;
  2285. extin_mask = emu->fx8010.extin_mask;
  2286. extout_mask = emu->fx8010.extout_mask;
  2287. for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
  2288. copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res);
  2289. copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
  2290. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2291. }
  2292. for (res = 16; res < 32; res++, extout++)
  2293. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2294. info->gpr_controls = emu->fx8010.gpr_count;
  2295. }
  2296. static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
  2297. {
  2298. struct snd_emu10k1 *emu = hw->private_data;
  2299. struct snd_emu10k1_fx8010_info *info;
  2300. struct snd_emu10k1_fx8010_code *icode;
  2301. struct snd_emu10k1_fx8010_pcm_rec *ipcm;
  2302. unsigned int addr;
  2303. void __user *argp = (void __user *)arg;
  2304. int res;
  2305. switch (cmd) {
  2306. case SNDRV_EMU10K1_IOCTL_PVERSION:
  2307. emu->support_tlv = 1;
  2308. return put_user(SNDRV_EMU10K1_VERSION, (int __user *)argp);
  2309. case SNDRV_EMU10K1_IOCTL_INFO:
  2310. info = kzalloc(sizeof(*info), GFP_KERNEL);
  2311. if (!info)
  2312. return -ENOMEM;
  2313. snd_emu10k1_fx8010_info(emu, info);
  2314. if (copy_to_user(argp, info, sizeof(*info))) {
  2315. kfree(info);
  2316. return -EFAULT;
  2317. }
  2318. kfree(info);
  2319. return 0;
  2320. case SNDRV_EMU10K1_IOCTL_CODE_POKE:
  2321. if (!capable(CAP_SYS_ADMIN))
  2322. return -EPERM;
  2323. icode = memdup_user(argp, sizeof(*icode));
  2324. if (IS_ERR(icode))
  2325. return PTR_ERR(icode);
  2326. res = snd_emu10k1_icode_poke(emu, icode, false);
  2327. kfree(icode);
  2328. return res;
  2329. case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
  2330. icode = memdup_user(argp, sizeof(*icode));
  2331. if (IS_ERR(icode))
  2332. return PTR_ERR(icode);
  2333. res = snd_emu10k1_icode_peek(emu, icode);
  2334. if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
  2335. kfree(icode);
  2336. return -EFAULT;
  2337. }
  2338. kfree(icode);
  2339. return res;
  2340. case SNDRV_EMU10K1_IOCTL_PCM_POKE:
  2341. ipcm = memdup_user(argp, sizeof(*ipcm));
  2342. if (IS_ERR(ipcm))
  2343. return PTR_ERR(ipcm);
  2344. res = snd_emu10k1_ipcm_poke(emu, ipcm);
  2345. kfree(ipcm);
  2346. return res;
  2347. case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
  2348. ipcm = memdup_user(argp, sizeof(*ipcm));
  2349. if (IS_ERR(ipcm))
  2350. return PTR_ERR(ipcm);
  2351. res = snd_emu10k1_ipcm_peek(emu, ipcm);
  2352. if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
  2353. kfree(ipcm);
  2354. return -EFAULT;
  2355. }
  2356. kfree(ipcm);
  2357. return res;
  2358. case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
  2359. if (!capable(CAP_SYS_ADMIN))
  2360. return -EPERM;
  2361. if (get_user(addr, (unsigned int __user *)argp))
  2362. return -EFAULT;
  2363. mutex_lock(&emu->fx8010.lock);
  2364. res = snd_emu10k1_fx8010_tram_setup(emu, addr);
  2365. mutex_unlock(&emu->fx8010.lock);
  2366. return res;
  2367. case SNDRV_EMU10K1_IOCTL_STOP:
  2368. if (!capable(CAP_SYS_ADMIN))
  2369. return -EPERM;
  2370. if (emu->audigy)
  2371. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
  2372. else
  2373. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
  2374. return 0;
  2375. case SNDRV_EMU10K1_IOCTL_CONTINUE:
  2376. if (!capable(CAP_SYS_ADMIN))
  2377. return -EPERM;
  2378. if (emu->audigy)
  2379. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
  2380. else
  2381. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
  2382. return 0;
  2383. case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
  2384. if (!capable(CAP_SYS_ADMIN))
  2385. return -EPERM;
  2386. if (emu->audigy)
  2387. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
  2388. else
  2389. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
  2390. udelay(10);
  2391. if (emu->audigy)
  2392. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2393. else
  2394. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2395. return 0;
  2396. case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
  2397. if (!capable(CAP_SYS_ADMIN))
  2398. return -EPERM;
  2399. if (get_user(addr, (unsigned int __user *)argp))
  2400. return -EFAULT;
  2401. if (addr > 0x1ff)
  2402. return -EINVAL;
  2403. if (emu->audigy)
  2404. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr);
  2405. else
  2406. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr);
  2407. udelay(10);
  2408. if (emu->audigy)
  2409. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr);
  2410. else
  2411. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr);
  2412. return 0;
  2413. case SNDRV_EMU10K1_IOCTL_DBG_READ:
  2414. if (emu->audigy)
  2415. addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
  2416. else
  2417. addr = snd_emu10k1_ptr_read(emu, DBG, 0);
  2418. if (put_user(addr, (unsigned int __user *)argp))
  2419. return -EFAULT;
  2420. return 0;
  2421. }
  2422. return -ENOTTY;
  2423. }
  2424. static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
  2425. {
  2426. return 0;
  2427. }
  2428. int snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device)
  2429. {
  2430. struct snd_hwdep *hw;
  2431. int err;
  2432. if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0)
  2433. return err;
  2434. strcpy(hw->name, "EMU10K1 (FX8010)");
  2435. hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
  2436. hw->ops.open = snd_emu10k1_fx8010_open;
  2437. hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
  2438. hw->ops.release = snd_emu10k1_fx8010_release;
  2439. hw->private_data = emu;
  2440. return 0;
  2441. }
  2442. #ifdef CONFIG_PM_SLEEP
  2443. int snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
  2444. {
  2445. int len;
  2446. len = emu->audigy ? 0x200 : 0x100;
  2447. emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL);
  2448. if (! emu->saved_gpr)
  2449. return -ENOMEM;
  2450. len = emu->audigy ? 0x100 : 0xa0;
  2451. emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL);
  2452. emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL);
  2453. if (! emu->tram_val_saved || ! emu->tram_addr_saved)
  2454. return -ENOMEM;
  2455. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2456. emu->saved_icode = vmalloc(len * 4);
  2457. if (! emu->saved_icode)
  2458. return -ENOMEM;
  2459. return 0;
  2460. }
  2461. void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
  2462. {
  2463. kfree(emu->saved_gpr);
  2464. kfree(emu->tram_val_saved);
  2465. kfree(emu->tram_addr_saved);
  2466. vfree(emu->saved_icode);
  2467. }
  2468. /*
  2469. * save/restore GPR, TRAM and codes
  2470. */
  2471. void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
  2472. {
  2473. int i, len;
  2474. len = emu->audigy ? 0x200 : 0x100;
  2475. for (i = 0; i < len; i++)
  2476. emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
  2477. len = emu->audigy ? 0x100 : 0xa0;
  2478. for (i = 0; i < len; i++) {
  2479. emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
  2480. emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
  2481. if (emu->audigy) {
  2482. emu->tram_addr_saved[i] >>= 12;
  2483. emu->tram_addr_saved[i] |=
  2484. snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
  2485. }
  2486. }
  2487. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2488. for (i = 0; i < len; i++)
  2489. emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
  2490. }
  2491. void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
  2492. {
  2493. int i, len;
  2494. /* set up TRAM */
  2495. if (emu->fx8010.etram_pages.bytes > 0) {
  2496. unsigned size, size_reg = 0;
  2497. size = emu->fx8010.etram_pages.bytes / 2;
  2498. size = (size - 1) >> 13;
  2499. while (size) {
  2500. size >>= 1;
  2501. size_reg++;
  2502. }
  2503. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2504. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2505. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2506. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2507. }
  2508. if (emu->audigy)
  2509. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  2510. else
  2511. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  2512. len = emu->audigy ? 0x200 : 0x100;
  2513. for (i = 0; i < len; i++)
  2514. snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
  2515. len = emu->audigy ? 0x100 : 0xa0;
  2516. for (i = 0; i < len; i++) {
  2517. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
  2518. emu->tram_val_saved[i]);
  2519. if (! emu->audigy)
  2520. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2521. emu->tram_addr_saved[i]);
  2522. else {
  2523. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2524. emu->tram_addr_saved[i] << 12);
  2525. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2526. emu->tram_addr_saved[i] >> 20);
  2527. }
  2528. }
  2529. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2530. for (i = 0; i < len; i++)
  2531. snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
  2532. /* start FX processor when the DSP code is updated */
  2533. if (emu->audigy)
  2534. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2535. else
  2536. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2537. }
  2538. #endif