ca0106_main.c 59 KB

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  1. /*
  2. * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
  3. * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
  4. * Version: 0.0.25
  5. *
  6. * FEATURES currently supported:
  7. * Front, Rear and Center/LFE.
  8. * Surround40 and Surround51.
  9. * Capture from MIC an LINE IN input.
  10. * SPDIF digital playback of PCM stereo and AC3/DTS works.
  11. * (One can use a standard mono mini-jack to one RCA plugs cable.
  12. * or one can use a standard stereo mini-jack to two RCA plugs cable.
  13. * Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
  14. * ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
  15. * Notes on how to capture sound:
  16. * The AC97 is used in the PLAYBACK direction.
  17. * The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
  18. * So, to record from the MIC, set the MIC Playback volume to max,
  19. * unmute the MIC and turn up the MASTER Playback volume.
  20. * So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
  21. *
  22. * The only playback controls that currently do anything are: -
  23. * Analog Front
  24. * Analog Rear
  25. * Analog Center/LFE
  26. * SPDIF Front
  27. * SPDIF Rear
  28. * SPDIF Center/LFE
  29. *
  30. * For capture from Mic in or Line in.
  31. * Digital/Analog ( switch must be in Analog mode for CAPTURE. )
  32. *
  33. * CAPTURE feedback into PLAYBACK
  34. *
  35. * Changelog:
  36. * Support interrupts per period.
  37. * Removed noise from Center/LFE channel when in Analog mode.
  38. * Rename and remove mixer controls.
  39. * 0.0.6
  40. * Use separate card based DMA buffer for periods table list.
  41. * 0.0.7
  42. * Change remove and rename ctrls into lists.
  43. * 0.0.8
  44. * Try to fix capture sources.
  45. * 0.0.9
  46. * Fix AC3 output.
  47. * Enable S32_LE format support.
  48. * 0.0.10
  49. * Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
  50. * 0.0.11
  51. * Add Model name recognition.
  52. * 0.0.12
  53. * Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
  54. * Remove redundent "voice" handling.
  55. * 0.0.13
  56. * Single trigger call for multi channels.
  57. * 0.0.14
  58. * Set limits based on what the sound card hardware can do.
  59. * playback periods_min=2, periods_max=8
  60. * capture hw constraints require period_size = n * 64 bytes.
  61. * playback hw constraints require period_size = n * 64 bytes.
  62. * 0.0.15
  63. * Minor updates.
  64. * 0.0.16
  65. * Implement 192000 sample rate.
  66. * 0.0.17
  67. * Add support for SB0410 and SB0413.
  68. * 0.0.18
  69. * Modified Copyright message.
  70. * 0.0.19
  71. * Finally fix support for SB Live 24 bit. SB0410 and SB0413.
  72. * The output codec needs resetting, otherwise all output is muted.
  73. * 0.0.20
  74. * Merge "pci_disable_device(pci);" fixes.
  75. * 0.0.21
  76. * Add 4 capture channels. (SPDIF only comes in on channel 0. )
  77. * Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
  78. * 0.0.22
  79. * Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
  80. * 0.0.23
  81. * Implement support for Line-in capture on SB Live 24bit.
  82. * 0.0.24
  83. * Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
  84. * 0.0.25
  85. * Powerdown SPI DAC channels when not in use
  86. *
  87. * BUGS:
  88. * Some stability problems when unloading the snd-ca0106 kernel module.
  89. * --
  90. *
  91. * TODO:
  92. * 4 Capture channels, only one implemented so far.
  93. * Other capture rates apart from 48khz not implemented.
  94. * MIDI
  95. * --
  96. * GENERAL INFO:
  97. * Model: SB0310
  98. * P17 Chip: CA0106-DAT
  99. * AC97 Codec: STAC 9721
  100. * ADC: Philips 1361T (Stereo 24bit)
  101. * DAC: WM8746EDS (6-channel, 24bit, 192Khz)
  102. *
  103. * GENERAL INFO:
  104. * Model: SB0410
  105. * P17 Chip: CA0106-DAT
  106. * AC97 Codec: None
  107. * ADC: WM8775EDS (4 Channel)
  108. * DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
  109. * SPDIF Out control switches between Mic in and SPDIF out.
  110. * No sound out or mic input working yet.
  111. *
  112. * GENERAL INFO:
  113. * Model: SB0413
  114. * P17 Chip: CA0106-DAT
  115. * AC97 Codec: None.
  116. * ADC: Unknown
  117. * DAC: Unknown
  118. * Trying to handle it like the SB0410.
  119. *
  120. * This code was initially based on code from ALSA's emu10k1x.c which is:
  121. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  122. *
  123. * This program is free software; you can redistribute it and/or modify
  124. * it under the terms of the GNU General Public License as published by
  125. * the Free Software Foundation; either version 2 of the License, or
  126. * (at your option) any later version.
  127. *
  128. * This program is distributed in the hope that it will be useful,
  129. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  130. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  131. * GNU General Public License for more details.
  132. *
  133. * You should have received a copy of the GNU General Public License
  134. * along with this program; if not, write to the Free Software
  135. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  136. *
  137. */
  138. #include <linux/delay.h>
  139. #include <linux/init.h>
  140. #include <linux/interrupt.h>
  141. #include <linux/pci.h>
  142. #include <linux/slab.h>
  143. #include <linux/module.h>
  144. #include <linux/dma-mapping.h>
  145. #include <sound/core.h>
  146. #include <sound/initval.h>
  147. #include <sound/pcm.h>
  148. #include <sound/ac97_codec.h>
  149. #include <sound/info.h>
  150. MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
  151. MODULE_DESCRIPTION("CA0106");
  152. MODULE_LICENSE("GPL");
  153. MODULE_SUPPORTED_DEVICE("{{Creative,SB CA0106 chip}}");
  154. // module parameters (see "Module Parameters")
  155. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  156. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  157. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  158. static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
  159. module_param_array(index, int, NULL, 0444);
  160. MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
  161. module_param_array(id, charp, NULL, 0444);
  162. MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
  163. module_param_array(enable, bool, NULL, 0444);
  164. MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
  165. module_param_array(subsystem, uint, NULL, 0444);
  166. MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
  167. #include "ca0106.h"
  168. static struct snd_ca0106_details ca0106_chip_details[] = {
  169. /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
  170. /* It is really just a normal SB Live 24bit. */
  171. /* Tested:
  172. * See ALSA bug#3251
  173. */
  174. { .serial = 0x10131102,
  175. .name = "X-Fi Extreme Audio [SBxxxx]",
  176. .gpio_type = 1,
  177. .i2c_adc = 1 } ,
  178. /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
  179. /* It is really just a normal SB Live 24bit. */
  180. /*
  181. * CTRL:CA0111-WTLF
  182. * ADC: WM8775SEDS
  183. * DAC: CS4382-KQZ
  184. */
  185. /* Tested:
  186. * Playback on front, rear, center/lfe speakers
  187. * Capture from Mic in.
  188. * Not-Tested:
  189. * Capture from Line in.
  190. * Playback to digital out.
  191. */
  192. { .serial = 0x10121102,
  193. .name = "X-Fi Extreme Audio [SB0790]",
  194. .gpio_type = 1,
  195. .i2c_adc = 1 } ,
  196. /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
  197. /* AudigyLS[SB0310] */
  198. { .serial = 0x10021102,
  199. .name = "AudigyLS [SB0310]",
  200. .ac97 = 1 } ,
  201. /* Unknown AudigyLS that also says SB0310 on it */
  202. { .serial = 0x10051102,
  203. .name = "AudigyLS [SB0310b]",
  204. .ac97 = 1 } ,
  205. /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
  206. { .serial = 0x10061102,
  207. .name = "Live! 7.1 24bit [SB0410]",
  208. .gpio_type = 1,
  209. .i2c_adc = 1 } ,
  210. /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
  211. { .serial = 0x10071102,
  212. .name = "Live! 7.1 24bit [SB0413]",
  213. .gpio_type = 1,
  214. .i2c_adc = 1 } ,
  215. /* New Audigy SE. Has a different DAC. */
  216. /* SB0570:
  217. * CTRL:CA0106-DAT
  218. * ADC: WM8775EDS
  219. * DAC: WM8768GEDS
  220. */
  221. { .serial = 0x100a1102,
  222. .name = "Audigy SE [SB0570]",
  223. .gpio_type = 1,
  224. .i2c_adc = 1,
  225. .spi_dac = 0x4021 } ,
  226. /* New Audigy LS. Has a different DAC. */
  227. /* SB0570:
  228. * CTRL:CA0106-DAT
  229. * ADC: WM8775EDS
  230. * DAC: WM8768GEDS
  231. */
  232. { .serial = 0x10111102,
  233. .name = "Audigy SE OEM [SB0570a]",
  234. .gpio_type = 1,
  235. .i2c_adc = 1,
  236. .spi_dac = 0x4021 } ,
  237. /* Sound Blaster 5.1vx
  238. * Tested: Playback on front, rear, center/lfe speakers
  239. * Not-Tested: Capture
  240. */
  241. { .serial = 0x10041102,
  242. .name = "Sound Blaster 5.1vx [SB1070]",
  243. .gpio_type = 1,
  244. .i2c_adc = 0,
  245. .spi_dac = 0x0124
  246. } ,
  247. /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
  248. /* SB0438
  249. * CTRL:CA0106-DAT
  250. * ADC: WM8775SEDS
  251. * DAC: CS4382-KQZ
  252. */
  253. { .serial = 0x10091462,
  254. .name = "MSI K8N Diamond MB [SB0438]",
  255. .gpio_type = 2,
  256. .i2c_adc = 1 } ,
  257. /* MSI K8N Diamond PLUS MB */
  258. { .serial = 0x10091102,
  259. .name = "MSI K8N Diamond MB",
  260. .gpio_type = 2,
  261. .i2c_adc = 1,
  262. .spi_dac = 0x4021 } ,
  263. /* Giga-byte GA-G1975X mobo
  264. * Novell bnc#395807
  265. */
  266. /* FIXME: the GPIO and I2C setting aren't tested well */
  267. { .serial = 0x1458a006,
  268. .name = "Giga-byte GA-G1975X",
  269. .gpio_type = 1,
  270. .i2c_adc = 1 },
  271. /* Shuttle XPC SD31P which has an onboard Creative Labs
  272. * Sound Blaster Live! 24-bit EAX
  273. * high-definition 7.1 audio processor".
  274. * Added using info from andrewvegan in alsa bug #1298
  275. */
  276. { .serial = 0x30381297,
  277. .name = "Shuttle XPC SD31P [SD31P]",
  278. .gpio_type = 1,
  279. .i2c_adc = 1 } ,
  280. /* Shuttle XPC SD11G5 which has an onboard Creative Labs
  281. * Sound Blaster Live! 24-bit EAX
  282. * high-definition 7.1 audio processor".
  283. * Fixes ALSA bug#1600
  284. */
  285. { .serial = 0x30411297,
  286. .name = "Shuttle XPC SD11G5 [SD11G5]",
  287. .gpio_type = 1,
  288. .i2c_adc = 1 } ,
  289. { .serial = 0,
  290. .name = "AudigyLS [Unknown]" }
  291. };
  292. /* hardware definition */
  293. static const struct snd_pcm_hardware snd_ca0106_playback_hw = {
  294. .info = SNDRV_PCM_INFO_MMAP |
  295. SNDRV_PCM_INFO_INTERLEAVED |
  296. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  297. SNDRV_PCM_INFO_MMAP_VALID |
  298. SNDRV_PCM_INFO_SYNC_START,
  299. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  300. .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
  301. SNDRV_PCM_RATE_192000),
  302. .rate_min = 48000,
  303. .rate_max = 192000,
  304. .channels_min = 2, //1,
  305. .channels_max = 2, //6,
  306. .buffer_bytes_max = ((65536 - 64) * 8),
  307. .period_bytes_min = 64,
  308. .period_bytes_max = (65536 - 64),
  309. .periods_min = 2,
  310. .periods_max = 8,
  311. .fifo_size = 0,
  312. };
  313. static const struct snd_pcm_hardware snd_ca0106_capture_hw = {
  314. .info = (SNDRV_PCM_INFO_MMAP |
  315. SNDRV_PCM_INFO_INTERLEAVED |
  316. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  317. SNDRV_PCM_INFO_MMAP_VALID),
  318. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  319. #if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
  320. .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  321. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  322. .rate_min = 44100,
  323. #else
  324. .rates = (SNDRV_PCM_RATE_48000 |
  325. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  326. .rate_min = 48000,
  327. #endif /* FIXME */
  328. .rate_max = 192000,
  329. .channels_min = 2,
  330. .channels_max = 2,
  331. .buffer_bytes_max = 65536 - 128,
  332. .period_bytes_min = 64,
  333. .period_bytes_max = 32768 - 64,
  334. .periods_min = 2,
  335. .periods_max = 2,
  336. .fifo_size = 0,
  337. };
  338. unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
  339. unsigned int reg,
  340. unsigned int chn)
  341. {
  342. unsigned long flags;
  343. unsigned int regptr, val;
  344. regptr = (reg << 16) | chn;
  345. spin_lock_irqsave(&emu->emu_lock, flags);
  346. outl(regptr, emu->port + PTR);
  347. val = inl(emu->port + DATA);
  348. spin_unlock_irqrestore(&emu->emu_lock, flags);
  349. return val;
  350. }
  351. void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
  352. unsigned int reg,
  353. unsigned int chn,
  354. unsigned int data)
  355. {
  356. unsigned int regptr;
  357. unsigned long flags;
  358. regptr = (reg << 16) | chn;
  359. spin_lock_irqsave(&emu->emu_lock, flags);
  360. outl(regptr, emu->port + PTR);
  361. outl(data, emu->port + DATA);
  362. spin_unlock_irqrestore(&emu->emu_lock, flags);
  363. }
  364. int snd_ca0106_spi_write(struct snd_ca0106 * emu,
  365. unsigned int data)
  366. {
  367. unsigned int reset, set;
  368. unsigned int reg, tmp;
  369. int n, result;
  370. reg = SPI;
  371. if (data > 0xffff) /* Only 16bit values allowed */
  372. return 1;
  373. tmp = snd_ca0106_ptr_read(emu, reg, 0);
  374. reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
  375. set = reset | 0x10000; /* Set xxx1xxxx */
  376. snd_ca0106_ptr_write(emu, reg, 0, reset | data);
  377. tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
  378. snd_ca0106_ptr_write(emu, reg, 0, set | data);
  379. result = 1;
  380. /* Wait for status bit to return to 0 */
  381. for (n = 0; n < 100; n++) {
  382. udelay(10);
  383. tmp = snd_ca0106_ptr_read(emu, reg, 0);
  384. if (!(tmp & 0x10000)) {
  385. result = 0;
  386. break;
  387. }
  388. }
  389. if (result) /* Timed out */
  390. return 1;
  391. snd_ca0106_ptr_write(emu, reg, 0, reset | data);
  392. tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
  393. return 0;
  394. }
  395. /* The ADC does not support i2c read, so only write is implemented */
  396. int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
  397. u32 reg,
  398. u32 value)
  399. {
  400. u32 tmp;
  401. int timeout = 0;
  402. int status;
  403. int retry;
  404. if ((reg > 0x7f) || (value > 0x1ff)) {
  405. dev_err(emu->card->dev, "i2c_write: invalid values.\n");
  406. return -EINVAL;
  407. }
  408. tmp = reg << 25 | value << 16;
  409. /*
  410. dev_dbg(emu->card->dev, "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
  411. */
  412. /* Not sure what this I2C channel controls. */
  413. /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
  414. /* This controls the I2C connected to the WM8775 ADC Codec */
  415. snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
  416. for (retry = 0; retry < 10; retry++) {
  417. /* Send the data to i2c */
  418. //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
  419. //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
  420. tmp = 0;
  421. tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
  422. snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
  423. /* Wait till the transaction ends */
  424. while (1) {
  425. status = snd_ca0106_ptr_read(emu, I2C_A, 0);
  426. /*dev_dbg(emu->card->dev, "I2C:status=0x%x\n", status);*/
  427. timeout++;
  428. if ((status & I2C_A_ADC_START) == 0)
  429. break;
  430. if (timeout > 1000)
  431. break;
  432. }
  433. //Read back and see if the transaction is successful
  434. if ((status & I2C_A_ADC_ABORT) == 0)
  435. break;
  436. }
  437. if (retry == 10) {
  438. dev_err(emu->card->dev, "Writing to ADC failed!\n");
  439. return -EINVAL;
  440. }
  441. return 0;
  442. }
  443. static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
  444. {
  445. unsigned long flags;
  446. unsigned int intr_enable;
  447. spin_lock_irqsave(&emu->emu_lock, flags);
  448. intr_enable = inl(emu->port + INTE) | intrenb;
  449. outl(intr_enable, emu->port + INTE);
  450. spin_unlock_irqrestore(&emu->emu_lock, flags);
  451. }
  452. static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
  453. {
  454. unsigned long flags;
  455. unsigned int intr_enable;
  456. spin_lock_irqsave(&emu->emu_lock, flags);
  457. intr_enable = inl(emu->port + INTE) & ~intrenb;
  458. outl(intr_enable, emu->port + INTE);
  459. spin_unlock_irqrestore(&emu->emu_lock, flags);
  460. }
  461. static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
  462. {
  463. kfree(runtime->private_data);
  464. }
  465. static const int spi_dacd_reg[] = {
  466. SPI_DACD0_REG,
  467. SPI_DACD1_REG,
  468. SPI_DACD2_REG,
  469. 0,
  470. SPI_DACD4_REG,
  471. };
  472. static const int spi_dacd_bit[] = {
  473. SPI_DACD0_BIT,
  474. SPI_DACD1_BIT,
  475. SPI_DACD2_BIT,
  476. 0,
  477. SPI_DACD4_BIT,
  478. };
  479. static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
  480. {
  481. if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
  482. chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
  483. snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
  484. chip->spdif_str_bits[idx]);
  485. }
  486. }
  487. static int snd_ca0106_channel_dac(struct snd_ca0106 *chip,
  488. struct snd_ca0106_details *details,
  489. int channel_id)
  490. {
  491. switch (channel_id) {
  492. case PCM_FRONT_CHANNEL:
  493. return (details->spi_dac & 0xf000) >> (4 * 3);
  494. case PCM_REAR_CHANNEL:
  495. return (details->spi_dac & 0x0f00) >> (4 * 2);
  496. case PCM_CENTER_LFE_CHANNEL:
  497. return (details->spi_dac & 0x00f0) >> (4 * 1);
  498. case PCM_UNKNOWN_CHANNEL:
  499. return (details->spi_dac & 0x000f) >> (4 * 0);
  500. default:
  501. dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n",
  502. channel_id);
  503. }
  504. return 0;
  505. }
  506. static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id,
  507. int power)
  508. {
  509. if (chip->details->spi_dac) {
  510. const int dac = snd_ca0106_channel_dac(chip, chip->details,
  511. channel_id);
  512. const int reg = spi_dacd_reg[dac];
  513. const int bit = spi_dacd_bit[dac];
  514. if (power)
  515. /* Power up */
  516. chip->spi_dac_reg[reg] &= ~bit;
  517. else
  518. /* Power down */
  519. chip->spi_dac_reg[reg] |= bit;
  520. if (snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]) != 0)
  521. return -ENXIO;
  522. }
  523. return 0;
  524. }
  525. /* open_playback callback */
  526. static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
  527. int channel_id)
  528. {
  529. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  530. struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
  531. struct snd_ca0106_pcm *epcm;
  532. struct snd_pcm_runtime *runtime = substream->runtime;
  533. int err;
  534. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  535. if (epcm == NULL)
  536. return -ENOMEM;
  537. epcm->emu = chip;
  538. epcm->substream = substream;
  539. epcm->channel_id=channel_id;
  540. runtime->private_data = epcm;
  541. runtime->private_free = snd_ca0106_pcm_free_substream;
  542. runtime->hw = snd_ca0106_playback_hw;
  543. channel->emu = chip;
  544. channel->number = channel_id;
  545. channel->use = 1;
  546. /*
  547. dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
  548. channel_id, chip, channel);
  549. */
  550. //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
  551. channel->epcm = epcm;
  552. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  553. return err;
  554. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  555. return err;
  556. snd_pcm_set_sync(substream);
  557. /* Front channel dac should already be on */
  558. if (channel_id != PCM_FRONT_CHANNEL) {
  559. err = snd_ca0106_pcm_power_dac(chip, channel_id, 1);
  560. if (err < 0)
  561. return err;
  562. }
  563. restore_spdif_bits(chip, channel_id);
  564. return 0;
  565. }
  566. /* close callback */
  567. static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
  568. {
  569. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  570. struct snd_pcm_runtime *runtime = substream->runtime;
  571. struct snd_ca0106_pcm *epcm = runtime->private_data;
  572. chip->playback_channels[epcm->channel_id].use = 0;
  573. restore_spdif_bits(chip, epcm->channel_id);
  574. /* Front channel dac should stay on */
  575. if (epcm->channel_id != PCM_FRONT_CHANNEL) {
  576. int err;
  577. err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0);
  578. if (err < 0)
  579. return err;
  580. }
  581. /* FIXME: maybe zero others */
  582. return 0;
  583. }
  584. static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
  585. {
  586. return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
  587. }
  588. static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
  589. {
  590. return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
  591. }
  592. static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
  593. {
  594. return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
  595. }
  596. static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
  597. {
  598. return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
  599. }
  600. /* open_capture callback */
  601. static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
  602. int channel_id)
  603. {
  604. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  605. struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
  606. struct snd_ca0106_pcm *epcm;
  607. struct snd_pcm_runtime *runtime = substream->runtime;
  608. int err;
  609. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  610. if (!epcm)
  611. return -ENOMEM;
  612. epcm->emu = chip;
  613. epcm->substream = substream;
  614. epcm->channel_id=channel_id;
  615. runtime->private_data = epcm;
  616. runtime->private_free = snd_ca0106_pcm_free_substream;
  617. runtime->hw = snd_ca0106_capture_hw;
  618. channel->emu = chip;
  619. channel->number = channel_id;
  620. channel->use = 1;
  621. /*
  622. dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
  623. channel_id, chip, channel);
  624. */
  625. //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
  626. channel->epcm = epcm;
  627. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  628. return err;
  629. //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
  630. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  631. return err;
  632. return 0;
  633. }
  634. /* close callback */
  635. static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
  636. {
  637. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  638. struct snd_pcm_runtime *runtime = substream->runtime;
  639. struct snd_ca0106_pcm *epcm = runtime->private_data;
  640. chip->capture_channels[epcm->channel_id].use = 0;
  641. /* FIXME: maybe zero others */
  642. return 0;
  643. }
  644. static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
  645. {
  646. return snd_ca0106_pcm_open_capture_channel(substream, 0);
  647. }
  648. static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
  649. {
  650. return snd_ca0106_pcm_open_capture_channel(substream, 1);
  651. }
  652. static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
  653. {
  654. return snd_ca0106_pcm_open_capture_channel(substream, 2);
  655. }
  656. static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
  657. {
  658. return snd_ca0106_pcm_open_capture_channel(substream, 3);
  659. }
  660. /* hw_params callback */
  661. static int snd_ca0106_pcm_hw_params_playback(struct snd_pcm_substream *substream,
  662. struct snd_pcm_hw_params *hw_params)
  663. {
  664. return snd_pcm_lib_malloc_pages(substream,
  665. params_buffer_bytes(hw_params));
  666. }
  667. /* hw_free callback */
  668. static int snd_ca0106_pcm_hw_free_playback(struct snd_pcm_substream *substream)
  669. {
  670. return snd_pcm_lib_free_pages(substream);
  671. }
  672. /* hw_params callback */
  673. static int snd_ca0106_pcm_hw_params_capture(struct snd_pcm_substream *substream,
  674. struct snd_pcm_hw_params *hw_params)
  675. {
  676. return snd_pcm_lib_malloc_pages(substream,
  677. params_buffer_bytes(hw_params));
  678. }
  679. /* hw_free callback */
  680. static int snd_ca0106_pcm_hw_free_capture(struct snd_pcm_substream *substream)
  681. {
  682. return snd_pcm_lib_free_pages(substream);
  683. }
  684. /* prepare playback callback */
  685. static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
  686. {
  687. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  688. struct snd_pcm_runtime *runtime = substream->runtime;
  689. struct snd_ca0106_pcm *epcm = runtime->private_data;
  690. int channel = epcm->channel_id;
  691. u32 *table_base = (u32 *)(emu->buffer.area+(8*16*channel));
  692. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  693. u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
  694. u32 hcfg_set = 0x00000000;
  695. u32 hcfg;
  696. u32 reg40_mask = 0x30000 << (channel<<1);
  697. u32 reg40_set = 0;
  698. u32 reg40;
  699. /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
  700. u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
  701. u32 reg71_set = 0;
  702. u32 reg71;
  703. int i;
  704. #if 0 /* debug */
  705. dev_dbg(emu->card->dev,
  706. "prepare:channel_number=%d, rate=%d, format=0x%x, "
  707. "channels=%d, buffer_size=%ld, period_size=%ld, "
  708. "periods=%u, frames_to_bytes=%d\n",
  709. channel, runtime->rate, runtime->format,
  710. runtime->channels, runtime->buffer_size,
  711. runtime->period_size, runtime->periods,
  712. frames_to_bytes(runtime, 1));
  713. dev_dbg(emu->card->dev,
  714. "dma_addr=%x, dma_area=%p, table_base=%p\n",
  715. runtime->dma_addr, runtime->dma_area, table_base);
  716. dev_dbg(emu->card->dev,
  717. "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
  718. emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
  719. #endif /* debug */
  720. /* Rate can be set per channel. */
  721. /* reg40 control host to fifo */
  722. /* reg71 controls DAC rate. */
  723. switch (runtime->rate) {
  724. case 44100:
  725. reg40_set = 0x10000 << (channel<<1);
  726. reg71_set = 0x01010000;
  727. break;
  728. case 48000:
  729. reg40_set = 0;
  730. reg71_set = 0;
  731. break;
  732. case 96000:
  733. reg40_set = 0x20000 << (channel<<1);
  734. reg71_set = 0x02020000;
  735. break;
  736. case 192000:
  737. reg40_set = 0x30000 << (channel<<1);
  738. reg71_set = 0x03030000;
  739. break;
  740. default:
  741. reg40_set = 0;
  742. reg71_set = 0;
  743. break;
  744. }
  745. /* Format is a global setting */
  746. /* FIXME: Only let the first channel accessed set this. */
  747. switch (runtime->format) {
  748. case SNDRV_PCM_FORMAT_S16_LE:
  749. hcfg_set = 0;
  750. break;
  751. case SNDRV_PCM_FORMAT_S32_LE:
  752. hcfg_set = HCFG_PLAYBACK_S32_LE;
  753. break;
  754. default:
  755. hcfg_set = 0;
  756. break;
  757. }
  758. hcfg = inl(emu->port + HCFG) ;
  759. hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
  760. outl(hcfg, emu->port + HCFG);
  761. reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
  762. reg40 = (reg40 & ~reg40_mask) | reg40_set;
  763. snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
  764. reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
  765. reg71 = (reg71 & ~reg71_mask) | reg71_set;
  766. snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
  767. /* FIXME: Check emu->buffer.size before actually writing to it. */
  768. for(i=0; i < runtime->periods; i++) {
  769. table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
  770. table_base[i*2+1] = period_size_bytes << 16;
  771. }
  772. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer.addr+(8*16*channel));
  773. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
  774. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
  775. snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
  776. snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
  777. /* FIXME test what 0 bytes does. */
  778. snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
  779. snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
  780. snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
  781. snd_ca0106_ptr_write(emu, 0x08, channel, 0);
  782. snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
  783. #if 0
  784. snd_ca0106_ptr_write(emu, SPCS0, 0,
  785. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  786. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  787. SPCS_GENERATIONSTATUS | 0x00001200 |
  788. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
  789. #endif
  790. return 0;
  791. }
  792. /* prepare capture callback */
  793. static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
  794. {
  795. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  796. struct snd_pcm_runtime *runtime = substream->runtime;
  797. struct snd_ca0106_pcm *epcm = runtime->private_data;
  798. int channel = epcm->channel_id;
  799. u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
  800. u32 hcfg_set = 0x00000000;
  801. u32 hcfg;
  802. u32 over_sampling=0x2;
  803. u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
  804. u32 reg71_set = 0;
  805. u32 reg71;
  806. #if 0 /* debug */
  807. dev_dbg(emu->card->dev,
  808. "prepare:channel_number=%d, rate=%d, format=0x%x, "
  809. "channels=%d, buffer_size=%ld, period_size=%ld, "
  810. "periods=%u, frames_to_bytes=%d\n",
  811. channel, runtime->rate, runtime->format,
  812. runtime->channels, runtime->buffer_size,
  813. runtime->period_size, runtime->periods,
  814. frames_to_bytes(runtime, 1));
  815. dev_dbg(emu->card->dev,
  816. "dma_addr=%x, dma_area=%p, table_base=%p\n",
  817. runtime->dma_addr, runtime->dma_area, table_base);
  818. dev_dbg(emu->card->dev,
  819. "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
  820. emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
  821. #endif /* debug */
  822. /* reg71 controls ADC rate. */
  823. switch (runtime->rate) {
  824. case 44100:
  825. reg71_set = 0x00004000;
  826. break;
  827. case 48000:
  828. reg71_set = 0;
  829. break;
  830. case 96000:
  831. reg71_set = 0x00008000;
  832. over_sampling=0xa;
  833. break;
  834. case 192000:
  835. reg71_set = 0x0000c000;
  836. over_sampling=0xa;
  837. break;
  838. default:
  839. reg71_set = 0;
  840. break;
  841. }
  842. /* Format is a global setting */
  843. /* FIXME: Only let the first channel accessed set this. */
  844. switch (runtime->format) {
  845. case SNDRV_PCM_FORMAT_S16_LE:
  846. hcfg_set = 0;
  847. break;
  848. case SNDRV_PCM_FORMAT_S32_LE:
  849. hcfg_set = HCFG_CAPTURE_S32_LE;
  850. break;
  851. default:
  852. hcfg_set = 0;
  853. break;
  854. }
  855. hcfg = inl(emu->port + HCFG) ;
  856. hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
  857. outl(hcfg, emu->port + HCFG);
  858. reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
  859. reg71 = (reg71 & ~reg71_mask) | reg71_set;
  860. snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
  861. if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
  862. snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
  863. }
  864. /*
  865. dev_dbg(emu->card->dev,
  866. "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
  867. "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
  868. channel, runtime->rate, runtime->format, runtime->channels,
  869. runtime->buffer_size, runtime->period_size,
  870. frames_to_bytes(runtime, 1));
  871. */
  872. snd_ca0106_ptr_write(emu, 0x13, channel, 0);
  873. snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
  874. snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  875. snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
  876. return 0;
  877. }
  878. /* trigger_playback callback */
  879. static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
  880. int cmd)
  881. {
  882. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  883. struct snd_pcm_runtime *runtime;
  884. struct snd_ca0106_pcm *epcm;
  885. int channel;
  886. int result = 0;
  887. struct snd_pcm_substream *s;
  888. u32 basic = 0;
  889. u32 extended = 0;
  890. u32 bits;
  891. int running = 0;
  892. switch (cmd) {
  893. case SNDRV_PCM_TRIGGER_START:
  894. case SNDRV_PCM_TRIGGER_RESUME:
  895. running = 1;
  896. break;
  897. case SNDRV_PCM_TRIGGER_STOP:
  898. case SNDRV_PCM_TRIGGER_SUSPEND:
  899. default:
  900. running = 0;
  901. break;
  902. }
  903. snd_pcm_group_for_each_entry(s, substream) {
  904. if (snd_pcm_substream_chip(s) != emu ||
  905. s->stream != SNDRV_PCM_STREAM_PLAYBACK)
  906. continue;
  907. runtime = s->runtime;
  908. epcm = runtime->private_data;
  909. channel = epcm->channel_id;
  910. /* dev_dbg(emu->card->dev, "channel=%d\n", channel); */
  911. epcm->running = running;
  912. basic |= (0x1 << channel);
  913. extended |= (0x10 << channel);
  914. snd_pcm_trigger_done(s, substream);
  915. }
  916. /* dev_dbg(emu->card->dev, "basic=0x%x, extended=0x%x\n",basic, extended); */
  917. switch (cmd) {
  918. case SNDRV_PCM_TRIGGER_START:
  919. case SNDRV_PCM_TRIGGER_RESUME:
  920. bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
  921. bits |= extended;
  922. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
  923. bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
  924. bits |= basic;
  925. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
  926. break;
  927. case SNDRV_PCM_TRIGGER_STOP:
  928. case SNDRV_PCM_TRIGGER_SUSPEND:
  929. bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
  930. bits &= ~basic;
  931. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
  932. bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
  933. bits &= ~extended;
  934. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
  935. break;
  936. default:
  937. result = -EINVAL;
  938. break;
  939. }
  940. return result;
  941. }
  942. /* trigger_capture callback */
  943. static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
  944. int cmd)
  945. {
  946. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  947. struct snd_pcm_runtime *runtime = substream->runtime;
  948. struct snd_ca0106_pcm *epcm = runtime->private_data;
  949. int channel = epcm->channel_id;
  950. int result = 0;
  951. switch (cmd) {
  952. case SNDRV_PCM_TRIGGER_START:
  953. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
  954. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
  955. epcm->running = 1;
  956. break;
  957. case SNDRV_PCM_TRIGGER_STOP:
  958. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
  959. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
  960. epcm->running = 0;
  961. break;
  962. default:
  963. result = -EINVAL;
  964. break;
  965. }
  966. return result;
  967. }
  968. /* pointer_playback callback */
  969. static snd_pcm_uframes_t
  970. snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
  971. {
  972. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  973. struct snd_pcm_runtime *runtime = substream->runtime;
  974. struct snd_ca0106_pcm *epcm = runtime->private_data;
  975. unsigned int ptr, prev_ptr;
  976. int channel = epcm->channel_id;
  977. int timeout = 10;
  978. if (!epcm->running)
  979. return 0;
  980. prev_ptr = -1;
  981. do {
  982. ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  983. ptr = (ptr >> 3) * runtime->period_size;
  984. ptr += bytes_to_frames(runtime,
  985. snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
  986. if (ptr >= runtime->buffer_size)
  987. ptr -= runtime->buffer_size;
  988. if (prev_ptr == ptr)
  989. return ptr;
  990. prev_ptr = ptr;
  991. } while (--timeout);
  992. dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n");
  993. return 0;
  994. }
  995. /* pointer_capture callback */
  996. static snd_pcm_uframes_t
  997. snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
  998. {
  999. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  1000. struct snd_pcm_runtime *runtime = substream->runtime;
  1001. struct snd_ca0106_pcm *epcm = runtime->private_data;
  1002. snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
  1003. int channel = epcm->channel_id;
  1004. if (!epcm->running)
  1005. return 0;
  1006. ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
  1007. ptr2 = bytes_to_frames(runtime, ptr1);
  1008. ptr=ptr2;
  1009. if (ptr >= runtime->buffer_size)
  1010. ptr -= runtime->buffer_size;
  1011. /*
  1012. dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
  1013. "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
  1014. ptr1, ptr2, ptr, (int)runtime->buffer_size,
  1015. (int)runtime->period_size, (int)runtime->frame_bits,
  1016. (int)runtime->rate);
  1017. */
  1018. return ptr;
  1019. }
  1020. /* operators */
  1021. static const struct snd_pcm_ops snd_ca0106_playback_front_ops = {
  1022. .open = snd_ca0106_pcm_open_playback_front,
  1023. .close = snd_ca0106_pcm_close_playback,
  1024. .ioctl = snd_pcm_lib_ioctl,
  1025. .hw_params = snd_ca0106_pcm_hw_params_playback,
  1026. .hw_free = snd_ca0106_pcm_hw_free_playback,
  1027. .prepare = snd_ca0106_pcm_prepare_playback,
  1028. .trigger = snd_ca0106_pcm_trigger_playback,
  1029. .pointer = snd_ca0106_pcm_pointer_playback,
  1030. };
  1031. static const struct snd_pcm_ops snd_ca0106_capture_0_ops = {
  1032. .open = snd_ca0106_pcm_open_0_capture,
  1033. .close = snd_ca0106_pcm_close_capture,
  1034. .ioctl = snd_pcm_lib_ioctl,
  1035. .hw_params = snd_ca0106_pcm_hw_params_capture,
  1036. .hw_free = snd_ca0106_pcm_hw_free_capture,
  1037. .prepare = snd_ca0106_pcm_prepare_capture,
  1038. .trigger = snd_ca0106_pcm_trigger_capture,
  1039. .pointer = snd_ca0106_pcm_pointer_capture,
  1040. };
  1041. static const struct snd_pcm_ops snd_ca0106_capture_1_ops = {
  1042. .open = snd_ca0106_pcm_open_1_capture,
  1043. .close = snd_ca0106_pcm_close_capture,
  1044. .ioctl = snd_pcm_lib_ioctl,
  1045. .hw_params = snd_ca0106_pcm_hw_params_capture,
  1046. .hw_free = snd_ca0106_pcm_hw_free_capture,
  1047. .prepare = snd_ca0106_pcm_prepare_capture,
  1048. .trigger = snd_ca0106_pcm_trigger_capture,
  1049. .pointer = snd_ca0106_pcm_pointer_capture,
  1050. };
  1051. static const struct snd_pcm_ops snd_ca0106_capture_2_ops = {
  1052. .open = snd_ca0106_pcm_open_2_capture,
  1053. .close = snd_ca0106_pcm_close_capture,
  1054. .ioctl = snd_pcm_lib_ioctl,
  1055. .hw_params = snd_ca0106_pcm_hw_params_capture,
  1056. .hw_free = snd_ca0106_pcm_hw_free_capture,
  1057. .prepare = snd_ca0106_pcm_prepare_capture,
  1058. .trigger = snd_ca0106_pcm_trigger_capture,
  1059. .pointer = snd_ca0106_pcm_pointer_capture,
  1060. };
  1061. static const struct snd_pcm_ops snd_ca0106_capture_3_ops = {
  1062. .open = snd_ca0106_pcm_open_3_capture,
  1063. .close = snd_ca0106_pcm_close_capture,
  1064. .ioctl = snd_pcm_lib_ioctl,
  1065. .hw_params = snd_ca0106_pcm_hw_params_capture,
  1066. .hw_free = snd_ca0106_pcm_hw_free_capture,
  1067. .prepare = snd_ca0106_pcm_prepare_capture,
  1068. .trigger = snd_ca0106_pcm_trigger_capture,
  1069. .pointer = snd_ca0106_pcm_pointer_capture,
  1070. };
  1071. static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
  1072. .open = snd_ca0106_pcm_open_playback_center_lfe,
  1073. .close = snd_ca0106_pcm_close_playback,
  1074. .ioctl = snd_pcm_lib_ioctl,
  1075. .hw_params = snd_ca0106_pcm_hw_params_playback,
  1076. .hw_free = snd_ca0106_pcm_hw_free_playback,
  1077. .prepare = snd_ca0106_pcm_prepare_playback,
  1078. .trigger = snd_ca0106_pcm_trigger_playback,
  1079. .pointer = snd_ca0106_pcm_pointer_playback,
  1080. };
  1081. static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
  1082. .open = snd_ca0106_pcm_open_playback_unknown,
  1083. .close = snd_ca0106_pcm_close_playback,
  1084. .ioctl = snd_pcm_lib_ioctl,
  1085. .hw_params = snd_ca0106_pcm_hw_params_playback,
  1086. .hw_free = snd_ca0106_pcm_hw_free_playback,
  1087. .prepare = snd_ca0106_pcm_prepare_playback,
  1088. .trigger = snd_ca0106_pcm_trigger_playback,
  1089. .pointer = snd_ca0106_pcm_pointer_playback,
  1090. };
  1091. static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
  1092. .open = snd_ca0106_pcm_open_playback_rear,
  1093. .close = snd_ca0106_pcm_close_playback,
  1094. .ioctl = snd_pcm_lib_ioctl,
  1095. .hw_params = snd_ca0106_pcm_hw_params_playback,
  1096. .hw_free = snd_ca0106_pcm_hw_free_playback,
  1097. .prepare = snd_ca0106_pcm_prepare_playback,
  1098. .trigger = snd_ca0106_pcm_trigger_playback,
  1099. .pointer = snd_ca0106_pcm_pointer_playback,
  1100. };
  1101. static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
  1102. unsigned short reg)
  1103. {
  1104. struct snd_ca0106 *emu = ac97->private_data;
  1105. unsigned long flags;
  1106. unsigned short val;
  1107. spin_lock_irqsave(&emu->emu_lock, flags);
  1108. outb(reg, emu->port + AC97ADDRESS);
  1109. val = inw(emu->port + AC97DATA);
  1110. spin_unlock_irqrestore(&emu->emu_lock, flags);
  1111. return val;
  1112. }
  1113. static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
  1114. unsigned short reg, unsigned short val)
  1115. {
  1116. struct snd_ca0106 *emu = ac97->private_data;
  1117. unsigned long flags;
  1118. spin_lock_irqsave(&emu->emu_lock, flags);
  1119. outb(reg, emu->port + AC97ADDRESS);
  1120. outw(val, emu->port + AC97DATA);
  1121. spin_unlock_irqrestore(&emu->emu_lock, flags);
  1122. }
  1123. static int snd_ca0106_ac97(struct snd_ca0106 *chip)
  1124. {
  1125. struct snd_ac97_bus *pbus;
  1126. struct snd_ac97_template ac97;
  1127. int err;
  1128. static struct snd_ac97_bus_ops ops = {
  1129. .write = snd_ca0106_ac97_write,
  1130. .read = snd_ca0106_ac97_read,
  1131. };
  1132. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1133. return err;
  1134. pbus->no_vra = 1; /* we don't need VRA */
  1135. memset(&ac97, 0, sizeof(ac97));
  1136. ac97.private_data = chip;
  1137. ac97.scaps = AC97_SCAP_NO_SPDIF;
  1138. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1139. }
  1140. static void ca0106_stop_chip(struct snd_ca0106 *chip);
  1141. static int snd_ca0106_free(struct snd_ca0106 *chip)
  1142. {
  1143. if (chip->res_port != NULL) {
  1144. /* avoid access to already used hardware */
  1145. ca0106_stop_chip(chip);
  1146. }
  1147. if (chip->irq >= 0)
  1148. free_irq(chip->irq, chip);
  1149. // release the data
  1150. #if 1
  1151. if (chip->buffer.area)
  1152. snd_dma_free_pages(&chip->buffer);
  1153. #endif
  1154. // release the i/o port
  1155. release_and_free_resource(chip->res_port);
  1156. pci_disable_device(chip->pci);
  1157. kfree(chip);
  1158. return 0;
  1159. }
  1160. static int snd_ca0106_dev_free(struct snd_device *device)
  1161. {
  1162. struct snd_ca0106 *chip = device->device_data;
  1163. return snd_ca0106_free(chip);
  1164. }
  1165. static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
  1166. {
  1167. unsigned int status;
  1168. struct snd_ca0106 *chip = dev_id;
  1169. int i;
  1170. int mask;
  1171. unsigned int stat76;
  1172. struct snd_ca0106_channel *pchannel;
  1173. status = inl(chip->port + IPR);
  1174. if (! status)
  1175. return IRQ_NONE;
  1176. stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
  1177. /*
  1178. dev_dbg(emu->card->dev, "interrupt status = 0x%08x, stat76=0x%08x\n",
  1179. status, stat76);
  1180. dev_dbg(emu->card->dev, "ptr=0x%08x\n",
  1181. snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
  1182. */
  1183. mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
  1184. for(i = 0; i < 4; i++) {
  1185. pchannel = &(chip->playback_channels[i]);
  1186. if (stat76 & mask) {
  1187. /* FIXME: Select the correct substream for period elapsed */
  1188. if(pchannel->use) {
  1189. snd_pcm_period_elapsed(pchannel->epcm->substream);
  1190. /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
  1191. }
  1192. }
  1193. /*
  1194. dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
  1195. dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
  1196. */
  1197. mask <<= 1;
  1198. }
  1199. mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
  1200. for(i = 0; i < 4; i++) {
  1201. pchannel = &(chip->capture_channels[i]);
  1202. if (stat76 & mask) {
  1203. /* FIXME: Select the correct substream for period elapsed */
  1204. if(pchannel->use) {
  1205. snd_pcm_period_elapsed(pchannel->epcm->substream);
  1206. /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
  1207. }
  1208. }
  1209. /*
  1210. dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
  1211. dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
  1212. */
  1213. mask <<= 1;
  1214. }
  1215. snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
  1216. if (chip->midi.dev_id &&
  1217. (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
  1218. if (chip->midi.interrupt)
  1219. chip->midi.interrupt(&chip->midi, status);
  1220. else
  1221. chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
  1222. }
  1223. // acknowledge the interrupt if necessary
  1224. outl(status, chip->port+IPR);
  1225. return IRQ_HANDLED;
  1226. }
  1227. static const struct snd_pcm_chmap_elem surround_map[] = {
  1228. { .channels = 2,
  1229. .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
  1230. { }
  1231. };
  1232. static const struct snd_pcm_chmap_elem clfe_map[] = {
  1233. { .channels = 2,
  1234. .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
  1235. { }
  1236. };
  1237. static const struct snd_pcm_chmap_elem side_map[] = {
  1238. { .channels = 2,
  1239. .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } },
  1240. { }
  1241. };
  1242. static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
  1243. {
  1244. struct snd_pcm *pcm;
  1245. struct snd_pcm_substream *substream;
  1246. const struct snd_pcm_chmap_elem *map = NULL;
  1247. int err;
  1248. err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
  1249. if (err < 0)
  1250. return err;
  1251. pcm->private_data = emu;
  1252. switch (device) {
  1253. case 0:
  1254. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
  1255. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
  1256. map = snd_pcm_std_chmaps;
  1257. break;
  1258. case 1:
  1259. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
  1260. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
  1261. map = surround_map;
  1262. break;
  1263. case 2:
  1264. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
  1265. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
  1266. map = clfe_map;
  1267. break;
  1268. case 3:
  1269. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
  1270. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
  1271. map = side_map;
  1272. break;
  1273. }
  1274. pcm->info_flags = 0;
  1275. strcpy(pcm->name, "CA0106");
  1276. for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1277. substream;
  1278. substream = substream->next) {
  1279. if ((err = snd_pcm_lib_preallocate_pages(substream,
  1280. SNDRV_DMA_TYPE_DEV,
  1281. snd_dma_pci_data(emu->pci),
  1282. 64*1024, 64*1024)) < 0) /* FIXME: 32*1024 for sound buffer, between 32and64 for Periods table. */
  1283. return err;
  1284. }
  1285. for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  1286. substream;
  1287. substream = substream->next) {
  1288. if ((err = snd_pcm_lib_preallocate_pages(substream,
  1289. SNDRV_DMA_TYPE_DEV,
  1290. snd_dma_pci_data(emu->pci),
  1291. 64*1024, 64*1024)) < 0)
  1292. return err;
  1293. }
  1294. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
  1295. 1 << 2, NULL);
  1296. if (err < 0)
  1297. return err;
  1298. emu->pcm[device] = pcm;
  1299. return 0;
  1300. }
  1301. #define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
  1302. static unsigned int spi_dac_init[] = {
  1303. SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
  1304. SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
  1305. SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
  1306. SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
  1307. SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
  1308. SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
  1309. SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
  1310. SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
  1311. SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
  1312. SPI_REG(9, 0x00),
  1313. SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
  1314. SPI_REG(12, 0x00),
  1315. SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
  1316. SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
  1317. SPI_REG(SPI_DACD4_REG, SPI_DACD4_BIT),
  1318. };
  1319. static unsigned int i2c_adc_init[][2] = {
  1320. { 0x17, 0x00 }, /* Reset */
  1321. { 0x07, 0x00 }, /* Timeout */
  1322. { 0x0b, 0x22 }, /* Interface control */
  1323. { 0x0c, 0x22 }, /* Master mode control */
  1324. { 0x0d, 0x08 }, /* Powerdown control */
  1325. { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
  1326. { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
  1327. { 0x10, 0x7b }, /* ALC Control 1 */
  1328. { 0x11, 0x00 }, /* ALC Control 2 */
  1329. { 0x12, 0x32 }, /* ALC Control 3 */
  1330. { 0x13, 0x00 }, /* Noise gate control */
  1331. { 0x14, 0xa6 }, /* Limiter control */
  1332. { 0x15, ADC_MUX_LINEIN }, /* ADC Mixer control */
  1333. };
  1334. static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
  1335. {
  1336. int ch;
  1337. unsigned int def_bits;
  1338. outl(0, chip->port + INTE);
  1339. /*
  1340. * Init to 0x02109204 :
  1341. * Clock accuracy = 0 (1000ppm)
  1342. * Sample Rate = 2 (48kHz)
  1343. * Audio Channel = 1 (Left of 2)
  1344. * Source Number = 0 (Unspecified)
  1345. * Generation Status = 1 (Original for Cat Code 12)
  1346. * Cat Code = 12 (Digital Signal Mixer)
  1347. * Mode = 0 (Mode 0)
  1348. * Emphasis = 0 (None)
  1349. * CP = 1 (Copyright unasserted)
  1350. * AN = 0 (Audio data)
  1351. * P = 0 (Consumer)
  1352. */
  1353. def_bits =
  1354. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  1355. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  1356. SPCS_GENERATIONSTATUS | 0x00001200 |
  1357. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
  1358. if (!resume) {
  1359. chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
  1360. chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
  1361. chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
  1362. chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
  1363. }
  1364. /* Only SPCS1 has been tested */
  1365. snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
  1366. snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
  1367. snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
  1368. snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
  1369. snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
  1370. snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
  1371. /* Write 0x8000 to AC97_REC_GAIN to mute it. */
  1372. outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);
  1373. outw(0x8000, chip->port + AC97DATA);
  1374. #if 0 /* FIXME: what are these? */
  1375. snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
  1376. snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
  1377. snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
  1378. snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
  1379. #endif
  1380. /* OSS drivers set this. */
  1381. /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
  1382. /* Analog or Digital output */
  1383. snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
  1384. /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
  1385. * Use 0x000f0000 for surround71
  1386. */
  1387. snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
  1388. chip->spdif_enable = 0; /* Set digital SPDIF output off */
  1389. /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
  1390. /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
  1391. /* goes to 0x40c80000 when doing SPDIF IN/OUT */
  1392. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
  1393. /* (Mute) CAPTURE feedback into PLAYBACK volume.
  1394. * Only lower 16 bits matter.
  1395. */
  1396. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
  1397. /* SPDIF IN Volume */
  1398. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
  1399. /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
  1400. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
  1401. snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
  1402. snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
  1403. snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
  1404. snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
  1405. for (ch = 0; ch < 4; ch++) {
  1406. /* Only high 16 bits matter */
  1407. snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
  1408. snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
  1409. #if 0 /* Mute */
  1410. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
  1411. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
  1412. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
  1413. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
  1414. #endif
  1415. }
  1416. if (chip->details->i2c_adc == 1) {
  1417. /* Select MIC, Line in, TAD in, AUX in */
  1418. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
  1419. /* Default to CAPTURE_SOURCE to i2s in */
  1420. if (!resume)
  1421. chip->capture_source = 3;
  1422. } else if (chip->details->ac97 == 1) {
  1423. /* Default to AC97 in */
  1424. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
  1425. /* Default to CAPTURE_SOURCE to AC97 in */
  1426. if (!resume)
  1427. chip->capture_source = 4;
  1428. } else {
  1429. /* Select MIC, Line in, TAD in, AUX in */
  1430. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
  1431. /* Default to Set CAPTURE_SOURCE to i2s in */
  1432. if (!resume)
  1433. chip->capture_source = 3;
  1434. }
  1435. if (chip->details->gpio_type == 2) {
  1436. /* The SB0438 use GPIO differently. */
  1437. /* FIXME: Still need to find out what the other GPIO bits do.
  1438. * E.g. For digital spdif out.
  1439. */
  1440. outl(0x0, chip->port+GPIO);
  1441. /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
  1442. outl(0x005f5301, chip->port+GPIO); /* Analog */
  1443. } else if (chip->details->gpio_type == 1) {
  1444. /* The SB0410 and SB0413 use GPIO differently. */
  1445. /* FIXME: Still need to find out what the other GPIO bits do.
  1446. * E.g. For digital spdif out.
  1447. */
  1448. outl(0x0, chip->port+GPIO);
  1449. /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
  1450. outl(0x005f5301, chip->port+GPIO); /* Analog */
  1451. } else {
  1452. outl(0x0, chip->port+GPIO);
  1453. outl(0x005f03a3, chip->port+GPIO); /* Analog */
  1454. /* outl(0x005f02a2, chip->port+GPIO); */ /* SPDIF */
  1455. }
  1456. snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
  1457. /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
  1458. /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
  1459. /* outl(0x00001409, chip->port+HCFG); */
  1460. /* outl(0x00000009, chip->port+HCFG); */
  1461. /* AC97 2.0, Enable outputs. */
  1462. outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port+HCFG);
  1463. if (chip->details->i2c_adc == 1) {
  1464. /* The SB0410 and SB0413 use I2C to control ADC. */
  1465. int size, n;
  1466. size = ARRAY_SIZE(i2c_adc_init);
  1467. /* dev_dbg(emu->card->dev, "I2C:array size=0x%x\n", size); */
  1468. for (n = 0; n < size; n++)
  1469. snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
  1470. i2c_adc_init[n][1]);
  1471. for (n = 0; n < 4; n++) {
  1472. chip->i2c_capture_volume[n][0] = 0xcf;
  1473. chip->i2c_capture_volume[n][1] = 0xcf;
  1474. }
  1475. chip->i2c_capture_source = 2; /* Line in */
  1476. /* Enable Line-in capture. MIC in currently untested. */
  1477. /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
  1478. }
  1479. if (chip->details->spi_dac) {
  1480. /* The SB0570 use SPI to control DAC. */
  1481. int size, n;
  1482. size = ARRAY_SIZE(spi_dac_init);
  1483. for (n = 0; n < size; n++) {
  1484. int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
  1485. snd_ca0106_spi_write(chip, spi_dac_init[n]);
  1486. if (reg < ARRAY_SIZE(chip->spi_dac_reg))
  1487. chip->spi_dac_reg[reg] = spi_dac_init[n];
  1488. }
  1489. /* Enable front dac only */
  1490. snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1);
  1491. }
  1492. }
  1493. static void ca0106_stop_chip(struct snd_ca0106 *chip)
  1494. {
  1495. /* disable interrupts */
  1496. snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
  1497. outl(0, chip->port + INTE);
  1498. snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
  1499. udelay(1000);
  1500. /* disable audio */
  1501. /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
  1502. outl(0, chip->port + HCFG);
  1503. /* FIXME: We need to stop and DMA transfers here.
  1504. * But as I am not sure how yet, we cannot from the dma pages.
  1505. * So we can fix: snd-malloc: Memory leak? pages not freed = 8
  1506. */
  1507. }
  1508. static int snd_ca0106_create(int dev, struct snd_card *card,
  1509. struct pci_dev *pci,
  1510. struct snd_ca0106 **rchip)
  1511. {
  1512. struct snd_ca0106 *chip;
  1513. struct snd_ca0106_details *c;
  1514. int err;
  1515. static struct snd_device_ops ops = {
  1516. .dev_free = snd_ca0106_dev_free,
  1517. };
  1518. *rchip = NULL;
  1519. err = pci_enable_device(pci);
  1520. if (err < 0)
  1521. return err;
  1522. if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
  1523. dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
  1524. dev_err(card->dev, "error to set 32bit mask DMA\n");
  1525. pci_disable_device(pci);
  1526. return -ENXIO;
  1527. }
  1528. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1529. if (chip == NULL) {
  1530. pci_disable_device(pci);
  1531. return -ENOMEM;
  1532. }
  1533. chip->card = card;
  1534. chip->pci = pci;
  1535. chip->irq = -1;
  1536. spin_lock_init(&chip->emu_lock);
  1537. chip->port = pci_resource_start(pci, 0);
  1538. chip->res_port = request_region(chip->port, 0x20, "snd_ca0106");
  1539. if (!chip->res_port) {
  1540. snd_ca0106_free(chip);
  1541. dev_err(card->dev, "cannot allocate the port\n");
  1542. return -EBUSY;
  1543. }
  1544. if (request_irq(pci->irq, snd_ca0106_interrupt,
  1545. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1546. snd_ca0106_free(chip);
  1547. dev_err(card->dev, "cannot grab irq\n");
  1548. return -EBUSY;
  1549. }
  1550. chip->irq = pci->irq;
  1551. /* This stores the periods table. */
  1552. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  1553. 1024, &chip->buffer) < 0) {
  1554. snd_ca0106_free(chip);
  1555. return -ENOMEM;
  1556. }
  1557. pci_set_master(pci);
  1558. /* read serial */
  1559. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  1560. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  1561. dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n",
  1562. chip->model, pci->revision, chip->serial);
  1563. strcpy(card->driver, "CA0106");
  1564. strcpy(card->shortname, "CA0106");
  1565. for (c = ca0106_chip_details; c->serial; c++) {
  1566. if (subsystem[dev]) {
  1567. if (c->serial == subsystem[dev])
  1568. break;
  1569. } else if (c->serial == chip->serial)
  1570. break;
  1571. }
  1572. chip->details = c;
  1573. if (subsystem[dev]) {
  1574. dev_info(card->dev, "Sound card name=%s, "
  1575. "subsystem=0x%x. Forced to subsystem=0x%x\n",
  1576. c->name, chip->serial, subsystem[dev]);
  1577. }
  1578. sprintf(card->longname, "%s at 0x%lx irq %i",
  1579. c->name, chip->port, chip->irq);
  1580. ca0106_init_chip(chip, 0);
  1581. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
  1582. if (err < 0) {
  1583. snd_ca0106_free(chip);
  1584. return err;
  1585. }
  1586. *rchip = chip;
  1587. return 0;
  1588. }
  1589. static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
  1590. {
  1591. snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
  1592. }
  1593. static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
  1594. {
  1595. snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
  1596. }
  1597. static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
  1598. {
  1599. return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
  1600. midi->port + idx, 0);
  1601. }
  1602. static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
  1603. {
  1604. snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
  1605. }
  1606. static struct snd_card *ca0106_dev_id_card(void *dev_id)
  1607. {
  1608. return ((struct snd_ca0106 *)dev_id)->card;
  1609. }
  1610. static int ca0106_dev_id_port(void *dev_id)
  1611. {
  1612. return ((struct snd_ca0106 *)dev_id)->port;
  1613. }
  1614. static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
  1615. {
  1616. struct snd_ca_midi *midi;
  1617. char *name;
  1618. int err;
  1619. if (channel == CA0106_MIDI_CHAN_B) {
  1620. name = "CA0106 MPU-401 (UART) B";
  1621. midi = &chip->midi2;
  1622. midi->tx_enable = INTE_MIDI_TX_B;
  1623. midi->rx_enable = INTE_MIDI_RX_B;
  1624. midi->ipr_tx = IPR_MIDI_TX_B;
  1625. midi->ipr_rx = IPR_MIDI_RX_B;
  1626. midi->port = MIDI_UART_B_DATA;
  1627. } else {
  1628. name = "CA0106 MPU-401 (UART)";
  1629. midi = &chip->midi;
  1630. midi->tx_enable = INTE_MIDI_TX_A;
  1631. midi->rx_enable = INTE_MIDI_TX_B;
  1632. midi->ipr_tx = IPR_MIDI_TX_A;
  1633. midi->ipr_rx = IPR_MIDI_RX_A;
  1634. midi->port = MIDI_UART_A_DATA;
  1635. }
  1636. midi->reset = CA0106_MPU401_RESET;
  1637. midi->enter_uart = CA0106_MPU401_ENTER_UART;
  1638. midi->ack = CA0106_MPU401_ACK;
  1639. midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
  1640. midi->output_ready = CA0106_MIDI_OUTPUT_READY;
  1641. midi->channel = channel;
  1642. midi->interrupt_enable = ca0106_midi_interrupt_enable;
  1643. midi->interrupt_disable = ca0106_midi_interrupt_disable;
  1644. midi->read = ca0106_midi_read;
  1645. midi->write = ca0106_midi_write;
  1646. midi->get_dev_id_card = ca0106_dev_id_card;
  1647. midi->get_dev_id_port = ca0106_dev_id_port;
  1648. midi->dev_id = chip;
  1649. if ((err = ca_midi_init(chip, midi, 0, name)) < 0)
  1650. return err;
  1651. return 0;
  1652. }
  1653. static int snd_ca0106_probe(struct pci_dev *pci,
  1654. const struct pci_device_id *pci_id)
  1655. {
  1656. static int dev;
  1657. struct snd_card *card;
  1658. struct snd_ca0106 *chip;
  1659. int i, err;
  1660. if (dev >= SNDRV_CARDS)
  1661. return -ENODEV;
  1662. if (!enable[dev]) {
  1663. dev++;
  1664. return -ENOENT;
  1665. }
  1666. err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1667. 0, &card);
  1668. if (err < 0)
  1669. return err;
  1670. err = snd_ca0106_create(dev, card, pci, &chip);
  1671. if (err < 0)
  1672. goto error;
  1673. card->private_data = chip;
  1674. for (i = 0; i < 4; i++) {
  1675. err = snd_ca0106_pcm(chip, i);
  1676. if (err < 0)
  1677. goto error;
  1678. }
  1679. if (chip->details->ac97 == 1) {
  1680. /* The SB0410 and SB0413 do not have an AC97 chip. */
  1681. err = snd_ca0106_ac97(chip);
  1682. if (err < 0)
  1683. goto error;
  1684. }
  1685. err = snd_ca0106_mixer(chip);
  1686. if (err < 0)
  1687. goto error;
  1688. dev_dbg(card->dev, "probe for MIDI channel A ...");
  1689. err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
  1690. if (err < 0)
  1691. goto error;
  1692. dev_dbg(card->dev, " done.\n");
  1693. #ifdef CONFIG_SND_PROC_FS
  1694. snd_ca0106_proc_init(chip);
  1695. #endif
  1696. err = snd_card_register(card);
  1697. if (err < 0)
  1698. goto error;
  1699. pci_set_drvdata(pci, card);
  1700. dev++;
  1701. return 0;
  1702. error:
  1703. snd_card_free(card);
  1704. return err;
  1705. }
  1706. static void snd_ca0106_remove(struct pci_dev *pci)
  1707. {
  1708. snd_card_free(pci_get_drvdata(pci));
  1709. }
  1710. #ifdef CONFIG_PM_SLEEP
  1711. static int snd_ca0106_suspend(struct device *dev)
  1712. {
  1713. struct snd_card *card = dev_get_drvdata(dev);
  1714. struct snd_ca0106 *chip = card->private_data;
  1715. int i;
  1716. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1717. for (i = 0; i < 4; i++)
  1718. snd_pcm_suspend_all(chip->pcm[i]);
  1719. if (chip->details->ac97)
  1720. snd_ac97_suspend(chip->ac97);
  1721. snd_ca0106_mixer_suspend(chip);
  1722. ca0106_stop_chip(chip);
  1723. return 0;
  1724. }
  1725. static int snd_ca0106_resume(struct device *dev)
  1726. {
  1727. struct snd_card *card = dev_get_drvdata(dev);
  1728. struct snd_ca0106 *chip = card->private_data;
  1729. int i;
  1730. ca0106_init_chip(chip, 1);
  1731. if (chip->details->ac97)
  1732. snd_ac97_resume(chip->ac97);
  1733. snd_ca0106_mixer_resume(chip);
  1734. if (chip->details->spi_dac) {
  1735. for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
  1736. snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
  1737. }
  1738. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1739. return 0;
  1740. }
  1741. static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume);
  1742. #define SND_CA0106_PM_OPS &snd_ca0106_pm
  1743. #else
  1744. #define SND_CA0106_PM_OPS NULL
  1745. #endif
  1746. // PCI IDs
  1747. static const struct pci_device_id snd_ca0106_ids[] = {
  1748. { PCI_VDEVICE(CREATIVE, 0x0007), 0 }, /* Audigy LS or Live 24bit */
  1749. { 0, }
  1750. };
  1751. MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
  1752. // pci_driver definition
  1753. static struct pci_driver ca0106_driver = {
  1754. .name = KBUILD_MODNAME,
  1755. .id_table = snd_ca0106_ids,
  1756. .probe = snd_ca0106_probe,
  1757. .remove = snd_ca0106_remove,
  1758. .driver = {
  1759. .pm = SND_CA0106_PM_OPS,
  1760. },
  1761. };
  1762. module_pci_driver(ca0106_driver);