msi.c 11 KB

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  1. /*
  2. * linux/kernel/irq/msi.c
  3. *
  4. * Copyright (C) 2014 Intel Corp.
  5. * Author: Jiang Liu <jiang.liu@linux.intel.com>
  6. *
  7. * This file is licensed under GPLv2.
  8. *
  9. * This file contains common code to support Message Signalled Interrupt for
  10. * PCI compatible and non PCI compatible devices.
  11. */
  12. #include <linux/types.h>
  13. #include <linux/device.h>
  14. #include <linux/irq.h>
  15. #include <linux/irqdomain.h>
  16. #include <linux/msi.h>
  17. #include <linux/slab.h>
  18. /**
  19. * alloc_msi_entry - Allocate an initialize msi_entry
  20. * @dev: Pointer to the device for which this is allocated
  21. * @nvec: The number of vectors used in this entry
  22. * @affinity: Optional pointer to an affinity mask array size of @nvec
  23. *
  24. * If @affinity is not NULL then a an affinity array[@nvec] is allocated
  25. * and the affinity masks from @affinity are copied.
  26. */
  27. struct msi_desc *
  28. alloc_msi_entry(struct device *dev, int nvec, const struct cpumask *affinity)
  29. {
  30. struct msi_desc *desc;
  31. desc = kzalloc(sizeof(*desc), GFP_KERNEL);
  32. if (!desc)
  33. return NULL;
  34. INIT_LIST_HEAD(&desc->list);
  35. desc->dev = dev;
  36. desc->nvec_used = nvec;
  37. if (affinity) {
  38. desc->affinity = kmemdup(affinity,
  39. nvec * sizeof(*desc->affinity), GFP_KERNEL);
  40. if (!desc->affinity) {
  41. kfree(desc);
  42. return NULL;
  43. }
  44. }
  45. return desc;
  46. }
  47. void free_msi_entry(struct msi_desc *entry)
  48. {
  49. kfree(entry->affinity);
  50. kfree(entry);
  51. }
  52. void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
  53. {
  54. *msg = entry->msg;
  55. }
  56. void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  57. {
  58. struct msi_desc *entry = irq_get_msi_desc(irq);
  59. __get_cached_msi_msg(entry, msg);
  60. }
  61. EXPORT_SYMBOL_GPL(get_cached_msi_msg);
  62. #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
  63. static inline void irq_chip_write_msi_msg(struct irq_data *data,
  64. struct msi_msg *msg)
  65. {
  66. data->chip->irq_write_msi_msg(data, msg);
  67. }
  68. /**
  69. * msi_domain_set_affinity - Generic affinity setter function for MSI domains
  70. * @irq_data: The irq data associated to the interrupt
  71. * @mask: The affinity mask to set
  72. * @force: Flag to enforce setting (disable online checks)
  73. *
  74. * Intended to be used by MSI interrupt controllers which are
  75. * implemented with hierarchical domains.
  76. */
  77. int msi_domain_set_affinity(struct irq_data *irq_data,
  78. const struct cpumask *mask, bool force)
  79. {
  80. struct irq_data *parent = irq_data->parent_data;
  81. struct msi_msg msg;
  82. int ret;
  83. ret = parent->chip->irq_set_affinity(parent, mask, force);
  84. if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
  85. BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  86. irq_chip_write_msi_msg(irq_data, &msg);
  87. }
  88. return ret;
  89. }
  90. static void msi_domain_activate(struct irq_domain *domain,
  91. struct irq_data *irq_data)
  92. {
  93. struct msi_msg msg;
  94. BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  95. irq_chip_write_msi_msg(irq_data, &msg);
  96. }
  97. static void msi_domain_deactivate(struct irq_domain *domain,
  98. struct irq_data *irq_data)
  99. {
  100. struct msi_msg msg;
  101. memset(&msg, 0, sizeof(msg));
  102. irq_chip_write_msi_msg(irq_data, &msg);
  103. }
  104. static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
  105. unsigned int nr_irqs, void *arg)
  106. {
  107. struct msi_domain_info *info = domain->host_data;
  108. struct msi_domain_ops *ops = info->ops;
  109. irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
  110. int i, ret;
  111. if (irq_find_mapping(domain, hwirq) > 0)
  112. return -EEXIST;
  113. if (domain->parent) {
  114. ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
  115. if (ret < 0)
  116. return ret;
  117. }
  118. for (i = 0; i < nr_irqs; i++) {
  119. ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
  120. if (ret < 0) {
  121. if (ops->msi_free) {
  122. for (i--; i > 0; i--)
  123. ops->msi_free(domain, info, virq + i);
  124. }
  125. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  126. return ret;
  127. }
  128. }
  129. return 0;
  130. }
  131. static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
  132. unsigned int nr_irqs)
  133. {
  134. struct msi_domain_info *info = domain->host_data;
  135. int i;
  136. if (info->ops->msi_free) {
  137. for (i = 0; i < nr_irqs; i++)
  138. info->ops->msi_free(domain, info, virq + i);
  139. }
  140. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  141. }
  142. static const struct irq_domain_ops msi_domain_ops = {
  143. .alloc = msi_domain_alloc,
  144. .free = msi_domain_free,
  145. .activate = msi_domain_activate,
  146. .deactivate = msi_domain_deactivate,
  147. };
  148. #ifdef GENERIC_MSI_DOMAIN_OPS
  149. static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
  150. msi_alloc_info_t *arg)
  151. {
  152. return arg->hwirq;
  153. }
  154. static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
  155. int nvec, msi_alloc_info_t *arg)
  156. {
  157. memset(arg, 0, sizeof(*arg));
  158. return 0;
  159. }
  160. static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
  161. struct msi_desc *desc)
  162. {
  163. arg->desc = desc;
  164. }
  165. #else
  166. #define msi_domain_ops_get_hwirq NULL
  167. #define msi_domain_ops_prepare NULL
  168. #define msi_domain_ops_set_desc NULL
  169. #endif /* !GENERIC_MSI_DOMAIN_OPS */
  170. static int msi_domain_ops_init(struct irq_domain *domain,
  171. struct msi_domain_info *info,
  172. unsigned int virq, irq_hw_number_t hwirq,
  173. msi_alloc_info_t *arg)
  174. {
  175. irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
  176. info->chip_data);
  177. if (info->handler && info->handler_name) {
  178. __irq_set_handler(virq, info->handler, 0, info->handler_name);
  179. if (info->handler_data)
  180. irq_set_handler_data(virq, info->handler_data);
  181. }
  182. return 0;
  183. }
  184. static int msi_domain_ops_check(struct irq_domain *domain,
  185. struct msi_domain_info *info,
  186. struct device *dev)
  187. {
  188. return 0;
  189. }
  190. static struct msi_domain_ops msi_domain_ops_default = {
  191. .get_hwirq = msi_domain_ops_get_hwirq,
  192. .msi_init = msi_domain_ops_init,
  193. .msi_check = msi_domain_ops_check,
  194. .msi_prepare = msi_domain_ops_prepare,
  195. .set_desc = msi_domain_ops_set_desc,
  196. };
  197. static void msi_domain_update_dom_ops(struct msi_domain_info *info)
  198. {
  199. struct msi_domain_ops *ops = info->ops;
  200. if (ops == NULL) {
  201. info->ops = &msi_domain_ops_default;
  202. return;
  203. }
  204. if (ops->get_hwirq == NULL)
  205. ops->get_hwirq = msi_domain_ops_default.get_hwirq;
  206. if (ops->msi_init == NULL)
  207. ops->msi_init = msi_domain_ops_default.msi_init;
  208. if (ops->msi_check == NULL)
  209. ops->msi_check = msi_domain_ops_default.msi_check;
  210. if (ops->msi_prepare == NULL)
  211. ops->msi_prepare = msi_domain_ops_default.msi_prepare;
  212. if (ops->set_desc == NULL)
  213. ops->set_desc = msi_domain_ops_default.set_desc;
  214. }
  215. static void msi_domain_update_chip_ops(struct msi_domain_info *info)
  216. {
  217. struct irq_chip *chip = info->chip;
  218. BUG_ON(!chip || !chip->irq_mask || !chip->irq_unmask);
  219. if (!chip->irq_set_affinity)
  220. chip->irq_set_affinity = msi_domain_set_affinity;
  221. }
  222. /**
  223. * msi_create_irq_domain - Create a MSI interrupt domain
  224. * @fwnode: Optional fwnode of the interrupt controller
  225. * @info: MSI domain info
  226. * @parent: Parent irq domain
  227. */
  228. struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
  229. struct msi_domain_info *info,
  230. struct irq_domain *parent)
  231. {
  232. struct irq_domain *domain;
  233. if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
  234. msi_domain_update_dom_ops(info);
  235. if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
  236. msi_domain_update_chip_ops(info);
  237. domain = irq_domain_create_hierarchy(parent, IRQ_DOMAIN_FLAG_MSI, 0,
  238. fwnode, &msi_domain_ops, info);
  239. if (domain && !domain->name && info->chip)
  240. domain->name = info->chip->name;
  241. return domain;
  242. }
  243. int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
  244. int nvec, msi_alloc_info_t *arg)
  245. {
  246. struct msi_domain_info *info = domain->host_data;
  247. struct msi_domain_ops *ops = info->ops;
  248. int ret;
  249. ret = ops->msi_check(domain, info, dev);
  250. if (ret == 0)
  251. ret = ops->msi_prepare(domain, dev, nvec, arg);
  252. return ret;
  253. }
  254. int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
  255. int virq, int nvec, msi_alloc_info_t *arg)
  256. {
  257. struct msi_domain_info *info = domain->host_data;
  258. struct msi_domain_ops *ops = info->ops;
  259. struct msi_desc *desc;
  260. int ret = 0;
  261. for_each_msi_entry(desc, dev) {
  262. /* Don't even try the multi-MSI brain damage. */
  263. if (WARN_ON(!desc->irq || desc->nvec_used != 1)) {
  264. ret = -EINVAL;
  265. break;
  266. }
  267. if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
  268. continue;
  269. ops->set_desc(arg, desc);
  270. /* Assumes the domain mutex is held! */
  271. ret = irq_domain_alloc_irqs_hierarchy(domain, desc->irq, 1,
  272. arg);
  273. if (ret)
  274. break;
  275. irq_set_msi_desc_off(desc->irq, 0, desc);
  276. }
  277. if (ret) {
  278. /* Mop up the damage */
  279. for_each_msi_entry(desc, dev) {
  280. if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
  281. continue;
  282. irq_domain_free_irqs_common(domain, desc->irq, 1);
  283. }
  284. }
  285. return ret;
  286. }
  287. /**
  288. * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
  289. * @domain: The domain to allocate from
  290. * @dev: Pointer to device struct of the device for which the interrupts
  291. * are allocated
  292. * @nvec: The number of interrupts to allocate
  293. *
  294. * Returns 0 on success or an error code.
  295. */
  296. int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
  297. int nvec)
  298. {
  299. struct msi_domain_info *info = domain->host_data;
  300. struct msi_domain_ops *ops = info->ops;
  301. msi_alloc_info_t arg;
  302. struct msi_desc *desc;
  303. int i, ret, virq;
  304. ret = msi_domain_prepare_irqs(domain, dev, nvec, &arg);
  305. if (ret)
  306. return ret;
  307. for_each_msi_entry(desc, dev) {
  308. ops->set_desc(&arg, desc);
  309. virq = __irq_domain_alloc_irqs(domain, -1, desc->nvec_used,
  310. dev_to_node(dev), &arg, false,
  311. desc->affinity);
  312. if (virq < 0) {
  313. ret = -ENOSPC;
  314. if (ops->handle_error)
  315. ret = ops->handle_error(domain, desc, ret);
  316. if (ops->msi_finish)
  317. ops->msi_finish(&arg, ret);
  318. return ret;
  319. }
  320. for (i = 0; i < desc->nvec_used; i++)
  321. irq_set_msi_desc_off(virq, i, desc);
  322. }
  323. if (ops->msi_finish)
  324. ops->msi_finish(&arg, 0);
  325. for_each_msi_entry(desc, dev) {
  326. virq = desc->irq;
  327. if (desc->nvec_used == 1)
  328. dev_dbg(dev, "irq %d for MSI\n", virq);
  329. else
  330. dev_dbg(dev, "irq [%d-%d] for MSI\n",
  331. virq, virq + desc->nvec_used - 1);
  332. /*
  333. * This flag is set by the PCI layer as we need to activate
  334. * the MSI entries before the PCI layer enables MSI in the
  335. * card. Otherwise the card latches a random msi message.
  336. */
  337. if (info->flags & MSI_FLAG_ACTIVATE_EARLY) {
  338. struct irq_data *irq_data;
  339. irq_data = irq_domain_get_irq_data(domain, desc->irq);
  340. irq_domain_activate_irq(irq_data);
  341. }
  342. }
  343. return 0;
  344. }
  345. /**
  346. * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
  347. * @domain: The domain to managing the interrupts
  348. * @dev: Pointer to device struct of the device for which the interrupts
  349. * are free
  350. */
  351. void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
  352. {
  353. struct msi_desc *desc;
  354. for_each_msi_entry(desc, dev) {
  355. /*
  356. * We might have failed to allocate an MSI early
  357. * enough that there is no IRQ associated to this
  358. * entry. If that's the case, don't do anything.
  359. */
  360. if (desc->irq) {
  361. irq_domain_free_irqs(desc->irq, desc->nvec_used);
  362. desc->irq = 0;
  363. }
  364. }
  365. }
  366. /**
  367. * msi_get_domain_info - Get the MSI interrupt domain info for @domain
  368. * @domain: The interrupt domain to retrieve data from
  369. *
  370. * Returns the pointer to the msi_domain_info stored in
  371. * @domain->host_data.
  372. */
  373. struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
  374. {
  375. return (struct msi_domain_info *)domain->host_data;
  376. }
  377. #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */