intel-pt.c 58 KB

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  1. /*
  2. * intel_pt.c: Intel Processor Trace support
  3. * Copyright (c) 2013-2015, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. */
  15. #include <stdio.h>
  16. #include <stdbool.h>
  17. #include <errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include "../perf.h"
  21. #include "session.h"
  22. #include "machine.h"
  23. #include "sort.h"
  24. #include "tool.h"
  25. #include "event.h"
  26. #include "evlist.h"
  27. #include "evsel.h"
  28. #include "map.h"
  29. #include "color.h"
  30. #include "util.h"
  31. #include "thread.h"
  32. #include "thread-stack.h"
  33. #include "symbol.h"
  34. #include "callchain.h"
  35. #include "dso.h"
  36. #include "debug.h"
  37. #include "auxtrace.h"
  38. #include "tsc.h"
  39. #include "intel-pt.h"
  40. #include "config.h"
  41. #include "intel-pt-decoder/intel-pt-log.h"
  42. #include "intel-pt-decoder/intel-pt-decoder.h"
  43. #include "intel-pt-decoder/intel-pt-insn-decoder.h"
  44. #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
  45. #define MAX_TIMESTAMP (~0ULL)
  46. struct intel_pt {
  47. struct auxtrace auxtrace;
  48. struct auxtrace_queues queues;
  49. struct auxtrace_heap heap;
  50. u32 auxtrace_type;
  51. struct perf_session *session;
  52. struct machine *machine;
  53. struct perf_evsel *switch_evsel;
  54. struct thread *unknown_thread;
  55. bool timeless_decoding;
  56. bool sampling_mode;
  57. bool snapshot_mode;
  58. bool per_cpu_mmaps;
  59. bool have_tsc;
  60. bool data_queued;
  61. bool est_tsc;
  62. bool sync_switch;
  63. bool mispred_all;
  64. int have_sched_switch;
  65. u32 pmu_type;
  66. u64 kernel_start;
  67. u64 switch_ip;
  68. u64 ptss_ip;
  69. struct perf_tsc_conversion tc;
  70. bool cap_user_time_zero;
  71. struct itrace_synth_opts synth_opts;
  72. bool sample_instructions;
  73. u64 instructions_sample_type;
  74. u64 instructions_sample_period;
  75. u64 instructions_id;
  76. bool sample_branches;
  77. u32 branches_filter;
  78. u64 branches_sample_type;
  79. u64 branches_id;
  80. bool sample_transactions;
  81. u64 transactions_sample_type;
  82. u64 transactions_id;
  83. bool synth_needs_swap;
  84. u64 tsc_bit;
  85. u64 mtc_bit;
  86. u64 mtc_freq_bits;
  87. u32 tsc_ctc_ratio_n;
  88. u32 tsc_ctc_ratio_d;
  89. u64 cyc_bit;
  90. u64 noretcomp_bit;
  91. unsigned max_non_turbo_ratio;
  92. unsigned long num_events;
  93. char *filter;
  94. struct addr_filters filts;
  95. };
  96. enum switch_state {
  97. INTEL_PT_SS_NOT_TRACING,
  98. INTEL_PT_SS_UNKNOWN,
  99. INTEL_PT_SS_TRACING,
  100. INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
  101. INTEL_PT_SS_EXPECTING_SWITCH_IP,
  102. };
  103. struct intel_pt_queue {
  104. struct intel_pt *pt;
  105. unsigned int queue_nr;
  106. struct auxtrace_buffer *buffer;
  107. void *decoder;
  108. const struct intel_pt_state *state;
  109. struct ip_callchain *chain;
  110. struct branch_stack *last_branch;
  111. struct branch_stack *last_branch_rb;
  112. size_t last_branch_pos;
  113. union perf_event *event_buf;
  114. bool on_heap;
  115. bool stop;
  116. bool step_through_buffers;
  117. bool use_buffer_pid_tid;
  118. bool sync_switch;
  119. pid_t pid, tid;
  120. int cpu;
  121. int switch_state;
  122. pid_t next_tid;
  123. struct thread *thread;
  124. bool exclude_kernel;
  125. bool have_sample;
  126. u64 time;
  127. u64 timestamp;
  128. u32 flags;
  129. u16 insn_len;
  130. u64 last_insn_cnt;
  131. };
  132. static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
  133. unsigned char *buf, size_t len)
  134. {
  135. struct intel_pt_pkt packet;
  136. size_t pos = 0;
  137. int ret, pkt_len, i;
  138. char desc[INTEL_PT_PKT_DESC_MAX];
  139. const char *color = PERF_COLOR_BLUE;
  140. color_fprintf(stdout, color,
  141. ". ... Intel Processor Trace data: size %zu bytes\n",
  142. len);
  143. while (len) {
  144. ret = intel_pt_get_packet(buf, len, &packet);
  145. if (ret > 0)
  146. pkt_len = ret;
  147. else
  148. pkt_len = 1;
  149. printf(".");
  150. color_fprintf(stdout, color, " %08x: ", pos);
  151. for (i = 0; i < pkt_len; i++)
  152. color_fprintf(stdout, color, " %02x", buf[i]);
  153. for (; i < 16; i++)
  154. color_fprintf(stdout, color, " ");
  155. if (ret > 0) {
  156. ret = intel_pt_pkt_desc(&packet, desc,
  157. INTEL_PT_PKT_DESC_MAX);
  158. if (ret > 0)
  159. color_fprintf(stdout, color, " %s\n", desc);
  160. } else {
  161. color_fprintf(stdout, color, " Bad packet!\n");
  162. }
  163. pos += pkt_len;
  164. buf += pkt_len;
  165. len -= pkt_len;
  166. }
  167. }
  168. static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
  169. size_t len)
  170. {
  171. printf(".\n");
  172. intel_pt_dump(pt, buf, len);
  173. }
  174. static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
  175. struct auxtrace_buffer *b)
  176. {
  177. bool consecutive = false;
  178. void *start;
  179. start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
  180. pt->have_tsc, &consecutive);
  181. if (!start)
  182. return -EINVAL;
  183. b->use_size = b->data + b->size - start;
  184. b->use_data = start;
  185. if (b->use_size && consecutive)
  186. b->consecutive = true;
  187. return 0;
  188. }
  189. static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
  190. struct auxtrace_queue *queue,
  191. struct auxtrace_buffer *buffer)
  192. {
  193. if (queue->cpu == -1 && buffer->cpu != -1)
  194. ptq->cpu = buffer->cpu;
  195. ptq->pid = buffer->pid;
  196. ptq->tid = buffer->tid;
  197. intel_pt_log("queue %u cpu %d pid %d tid %d\n",
  198. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  199. thread__zput(ptq->thread);
  200. if (ptq->tid != -1) {
  201. if (ptq->pid != -1)
  202. ptq->thread = machine__findnew_thread(ptq->pt->machine,
  203. ptq->pid,
  204. ptq->tid);
  205. else
  206. ptq->thread = machine__find_thread(ptq->pt->machine, -1,
  207. ptq->tid);
  208. }
  209. }
  210. /* This function assumes data is processed sequentially only */
  211. static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
  212. {
  213. struct intel_pt_queue *ptq = data;
  214. struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
  215. struct auxtrace_queue *queue;
  216. if (ptq->stop) {
  217. b->len = 0;
  218. return 0;
  219. }
  220. queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
  221. next:
  222. buffer = auxtrace_buffer__next(queue, buffer);
  223. if (!buffer) {
  224. if (old_buffer)
  225. auxtrace_buffer__drop_data(old_buffer);
  226. b->len = 0;
  227. return 0;
  228. }
  229. ptq->buffer = buffer;
  230. if (!buffer->data) {
  231. int fd = perf_data_file__fd(ptq->pt->session->file);
  232. buffer->data = auxtrace_buffer__get_data(buffer, fd);
  233. if (!buffer->data)
  234. return -ENOMEM;
  235. }
  236. if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
  237. intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
  238. return -ENOMEM;
  239. if (buffer->use_data) {
  240. b->len = buffer->use_size;
  241. b->buf = buffer->use_data;
  242. } else {
  243. b->len = buffer->size;
  244. b->buf = buffer->data;
  245. }
  246. b->ref_timestamp = buffer->reference;
  247. /*
  248. * If in snapshot mode and the buffer has no usable data, get next
  249. * buffer and again check overlap against old_buffer.
  250. */
  251. if (ptq->pt->snapshot_mode && !b->len)
  252. goto next;
  253. if (old_buffer)
  254. auxtrace_buffer__drop_data(old_buffer);
  255. if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
  256. !buffer->consecutive)) {
  257. b->consecutive = false;
  258. b->trace_nr = buffer->buffer_nr + 1;
  259. } else {
  260. b->consecutive = true;
  261. }
  262. if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
  263. ptq->tid != buffer->tid))
  264. intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
  265. if (ptq->step_through_buffers)
  266. ptq->stop = true;
  267. if (!b->len)
  268. return intel_pt_get_trace(b, data);
  269. return 0;
  270. }
  271. struct intel_pt_cache_entry {
  272. struct auxtrace_cache_entry entry;
  273. u64 insn_cnt;
  274. u64 byte_cnt;
  275. enum intel_pt_insn_op op;
  276. enum intel_pt_insn_branch branch;
  277. int length;
  278. int32_t rel;
  279. };
  280. static int intel_pt_config_div(const char *var, const char *value, void *data)
  281. {
  282. int *d = data;
  283. long val;
  284. if (!strcmp(var, "intel-pt.cache-divisor")) {
  285. val = strtol(value, NULL, 0);
  286. if (val > 0 && val <= INT_MAX)
  287. *d = val;
  288. }
  289. return 0;
  290. }
  291. static int intel_pt_cache_divisor(void)
  292. {
  293. static int d;
  294. if (d)
  295. return d;
  296. perf_config(intel_pt_config_div, &d);
  297. if (!d)
  298. d = 64;
  299. return d;
  300. }
  301. static unsigned int intel_pt_cache_size(struct dso *dso,
  302. struct machine *machine)
  303. {
  304. off_t size;
  305. size = dso__data_size(dso, machine);
  306. size /= intel_pt_cache_divisor();
  307. if (size < 1000)
  308. return 10;
  309. if (size > (1 << 21))
  310. return 21;
  311. return 32 - __builtin_clz(size);
  312. }
  313. static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
  314. struct machine *machine)
  315. {
  316. struct auxtrace_cache *c;
  317. unsigned int bits;
  318. if (dso->auxtrace_cache)
  319. return dso->auxtrace_cache;
  320. bits = intel_pt_cache_size(dso, machine);
  321. /* Ignoring cache creation failure */
  322. c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
  323. dso->auxtrace_cache = c;
  324. return c;
  325. }
  326. static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
  327. u64 offset, u64 insn_cnt, u64 byte_cnt,
  328. struct intel_pt_insn *intel_pt_insn)
  329. {
  330. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  331. struct intel_pt_cache_entry *e;
  332. int err;
  333. if (!c)
  334. return -ENOMEM;
  335. e = auxtrace_cache__alloc_entry(c);
  336. if (!e)
  337. return -ENOMEM;
  338. e->insn_cnt = insn_cnt;
  339. e->byte_cnt = byte_cnt;
  340. e->op = intel_pt_insn->op;
  341. e->branch = intel_pt_insn->branch;
  342. e->length = intel_pt_insn->length;
  343. e->rel = intel_pt_insn->rel;
  344. err = auxtrace_cache__add(c, offset, &e->entry);
  345. if (err)
  346. auxtrace_cache__free_entry(c, e);
  347. return err;
  348. }
  349. static struct intel_pt_cache_entry *
  350. intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
  351. {
  352. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  353. if (!c)
  354. return NULL;
  355. return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
  356. }
  357. static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
  358. uint64_t *insn_cnt_ptr, uint64_t *ip,
  359. uint64_t to_ip, uint64_t max_insn_cnt,
  360. void *data)
  361. {
  362. struct intel_pt_queue *ptq = data;
  363. struct machine *machine = ptq->pt->machine;
  364. struct thread *thread;
  365. struct addr_location al;
  366. unsigned char buf[1024];
  367. size_t bufsz;
  368. ssize_t len;
  369. int x86_64;
  370. u8 cpumode;
  371. u64 offset, start_offset, start_ip;
  372. u64 insn_cnt = 0;
  373. bool one_map = true;
  374. if (to_ip && *ip == to_ip)
  375. goto out_no_cache;
  376. bufsz = intel_pt_insn_max_size();
  377. if (*ip >= ptq->pt->kernel_start)
  378. cpumode = PERF_RECORD_MISC_KERNEL;
  379. else
  380. cpumode = PERF_RECORD_MISC_USER;
  381. thread = ptq->thread;
  382. if (!thread) {
  383. if (cpumode != PERF_RECORD_MISC_KERNEL)
  384. return -EINVAL;
  385. thread = ptq->pt->unknown_thread;
  386. }
  387. while (1) {
  388. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
  389. if (!al.map || !al.map->dso)
  390. return -EINVAL;
  391. if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
  392. dso__data_status_seen(al.map->dso,
  393. DSO_DATA_STATUS_SEEN_ITRACE))
  394. return -ENOENT;
  395. offset = al.map->map_ip(al.map, *ip);
  396. if (!to_ip && one_map) {
  397. struct intel_pt_cache_entry *e;
  398. e = intel_pt_cache_lookup(al.map->dso, machine, offset);
  399. if (e &&
  400. (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
  401. *insn_cnt_ptr = e->insn_cnt;
  402. *ip += e->byte_cnt;
  403. intel_pt_insn->op = e->op;
  404. intel_pt_insn->branch = e->branch;
  405. intel_pt_insn->length = e->length;
  406. intel_pt_insn->rel = e->rel;
  407. intel_pt_log_insn_no_data(intel_pt_insn, *ip);
  408. return 0;
  409. }
  410. }
  411. start_offset = offset;
  412. start_ip = *ip;
  413. /* Load maps to ensure dso->is_64_bit has been updated */
  414. map__load(al.map);
  415. x86_64 = al.map->dso->is_64_bit;
  416. while (1) {
  417. len = dso__data_read_offset(al.map->dso, machine,
  418. offset, buf, bufsz);
  419. if (len <= 0)
  420. return -EINVAL;
  421. if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
  422. return -EINVAL;
  423. intel_pt_log_insn(intel_pt_insn, *ip);
  424. insn_cnt += 1;
  425. if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
  426. goto out;
  427. if (max_insn_cnt && insn_cnt >= max_insn_cnt)
  428. goto out_no_cache;
  429. *ip += intel_pt_insn->length;
  430. if (to_ip && *ip == to_ip)
  431. goto out_no_cache;
  432. if (*ip >= al.map->end)
  433. break;
  434. offset += intel_pt_insn->length;
  435. }
  436. one_map = false;
  437. }
  438. out:
  439. *insn_cnt_ptr = insn_cnt;
  440. if (!one_map)
  441. goto out_no_cache;
  442. /*
  443. * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
  444. * entries.
  445. */
  446. if (to_ip) {
  447. struct intel_pt_cache_entry *e;
  448. e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
  449. if (e)
  450. return 0;
  451. }
  452. /* Ignore cache errors */
  453. intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
  454. *ip - start_ip, intel_pt_insn);
  455. return 0;
  456. out_no_cache:
  457. *insn_cnt_ptr = insn_cnt;
  458. return 0;
  459. }
  460. static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
  461. uint64_t offset, const char *filename)
  462. {
  463. struct addr_filter *filt;
  464. bool have_filter = false;
  465. bool hit_tracestop = false;
  466. bool hit_filter = false;
  467. list_for_each_entry(filt, &pt->filts.head, list) {
  468. if (filt->start)
  469. have_filter = true;
  470. if ((filename && !filt->filename) ||
  471. (!filename && filt->filename) ||
  472. (filename && strcmp(filename, filt->filename)))
  473. continue;
  474. if (!(offset >= filt->addr && offset < filt->addr + filt->size))
  475. continue;
  476. intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
  477. ip, offset, filename ? filename : "[kernel]",
  478. filt->start ? "filter" : "stop",
  479. filt->addr, filt->size);
  480. if (filt->start)
  481. hit_filter = true;
  482. else
  483. hit_tracestop = true;
  484. }
  485. if (!hit_tracestop && !hit_filter)
  486. intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
  487. ip, offset, filename ? filename : "[kernel]");
  488. return hit_tracestop || (have_filter && !hit_filter);
  489. }
  490. static int __intel_pt_pgd_ip(uint64_t ip, void *data)
  491. {
  492. struct intel_pt_queue *ptq = data;
  493. struct thread *thread;
  494. struct addr_location al;
  495. u8 cpumode;
  496. u64 offset;
  497. if (ip >= ptq->pt->kernel_start)
  498. return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
  499. cpumode = PERF_RECORD_MISC_USER;
  500. thread = ptq->thread;
  501. if (!thread)
  502. return -EINVAL;
  503. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
  504. if (!al.map || !al.map->dso)
  505. return -EINVAL;
  506. offset = al.map->map_ip(al.map, ip);
  507. return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
  508. al.map->dso->long_name);
  509. }
  510. static bool intel_pt_pgd_ip(uint64_t ip, void *data)
  511. {
  512. return __intel_pt_pgd_ip(ip, data) > 0;
  513. }
  514. static bool intel_pt_get_config(struct intel_pt *pt,
  515. struct perf_event_attr *attr, u64 *config)
  516. {
  517. if (attr->type == pt->pmu_type) {
  518. if (config)
  519. *config = attr->config;
  520. return true;
  521. }
  522. return false;
  523. }
  524. static bool intel_pt_exclude_kernel(struct intel_pt *pt)
  525. {
  526. struct perf_evsel *evsel;
  527. evlist__for_each_entry(pt->session->evlist, evsel) {
  528. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  529. !evsel->attr.exclude_kernel)
  530. return false;
  531. }
  532. return true;
  533. }
  534. static bool intel_pt_return_compression(struct intel_pt *pt)
  535. {
  536. struct perf_evsel *evsel;
  537. u64 config;
  538. if (!pt->noretcomp_bit)
  539. return true;
  540. evlist__for_each_entry(pt->session->evlist, evsel) {
  541. if (intel_pt_get_config(pt, &evsel->attr, &config) &&
  542. (config & pt->noretcomp_bit))
  543. return false;
  544. }
  545. return true;
  546. }
  547. static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
  548. {
  549. struct perf_evsel *evsel;
  550. unsigned int shift;
  551. u64 config;
  552. if (!pt->mtc_freq_bits)
  553. return 0;
  554. for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
  555. config >>= 1;
  556. evlist__for_each_entry(pt->session->evlist, evsel) {
  557. if (intel_pt_get_config(pt, &evsel->attr, &config))
  558. return (config & pt->mtc_freq_bits) >> shift;
  559. }
  560. return 0;
  561. }
  562. static bool intel_pt_timeless_decoding(struct intel_pt *pt)
  563. {
  564. struct perf_evsel *evsel;
  565. bool timeless_decoding = true;
  566. u64 config;
  567. if (!pt->tsc_bit || !pt->cap_user_time_zero)
  568. return true;
  569. evlist__for_each_entry(pt->session->evlist, evsel) {
  570. if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
  571. return true;
  572. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  573. if (config & pt->tsc_bit)
  574. timeless_decoding = false;
  575. else
  576. return true;
  577. }
  578. }
  579. return timeless_decoding;
  580. }
  581. static bool intel_pt_tracing_kernel(struct intel_pt *pt)
  582. {
  583. struct perf_evsel *evsel;
  584. evlist__for_each_entry(pt->session->evlist, evsel) {
  585. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  586. !evsel->attr.exclude_kernel)
  587. return true;
  588. }
  589. return false;
  590. }
  591. static bool intel_pt_have_tsc(struct intel_pt *pt)
  592. {
  593. struct perf_evsel *evsel;
  594. bool have_tsc = false;
  595. u64 config;
  596. if (!pt->tsc_bit)
  597. return false;
  598. evlist__for_each_entry(pt->session->evlist, evsel) {
  599. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  600. if (config & pt->tsc_bit)
  601. have_tsc = true;
  602. else
  603. return false;
  604. }
  605. }
  606. return have_tsc;
  607. }
  608. static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
  609. {
  610. u64 quot, rem;
  611. quot = ns / pt->tc.time_mult;
  612. rem = ns % pt->tc.time_mult;
  613. return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
  614. pt->tc.time_mult;
  615. }
  616. static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
  617. unsigned int queue_nr)
  618. {
  619. struct intel_pt_params params = { .get_trace = 0, };
  620. struct perf_env *env = pt->machine->env;
  621. struct intel_pt_queue *ptq;
  622. ptq = zalloc(sizeof(struct intel_pt_queue));
  623. if (!ptq)
  624. return NULL;
  625. if (pt->synth_opts.callchain) {
  626. size_t sz = sizeof(struct ip_callchain);
  627. sz += pt->synth_opts.callchain_sz * sizeof(u64);
  628. ptq->chain = zalloc(sz);
  629. if (!ptq->chain)
  630. goto out_free;
  631. }
  632. if (pt->synth_opts.last_branch) {
  633. size_t sz = sizeof(struct branch_stack);
  634. sz += pt->synth_opts.last_branch_sz *
  635. sizeof(struct branch_entry);
  636. ptq->last_branch = zalloc(sz);
  637. if (!ptq->last_branch)
  638. goto out_free;
  639. ptq->last_branch_rb = zalloc(sz);
  640. if (!ptq->last_branch_rb)
  641. goto out_free;
  642. }
  643. ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
  644. if (!ptq->event_buf)
  645. goto out_free;
  646. ptq->pt = pt;
  647. ptq->queue_nr = queue_nr;
  648. ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
  649. ptq->pid = -1;
  650. ptq->tid = -1;
  651. ptq->cpu = -1;
  652. ptq->next_tid = -1;
  653. params.get_trace = intel_pt_get_trace;
  654. params.walk_insn = intel_pt_walk_next_insn;
  655. params.data = ptq;
  656. params.return_compression = intel_pt_return_compression(pt);
  657. params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
  658. params.mtc_period = intel_pt_mtc_period(pt);
  659. params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
  660. params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
  661. if (pt->filts.cnt > 0)
  662. params.pgd_ip = intel_pt_pgd_ip;
  663. if (pt->synth_opts.instructions) {
  664. if (pt->synth_opts.period) {
  665. switch (pt->synth_opts.period_type) {
  666. case PERF_ITRACE_PERIOD_INSTRUCTIONS:
  667. params.period_type =
  668. INTEL_PT_PERIOD_INSTRUCTIONS;
  669. params.period = pt->synth_opts.period;
  670. break;
  671. case PERF_ITRACE_PERIOD_TICKS:
  672. params.period_type = INTEL_PT_PERIOD_TICKS;
  673. params.period = pt->synth_opts.period;
  674. break;
  675. case PERF_ITRACE_PERIOD_NANOSECS:
  676. params.period_type = INTEL_PT_PERIOD_TICKS;
  677. params.period = intel_pt_ns_to_ticks(pt,
  678. pt->synth_opts.period);
  679. break;
  680. default:
  681. break;
  682. }
  683. }
  684. if (!params.period) {
  685. params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
  686. params.period = 1;
  687. }
  688. }
  689. if (env->cpuid && !strncmp(env->cpuid, "GenuineIntel,6,92,", 18))
  690. params.flags |= INTEL_PT_FUP_WITH_NLIP;
  691. ptq->decoder = intel_pt_decoder_new(&params);
  692. if (!ptq->decoder)
  693. goto out_free;
  694. return ptq;
  695. out_free:
  696. zfree(&ptq->event_buf);
  697. zfree(&ptq->last_branch);
  698. zfree(&ptq->last_branch_rb);
  699. zfree(&ptq->chain);
  700. free(ptq);
  701. return NULL;
  702. }
  703. static void intel_pt_free_queue(void *priv)
  704. {
  705. struct intel_pt_queue *ptq = priv;
  706. if (!ptq)
  707. return;
  708. thread__zput(ptq->thread);
  709. intel_pt_decoder_free(ptq->decoder);
  710. zfree(&ptq->event_buf);
  711. zfree(&ptq->last_branch);
  712. zfree(&ptq->last_branch_rb);
  713. zfree(&ptq->chain);
  714. free(ptq);
  715. }
  716. static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
  717. struct auxtrace_queue *queue)
  718. {
  719. struct intel_pt_queue *ptq = queue->priv;
  720. if (queue->tid == -1 || pt->have_sched_switch) {
  721. ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
  722. thread__zput(ptq->thread);
  723. }
  724. if (!ptq->thread && ptq->tid != -1)
  725. ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
  726. if (ptq->thread) {
  727. ptq->pid = ptq->thread->pid_;
  728. if (queue->cpu == -1)
  729. ptq->cpu = ptq->thread->cpu;
  730. }
  731. }
  732. static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
  733. {
  734. if (ptq->state->flags & INTEL_PT_ABORT_TX) {
  735. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
  736. } else if (ptq->state->flags & INTEL_PT_ASYNC) {
  737. if (ptq->state->to_ip)
  738. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
  739. PERF_IP_FLAG_ASYNC |
  740. PERF_IP_FLAG_INTERRUPT;
  741. else
  742. ptq->flags = PERF_IP_FLAG_BRANCH |
  743. PERF_IP_FLAG_TRACE_END;
  744. ptq->insn_len = 0;
  745. } else {
  746. if (ptq->state->from_ip)
  747. ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
  748. else
  749. ptq->flags = PERF_IP_FLAG_BRANCH |
  750. PERF_IP_FLAG_TRACE_BEGIN;
  751. if (ptq->state->flags & INTEL_PT_IN_TX)
  752. ptq->flags |= PERF_IP_FLAG_IN_TX;
  753. ptq->insn_len = ptq->state->insn_len;
  754. }
  755. }
  756. static int intel_pt_setup_queue(struct intel_pt *pt,
  757. struct auxtrace_queue *queue,
  758. unsigned int queue_nr)
  759. {
  760. struct intel_pt_queue *ptq = queue->priv;
  761. if (list_empty(&queue->head))
  762. return 0;
  763. if (!ptq) {
  764. ptq = intel_pt_alloc_queue(pt, queue_nr);
  765. if (!ptq)
  766. return -ENOMEM;
  767. queue->priv = ptq;
  768. if (queue->cpu != -1)
  769. ptq->cpu = queue->cpu;
  770. ptq->tid = queue->tid;
  771. if (pt->sampling_mode) {
  772. if (pt->timeless_decoding)
  773. ptq->step_through_buffers = true;
  774. if (pt->timeless_decoding || !pt->have_sched_switch)
  775. ptq->use_buffer_pid_tid = true;
  776. }
  777. ptq->sync_switch = pt->sync_switch;
  778. }
  779. if (!ptq->on_heap &&
  780. (!ptq->sync_switch ||
  781. ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
  782. const struct intel_pt_state *state;
  783. int ret;
  784. if (pt->timeless_decoding)
  785. return 0;
  786. intel_pt_log("queue %u getting timestamp\n", queue_nr);
  787. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  788. queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  789. while (1) {
  790. state = intel_pt_decode(ptq->decoder);
  791. if (state->err) {
  792. if (state->err == INTEL_PT_ERR_NODATA) {
  793. intel_pt_log("queue %u has no timestamp\n",
  794. queue_nr);
  795. return 0;
  796. }
  797. continue;
  798. }
  799. if (state->timestamp)
  800. break;
  801. }
  802. ptq->timestamp = state->timestamp;
  803. intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
  804. queue_nr, ptq->timestamp);
  805. ptq->state = state;
  806. ptq->have_sample = true;
  807. intel_pt_sample_flags(ptq);
  808. ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
  809. if (ret)
  810. return ret;
  811. ptq->on_heap = true;
  812. }
  813. return 0;
  814. }
  815. static int intel_pt_setup_queues(struct intel_pt *pt)
  816. {
  817. unsigned int i;
  818. int ret;
  819. for (i = 0; i < pt->queues.nr_queues; i++) {
  820. ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
  821. if (ret)
  822. return ret;
  823. }
  824. return 0;
  825. }
  826. static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
  827. {
  828. struct branch_stack *bs_src = ptq->last_branch_rb;
  829. struct branch_stack *bs_dst = ptq->last_branch;
  830. size_t nr = 0;
  831. bs_dst->nr = bs_src->nr;
  832. if (!bs_src->nr)
  833. return;
  834. nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
  835. memcpy(&bs_dst->entries[0],
  836. &bs_src->entries[ptq->last_branch_pos],
  837. sizeof(struct branch_entry) * nr);
  838. if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
  839. memcpy(&bs_dst->entries[nr],
  840. &bs_src->entries[0],
  841. sizeof(struct branch_entry) * ptq->last_branch_pos);
  842. }
  843. }
  844. static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
  845. {
  846. ptq->last_branch_pos = 0;
  847. ptq->last_branch_rb->nr = 0;
  848. }
  849. static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
  850. {
  851. const struct intel_pt_state *state = ptq->state;
  852. struct branch_stack *bs = ptq->last_branch_rb;
  853. struct branch_entry *be;
  854. if (!ptq->last_branch_pos)
  855. ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
  856. ptq->last_branch_pos -= 1;
  857. be = &bs->entries[ptq->last_branch_pos];
  858. be->from = state->from_ip;
  859. be->to = state->to_ip;
  860. be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
  861. be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
  862. /* No support for mispredict */
  863. be->flags.mispred = ptq->pt->mispred_all;
  864. if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
  865. bs->nr += 1;
  866. }
  867. static int intel_pt_inject_event(union perf_event *event,
  868. struct perf_sample *sample, u64 type,
  869. bool swapped)
  870. {
  871. event->header.size = perf_event__sample_event_size(sample, type, 0);
  872. return perf_event__synthesize_sample(event, type, 0, sample, swapped);
  873. }
  874. static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
  875. {
  876. int ret;
  877. struct intel_pt *pt = ptq->pt;
  878. union perf_event *event = ptq->event_buf;
  879. struct perf_sample sample = { .ip = 0, };
  880. struct dummy_branch_stack {
  881. u64 nr;
  882. struct branch_entry entries;
  883. } dummy_bs;
  884. if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
  885. return 0;
  886. if (pt->synth_opts.initial_skip &&
  887. pt->num_events++ < pt->synth_opts.initial_skip)
  888. return 0;
  889. event->sample.header.type = PERF_RECORD_SAMPLE;
  890. event->sample.header.misc = PERF_RECORD_MISC_USER;
  891. event->sample.header.size = sizeof(struct perf_event_header);
  892. if (!pt->timeless_decoding)
  893. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  894. sample.cpumode = PERF_RECORD_MISC_USER;
  895. sample.ip = ptq->state->from_ip;
  896. sample.pid = ptq->pid;
  897. sample.tid = ptq->tid;
  898. sample.addr = ptq->state->to_ip;
  899. sample.id = ptq->pt->branches_id;
  900. sample.stream_id = ptq->pt->branches_id;
  901. sample.period = 1;
  902. sample.cpu = ptq->cpu;
  903. sample.flags = ptq->flags;
  904. sample.insn_len = ptq->insn_len;
  905. /*
  906. * perf report cannot handle events without a branch stack when using
  907. * SORT_MODE__BRANCH so make a dummy one.
  908. */
  909. if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
  910. dummy_bs = (struct dummy_branch_stack){
  911. .nr = 1,
  912. .entries = {
  913. .from = sample.ip,
  914. .to = sample.addr,
  915. },
  916. };
  917. sample.branch_stack = (struct branch_stack *)&dummy_bs;
  918. }
  919. if (pt->synth_opts.inject) {
  920. ret = intel_pt_inject_event(event, &sample,
  921. pt->branches_sample_type,
  922. pt->synth_needs_swap);
  923. if (ret)
  924. return ret;
  925. }
  926. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  927. if (ret)
  928. pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
  929. ret);
  930. return ret;
  931. }
  932. static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
  933. {
  934. int ret;
  935. struct intel_pt *pt = ptq->pt;
  936. union perf_event *event = ptq->event_buf;
  937. struct perf_sample sample = { .ip = 0, };
  938. if (pt->synth_opts.initial_skip &&
  939. pt->num_events++ < pt->synth_opts.initial_skip)
  940. return 0;
  941. event->sample.header.type = PERF_RECORD_SAMPLE;
  942. event->sample.header.misc = PERF_RECORD_MISC_USER;
  943. event->sample.header.size = sizeof(struct perf_event_header);
  944. if (!pt->timeless_decoding)
  945. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  946. sample.cpumode = PERF_RECORD_MISC_USER;
  947. sample.ip = ptq->state->from_ip;
  948. sample.pid = ptq->pid;
  949. sample.tid = ptq->tid;
  950. sample.addr = ptq->state->to_ip;
  951. sample.id = ptq->pt->instructions_id;
  952. sample.stream_id = ptq->pt->instructions_id;
  953. sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
  954. sample.cpu = ptq->cpu;
  955. sample.flags = ptq->flags;
  956. sample.insn_len = ptq->insn_len;
  957. ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
  958. if (pt->synth_opts.callchain) {
  959. thread_stack__sample(ptq->thread, ptq->chain,
  960. pt->synth_opts.callchain_sz, sample.ip);
  961. sample.callchain = ptq->chain;
  962. }
  963. if (pt->synth_opts.last_branch) {
  964. intel_pt_copy_last_branch_rb(ptq);
  965. sample.branch_stack = ptq->last_branch;
  966. }
  967. if (pt->synth_opts.inject) {
  968. ret = intel_pt_inject_event(event, &sample,
  969. pt->instructions_sample_type,
  970. pt->synth_needs_swap);
  971. if (ret)
  972. return ret;
  973. }
  974. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  975. if (ret)
  976. pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
  977. ret);
  978. if (pt->synth_opts.last_branch)
  979. intel_pt_reset_last_branch_rb(ptq);
  980. return ret;
  981. }
  982. static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
  983. {
  984. int ret;
  985. struct intel_pt *pt = ptq->pt;
  986. union perf_event *event = ptq->event_buf;
  987. struct perf_sample sample = { .ip = 0, };
  988. if (pt->synth_opts.initial_skip &&
  989. pt->num_events++ < pt->synth_opts.initial_skip)
  990. return 0;
  991. event->sample.header.type = PERF_RECORD_SAMPLE;
  992. event->sample.header.misc = PERF_RECORD_MISC_USER;
  993. event->sample.header.size = sizeof(struct perf_event_header);
  994. if (!pt->timeless_decoding)
  995. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  996. sample.cpumode = PERF_RECORD_MISC_USER;
  997. sample.ip = ptq->state->from_ip;
  998. sample.pid = ptq->pid;
  999. sample.tid = ptq->tid;
  1000. sample.addr = ptq->state->to_ip;
  1001. sample.id = ptq->pt->transactions_id;
  1002. sample.stream_id = ptq->pt->transactions_id;
  1003. sample.period = 1;
  1004. sample.cpu = ptq->cpu;
  1005. sample.flags = ptq->flags;
  1006. sample.insn_len = ptq->insn_len;
  1007. if (pt->synth_opts.callchain) {
  1008. thread_stack__sample(ptq->thread, ptq->chain,
  1009. pt->synth_opts.callchain_sz, sample.ip);
  1010. sample.callchain = ptq->chain;
  1011. }
  1012. if (pt->synth_opts.last_branch) {
  1013. intel_pt_copy_last_branch_rb(ptq);
  1014. sample.branch_stack = ptq->last_branch;
  1015. }
  1016. if (pt->synth_opts.inject) {
  1017. ret = intel_pt_inject_event(event, &sample,
  1018. pt->transactions_sample_type,
  1019. pt->synth_needs_swap);
  1020. if (ret)
  1021. return ret;
  1022. }
  1023. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  1024. if (ret)
  1025. pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
  1026. ret);
  1027. if (pt->synth_opts.last_branch)
  1028. intel_pt_reset_last_branch_rb(ptq);
  1029. return ret;
  1030. }
  1031. static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
  1032. pid_t pid, pid_t tid, u64 ip)
  1033. {
  1034. union perf_event event;
  1035. char msg[MAX_AUXTRACE_ERROR_MSG];
  1036. int err;
  1037. intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
  1038. auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
  1039. code, cpu, pid, tid, ip, msg);
  1040. err = perf_session__deliver_synth_event(pt->session, &event, NULL);
  1041. if (err)
  1042. pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
  1043. err);
  1044. return err;
  1045. }
  1046. static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
  1047. {
  1048. struct auxtrace_queue *queue;
  1049. pid_t tid = ptq->next_tid;
  1050. int err;
  1051. if (tid == -1)
  1052. return 0;
  1053. intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
  1054. err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
  1055. queue = &pt->queues.queue_array[ptq->queue_nr];
  1056. intel_pt_set_pid_tid_cpu(pt, queue);
  1057. ptq->next_tid = -1;
  1058. return err;
  1059. }
  1060. static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
  1061. {
  1062. struct intel_pt *pt = ptq->pt;
  1063. return ip == pt->switch_ip &&
  1064. (ptq->flags & PERF_IP_FLAG_BRANCH) &&
  1065. !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
  1066. PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
  1067. }
  1068. static int intel_pt_sample(struct intel_pt_queue *ptq)
  1069. {
  1070. const struct intel_pt_state *state = ptq->state;
  1071. struct intel_pt *pt = ptq->pt;
  1072. int err;
  1073. if (!ptq->have_sample)
  1074. return 0;
  1075. ptq->have_sample = false;
  1076. if (pt->sample_instructions &&
  1077. (state->type & INTEL_PT_INSTRUCTION) &&
  1078. (!pt->synth_opts.initial_skip ||
  1079. pt->num_events++ >= pt->synth_opts.initial_skip)) {
  1080. err = intel_pt_synth_instruction_sample(ptq);
  1081. if (err)
  1082. return err;
  1083. }
  1084. if (pt->sample_transactions &&
  1085. (state->type & INTEL_PT_TRANSACTION) &&
  1086. (!pt->synth_opts.initial_skip ||
  1087. pt->num_events++ >= pt->synth_opts.initial_skip)) {
  1088. err = intel_pt_synth_transaction_sample(ptq);
  1089. if (err)
  1090. return err;
  1091. }
  1092. if (!(state->type & INTEL_PT_BRANCH))
  1093. return 0;
  1094. if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
  1095. thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
  1096. state->to_ip, ptq->insn_len,
  1097. state->trace_nr);
  1098. else
  1099. thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
  1100. if (pt->sample_branches) {
  1101. err = intel_pt_synth_branch_sample(ptq);
  1102. if (err)
  1103. return err;
  1104. }
  1105. if (pt->synth_opts.last_branch)
  1106. intel_pt_update_last_branch_rb(ptq);
  1107. if (!ptq->sync_switch)
  1108. return 0;
  1109. if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
  1110. switch (ptq->switch_state) {
  1111. case INTEL_PT_SS_NOT_TRACING:
  1112. case INTEL_PT_SS_UNKNOWN:
  1113. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1114. err = intel_pt_next_tid(pt, ptq);
  1115. if (err)
  1116. return err;
  1117. ptq->switch_state = INTEL_PT_SS_TRACING;
  1118. break;
  1119. default:
  1120. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
  1121. return 1;
  1122. }
  1123. } else if (!state->to_ip) {
  1124. ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
  1125. } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
  1126. ptq->switch_state = INTEL_PT_SS_UNKNOWN;
  1127. } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1128. state->to_ip == pt->ptss_ip &&
  1129. (ptq->flags & PERF_IP_FLAG_CALL)) {
  1130. ptq->switch_state = INTEL_PT_SS_TRACING;
  1131. }
  1132. return 0;
  1133. }
  1134. static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
  1135. {
  1136. struct machine *machine = pt->machine;
  1137. struct map *map;
  1138. struct symbol *sym, *start;
  1139. u64 ip, switch_ip = 0;
  1140. const char *ptss;
  1141. if (ptss_ip)
  1142. *ptss_ip = 0;
  1143. map = machine__kernel_map(machine);
  1144. if (!map)
  1145. return 0;
  1146. if (map__load(map))
  1147. return 0;
  1148. start = dso__first_symbol(map->dso, MAP__FUNCTION);
  1149. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  1150. if (sym->binding == STB_GLOBAL &&
  1151. !strcmp(sym->name, "__switch_to")) {
  1152. ip = map->unmap_ip(map, sym->start);
  1153. if (ip >= map->start && ip < map->end) {
  1154. switch_ip = ip;
  1155. break;
  1156. }
  1157. }
  1158. }
  1159. if (!switch_ip || !ptss_ip)
  1160. return 0;
  1161. if (pt->have_sched_switch == 1)
  1162. ptss = "perf_trace_sched_switch";
  1163. else
  1164. ptss = "__perf_event_task_sched_out";
  1165. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  1166. if (!strcmp(sym->name, ptss)) {
  1167. ip = map->unmap_ip(map, sym->start);
  1168. if (ip >= map->start && ip < map->end) {
  1169. *ptss_ip = ip;
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. return switch_ip;
  1175. }
  1176. static void intel_pt_enable_sync_switch(struct intel_pt *pt)
  1177. {
  1178. unsigned int i;
  1179. pt->sync_switch = true;
  1180. for (i = 0; i < pt->queues.nr_queues; i++) {
  1181. struct auxtrace_queue *queue = &pt->queues.queue_array[i];
  1182. struct intel_pt_queue *ptq = queue->priv;
  1183. if (ptq)
  1184. ptq->sync_switch = true;
  1185. }
  1186. }
  1187. static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
  1188. {
  1189. const struct intel_pt_state *state = ptq->state;
  1190. struct intel_pt *pt = ptq->pt;
  1191. int err;
  1192. if (!pt->kernel_start) {
  1193. pt->kernel_start = machine__kernel_start(pt->machine);
  1194. if (pt->per_cpu_mmaps &&
  1195. (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
  1196. !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
  1197. !pt->sampling_mode) {
  1198. pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
  1199. if (pt->switch_ip) {
  1200. intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
  1201. pt->switch_ip, pt->ptss_ip);
  1202. intel_pt_enable_sync_switch(pt);
  1203. }
  1204. }
  1205. }
  1206. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  1207. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  1208. while (1) {
  1209. err = intel_pt_sample(ptq);
  1210. if (err)
  1211. return err;
  1212. state = intel_pt_decode(ptq->decoder);
  1213. if (state->err) {
  1214. if (state->err == INTEL_PT_ERR_NODATA)
  1215. return 1;
  1216. if (ptq->sync_switch &&
  1217. state->from_ip >= pt->kernel_start) {
  1218. ptq->sync_switch = false;
  1219. intel_pt_next_tid(pt, ptq);
  1220. }
  1221. if (pt->synth_opts.errors) {
  1222. err = intel_pt_synth_error(pt, state->err,
  1223. ptq->cpu, ptq->pid,
  1224. ptq->tid,
  1225. state->from_ip);
  1226. if (err)
  1227. return err;
  1228. }
  1229. continue;
  1230. }
  1231. ptq->state = state;
  1232. ptq->have_sample = true;
  1233. intel_pt_sample_flags(ptq);
  1234. /* Use estimated TSC upon return to user space */
  1235. if (pt->est_tsc &&
  1236. (state->from_ip >= pt->kernel_start || !state->from_ip) &&
  1237. state->to_ip && state->to_ip < pt->kernel_start) {
  1238. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1239. state->timestamp, state->est_timestamp);
  1240. ptq->timestamp = state->est_timestamp;
  1241. /* Use estimated TSC in unknown switch state */
  1242. } else if (ptq->sync_switch &&
  1243. ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1244. intel_pt_is_switch_ip(ptq, state->to_ip) &&
  1245. ptq->next_tid == -1) {
  1246. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1247. state->timestamp, state->est_timestamp);
  1248. ptq->timestamp = state->est_timestamp;
  1249. } else if (state->timestamp > ptq->timestamp) {
  1250. ptq->timestamp = state->timestamp;
  1251. }
  1252. if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
  1253. *timestamp = ptq->timestamp;
  1254. return 0;
  1255. }
  1256. }
  1257. return 0;
  1258. }
  1259. static inline int intel_pt_update_queues(struct intel_pt *pt)
  1260. {
  1261. if (pt->queues.new_data) {
  1262. pt->queues.new_data = false;
  1263. return intel_pt_setup_queues(pt);
  1264. }
  1265. return 0;
  1266. }
  1267. static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
  1268. {
  1269. unsigned int queue_nr;
  1270. u64 ts;
  1271. int ret;
  1272. while (1) {
  1273. struct auxtrace_queue *queue;
  1274. struct intel_pt_queue *ptq;
  1275. if (!pt->heap.heap_cnt)
  1276. return 0;
  1277. if (pt->heap.heap_array[0].ordinal >= timestamp)
  1278. return 0;
  1279. queue_nr = pt->heap.heap_array[0].queue_nr;
  1280. queue = &pt->queues.queue_array[queue_nr];
  1281. ptq = queue->priv;
  1282. intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
  1283. queue_nr, pt->heap.heap_array[0].ordinal,
  1284. timestamp);
  1285. auxtrace_heap__pop(&pt->heap);
  1286. if (pt->heap.heap_cnt) {
  1287. ts = pt->heap.heap_array[0].ordinal + 1;
  1288. if (ts > timestamp)
  1289. ts = timestamp;
  1290. } else {
  1291. ts = timestamp;
  1292. }
  1293. intel_pt_set_pid_tid_cpu(pt, queue);
  1294. ret = intel_pt_run_decoder(ptq, &ts);
  1295. if (ret < 0) {
  1296. auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1297. return ret;
  1298. }
  1299. if (!ret) {
  1300. ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1301. if (ret < 0)
  1302. return ret;
  1303. } else {
  1304. ptq->on_heap = false;
  1305. }
  1306. }
  1307. return 0;
  1308. }
  1309. static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
  1310. u64 time_)
  1311. {
  1312. struct auxtrace_queues *queues = &pt->queues;
  1313. unsigned int i;
  1314. u64 ts = 0;
  1315. for (i = 0; i < queues->nr_queues; i++) {
  1316. struct auxtrace_queue *queue = &pt->queues.queue_array[i];
  1317. struct intel_pt_queue *ptq = queue->priv;
  1318. if (ptq && (tid == -1 || ptq->tid == tid)) {
  1319. ptq->time = time_;
  1320. intel_pt_set_pid_tid_cpu(pt, queue);
  1321. intel_pt_run_decoder(ptq, &ts);
  1322. }
  1323. }
  1324. return 0;
  1325. }
  1326. static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
  1327. {
  1328. return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
  1329. sample->pid, sample->tid, 0);
  1330. }
  1331. static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
  1332. {
  1333. unsigned i, j;
  1334. if (cpu < 0 || !pt->queues.nr_queues)
  1335. return NULL;
  1336. if ((unsigned)cpu >= pt->queues.nr_queues)
  1337. i = pt->queues.nr_queues - 1;
  1338. else
  1339. i = cpu;
  1340. if (pt->queues.queue_array[i].cpu == cpu)
  1341. return pt->queues.queue_array[i].priv;
  1342. for (j = 0; i > 0; j++) {
  1343. if (pt->queues.queue_array[--i].cpu == cpu)
  1344. return pt->queues.queue_array[i].priv;
  1345. }
  1346. for (; j < pt->queues.nr_queues; j++) {
  1347. if (pt->queues.queue_array[j].cpu == cpu)
  1348. return pt->queues.queue_array[j].priv;
  1349. }
  1350. return NULL;
  1351. }
  1352. static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
  1353. u64 timestamp)
  1354. {
  1355. struct intel_pt_queue *ptq;
  1356. int err;
  1357. if (!pt->sync_switch)
  1358. return 1;
  1359. ptq = intel_pt_cpu_to_ptq(pt, cpu);
  1360. if (!ptq || !ptq->sync_switch)
  1361. return 1;
  1362. switch (ptq->switch_state) {
  1363. case INTEL_PT_SS_NOT_TRACING:
  1364. ptq->next_tid = -1;
  1365. break;
  1366. case INTEL_PT_SS_UNKNOWN:
  1367. case INTEL_PT_SS_TRACING:
  1368. ptq->next_tid = tid;
  1369. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
  1370. return 0;
  1371. case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
  1372. if (!ptq->on_heap) {
  1373. ptq->timestamp = perf_time_to_tsc(timestamp,
  1374. &pt->tc);
  1375. err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
  1376. ptq->timestamp);
  1377. if (err)
  1378. return err;
  1379. ptq->on_heap = true;
  1380. }
  1381. ptq->switch_state = INTEL_PT_SS_TRACING;
  1382. break;
  1383. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1384. ptq->next_tid = tid;
  1385. intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
  1386. break;
  1387. default:
  1388. break;
  1389. }
  1390. return 1;
  1391. }
  1392. static int intel_pt_process_switch(struct intel_pt *pt,
  1393. struct perf_sample *sample)
  1394. {
  1395. struct perf_evsel *evsel;
  1396. pid_t tid;
  1397. int cpu, ret;
  1398. evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
  1399. if (evsel != pt->switch_evsel)
  1400. return 0;
  1401. tid = perf_evsel__intval(evsel, sample, "next_pid");
  1402. cpu = sample->cpu;
  1403. intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1404. cpu, tid, sample->time, perf_time_to_tsc(sample->time,
  1405. &pt->tc));
  1406. ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
  1407. if (ret <= 0)
  1408. return ret;
  1409. return machine__set_current_tid(pt->machine, cpu, -1, tid);
  1410. }
  1411. static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
  1412. struct perf_sample *sample)
  1413. {
  1414. bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
  1415. pid_t pid, tid;
  1416. int cpu, ret;
  1417. cpu = sample->cpu;
  1418. if (pt->have_sched_switch == 3) {
  1419. if (!out)
  1420. return 0;
  1421. if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
  1422. pr_err("Expecting CPU-wide context switch event\n");
  1423. return -EINVAL;
  1424. }
  1425. pid = event->context_switch.next_prev_pid;
  1426. tid = event->context_switch.next_prev_tid;
  1427. } else {
  1428. if (out)
  1429. return 0;
  1430. pid = sample->pid;
  1431. tid = sample->tid;
  1432. }
  1433. if (tid == -1) {
  1434. pr_err("context_switch event has no tid\n");
  1435. return -EINVAL;
  1436. }
  1437. intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1438. cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
  1439. &pt->tc));
  1440. ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
  1441. if (ret <= 0)
  1442. return ret;
  1443. return machine__set_current_tid(pt->machine, cpu, pid, tid);
  1444. }
  1445. static int intel_pt_process_itrace_start(struct intel_pt *pt,
  1446. union perf_event *event,
  1447. struct perf_sample *sample)
  1448. {
  1449. if (!pt->per_cpu_mmaps)
  1450. return 0;
  1451. intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1452. sample->cpu, event->itrace_start.pid,
  1453. event->itrace_start.tid, sample->time,
  1454. perf_time_to_tsc(sample->time, &pt->tc));
  1455. return machine__set_current_tid(pt->machine, sample->cpu,
  1456. event->itrace_start.pid,
  1457. event->itrace_start.tid);
  1458. }
  1459. static int intel_pt_process_event(struct perf_session *session,
  1460. union perf_event *event,
  1461. struct perf_sample *sample,
  1462. struct perf_tool *tool)
  1463. {
  1464. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1465. auxtrace);
  1466. u64 timestamp;
  1467. int err = 0;
  1468. if (dump_trace)
  1469. return 0;
  1470. if (!tool->ordered_events) {
  1471. pr_err("Intel Processor Trace requires ordered events\n");
  1472. return -EINVAL;
  1473. }
  1474. if (sample->time && sample->time != (u64)-1)
  1475. timestamp = perf_time_to_tsc(sample->time, &pt->tc);
  1476. else
  1477. timestamp = 0;
  1478. if (timestamp || pt->timeless_decoding) {
  1479. err = intel_pt_update_queues(pt);
  1480. if (err)
  1481. return err;
  1482. }
  1483. if (pt->timeless_decoding) {
  1484. if (event->header.type == PERF_RECORD_EXIT) {
  1485. err = intel_pt_process_timeless_queues(pt,
  1486. event->fork.tid,
  1487. sample->time);
  1488. }
  1489. } else if (timestamp) {
  1490. err = intel_pt_process_queues(pt, timestamp);
  1491. }
  1492. if (err)
  1493. return err;
  1494. if (event->header.type == PERF_RECORD_AUX &&
  1495. (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
  1496. pt->synth_opts.errors) {
  1497. err = intel_pt_lost(pt, sample);
  1498. if (err)
  1499. return err;
  1500. }
  1501. if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
  1502. err = intel_pt_process_switch(pt, sample);
  1503. else if (event->header.type == PERF_RECORD_ITRACE_START)
  1504. err = intel_pt_process_itrace_start(pt, event, sample);
  1505. else if (event->header.type == PERF_RECORD_SWITCH ||
  1506. event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
  1507. err = intel_pt_context_switch(pt, event, sample);
  1508. intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
  1509. perf_event__name(event->header.type), event->header.type,
  1510. sample->cpu, sample->time, timestamp);
  1511. return err;
  1512. }
  1513. static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
  1514. {
  1515. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1516. auxtrace);
  1517. int ret;
  1518. if (dump_trace)
  1519. return 0;
  1520. if (!tool->ordered_events)
  1521. return -EINVAL;
  1522. ret = intel_pt_update_queues(pt);
  1523. if (ret < 0)
  1524. return ret;
  1525. if (pt->timeless_decoding)
  1526. return intel_pt_process_timeless_queues(pt, -1,
  1527. MAX_TIMESTAMP - 1);
  1528. return intel_pt_process_queues(pt, MAX_TIMESTAMP);
  1529. }
  1530. static void intel_pt_free_events(struct perf_session *session)
  1531. {
  1532. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1533. auxtrace);
  1534. struct auxtrace_queues *queues = &pt->queues;
  1535. unsigned int i;
  1536. for (i = 0; i < queues->nr_queues; i++) {
  1537. intel_pt_free_queue(queues->queue_array[i].priv);
  1538. queues->queue_array[i].priv = NULL;
  1539. }
  1540. intel_pt_log_disable();
  1541. auxtrace_queues__free(queues);
  1542. }
  1543. static void intel_pt_free(struct perf_session *session)
  1544. {
  1545. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1546. auxtrace);
  1547. auxtrace_heap__free(&pt->heap);
  1548. intel_pt_free_events(session);
  1549. session->auxtrace = NULL;
  1550. thread__put(pt->unknown_thread);
  1551. addr_filters__exit(&pt->filts);
  1552. zfree(&pt->filter);
  1553. free(pt);
  1554. }
  1555. static int intel_pt_process_auxtrace_event(struct perf_session *session,
  1556. union perf_event *event,
  1557. struct perf_tool *tool __maybe_unused)
  1558. {
  1559. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1560. auxtrace);
  1561. if (pt->sampling_mode)
  1562. return 0;
  1563. if (!pt->data_queued) {
  1564. struct auxtrace_buffer *buffer;
  1565. off_t data_offset;
  1566. int fd = perf_data_file__fd(session->file);
  1567. int err;
  1568. if (perf_data_file__is_pipe(session->file)) {
  1569. data_offset = 0;
  1570. } else {
  1571. data_offset = lseek(fd, 0, SEEK_CUR);
  1572. if (data_offset == -1)
  1573. return -errno;
  1574. }
  1575. err = auxtrace_queues__add_event(&pt->queues, session, event,
  1576. data_offset, &buffer);
  1577. if (err)
  1578. return err;
  1579. /* Dump here now we have copied a piped trace out of the pipe */
  1580. if (dump_trace) {
  1581. if (auxtrace_buffer__get_data(buffer, fd)) {
  1582. intel_pt_dump_event(pt, buffer->data,
  1583. buffer->size);
  1584. auxtrace_buffer__put_data(buffer);
  1585. }
  1586. }
  1587. }
  1588. return 0;
  1589. }
  1590. struct intel_pt_synth {
  1591. struct perf_tool dummy_tool;
  1592. struct perf_session *session;
  1593. };
  1594. static int intel_pt_event_synth(struct perf_tool *tool,
  1595. union perf_event *event,
  1596. struct perf_sample *sample __maybe_unused,
  1597. struct machine *machine __maybe_unused)
  1598. {
  1599. struct intel_pt_synth *intel_pt_synth =
  1600. container_of(tool, struct intel_pt_synth, dummy_tool);
  1601. return perf_session__deliver_synth_event(intel_pt_synth->session, event,
  1602. NULL);
  1603. }
  1604. static int intel_pt_synth_event(struct perf_session *session,
  1605. struct perf_event_attr *attr, u64 id)
  1606. {
  1607. struct intel_pt_synth intel_pt_synth;
  1608. memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
  1609. intel_pt_synth.session = session;
  1610. return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
  1611. &id, intel_pt_event_synth);
  1612. }
  1613. static int intel_pt_synth_events(struct intel_pt *pt,
  1614. struct perf_session *session)
  1615. {
  1616. struct perf_evlist *evlist = session->evlist;
  1617. struct perf_evsel *evsel;
  1618. struct perf_event_attr attr;
  1619. bool found = false;
  1620. u64 id;
  1621. int err;
  1622. evlist__for_each_entry(evlist, evsel) {
  1623. if (evsel->attr.type == pt->pmu_type && evsel->ids) {
  1624. found = true;
  1625. break;
  1626. }
  1627. }
  1628. if (!found) {
  1629. pr_debug("There are no selected events with Intel Processor Trace data\n");
  1630. return 0;
  1631. }
  1632. memset(&attr, 0, sizeof(struct perf_event_attr));
  1633. attr.size = sizeof(struct perf_event_attr);
  1634. attr.type = PERF_TYPE_HARDWARE;
  1635. attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
  1636. attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
  1637. PERF_SAMPLE_PERIOD;
  1638. if (pt->timeless_decoding)
  1639. attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
  1640. else
  1641. attr.sample_type |= PERF_SAMPLE_TIME;
  1642. if (!pt->per_cpu_mmaps)
  1643. attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
  1644. attr.exclude_user = evsel->attr.exclude_user;
  1645. attr.exclude_kernel = evsel->attr.exclude_kernel;
  1646. attr.exclude_hv = evsel->attr.exclude_hv;
  1647. attr.exclude_host = evsel->attr.exclude_host;
  1648. attr.exclude_guest = evsel->attr.exclude_guest;
  1649. attr.sample_id_all = evsel->attr.sample_id_all;
  1650. attr.read_format = evsel->attr.read_format;
  1651. id = evsel->id[0] + 1000000000;
  1652. if (!id)
  1653. id = 1;
  1654. if (pt->synth_opts.instructions) {
  1655. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1656. if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
  1657. attr.sample_period =
  1658. intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
  1659. else
  1660. attr.sample_period = pt->synth_opts.period;
  1661. pt->instructions_sample_period = attr.sample_period;
  1662. if (pt->synth_opts.callchain)
  1663. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1664. if (pt->synth_opts.last_branch)
  1665. attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
  1666. pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1667. id, (u64)attr.sample_type);
  1668. err = intel_pt_synth_event(session, &attr, id);
  1669. if (err) {
  1670. pr_err("%s: failed to synthesize 'instructions' event type\n",
  1671. __func__);
  1672. return err;
  1673. }
  1674. pt->sample_instructions = true;
  1675. pt->instructions_sample_type = attr.sample_type;
  1676. pt->instructions_id = id;
  1677. id += 1;
  1678. }
  1679. if (pt->synth_opts.transactions) {
  1680. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1681. attr.sample_period = 1;
  1682. if (pt->synth_opts.callchain)
  1683. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1684. if (pt->synth_opts.last_branch)
  1685. attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
  1686. pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1687. id, (u64)attr.sample_type);
  1688. err = intel_pt_synth_event(session, &attr, id);
  1689. if (err) {
  1690. pr_err("%s: failed to synthesize 'transactions' event type\n",
  1691. __func__);
  1692. return err;
  1693. }
  1694. pt->sample_transactions = true;
  1695. pt->transactions_id = id;
  1696. id += 1;
  1697. evlist__for_each_entry(evlist, evsel) {
  1698. if (evsel->id && evsel->id[0] == pt->transactions_id) {
  1699. if (evsel->name)
  1700. zfree(&evsel->name);
  1701. evsel->name = strdup("transactions");
  1702. break;
  1703. }
  1704. }
  1705. }
  1706. if (pt->synth_opts.branches) {
  1707. attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
  1708. attr.sample_period = 1;
  1709. attr.sample_type |= PERF_SAMPLE_ADDR;
  1710. attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
  1711. attr.sample_type &= ~(u64)PERF_SAMPLE_BRANCH_STACK;
  1712. pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1713. id, (u64)attr.sample_type);
  1714. err = intel_pt_synth_event(session, &attr, id);
  1715. if (err) {
  1716. pr_err("%s: failed to synthesize 'branches' event type\n",
  1717. __func__);
  1718. return err;
  1719. }
  1720. pt->sample_branches = true;
  1721. pt->branches_sample_type = attr.sample_type;
  1722. pt->branches_id = id;
  1723. }
  1724. pt->synth_needs_swap = evsel->needs_swap;
  1725. return 0;
  1726. }
  1727. static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
  1728. {
  1729. struct perf_evsel *evsel;
  1730. evlist__for_each_entry_reverse(evlist, evsel) {
  1731. const char *name = perf_evsel__name(evsel);
  1732. if (!strcmp(name, "sched:sched_switch"))
  1733. return evsel;
  1734. }
  1735. return NULL;
  1736. }
  1737. static bool intel_pt_find_switch(struct perf_evlist *evlist)
  1738. {
  1739. struct perf_evsel *evsel;
  1740. evlist__for_each_entry(evlist, evsel) {
  1741. if (evsel->attr.context_switch)
  1742. return true;
  1743. }
  1744. return false;
  1745. }
  1746. static int intel_pt_perf_config(const char *var, const char *value, void *data)
  1747. {
  1748. struct intel_pt *pt = data;
  1749. if (!strcmp(var, "intel-pt.mispred-all"))
  1750. pt->mispred_all = perf_config_bool(var, value);
  1751. return 0;
  1752. }
  1753. static const char * const intel_pt_info_fmts[] = {
  1754. [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
  1755. [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
  1756. [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
  1757. [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
  1758. [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
  1759. [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
  1760. [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
  1761. [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
  1762. [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
  1763. [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
  1764. [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
  1765. [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
  1766. [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
  1767. [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
  1768. [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
  1769. [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
  1770. };
  1771. static void intel_pt_print_info(u64 *arr, int start, int finish)
  1772. {
  1773. int i;
  1774. if (!dump_trace)
  1775. return;
  1776. for (i = start; i <= finish; i++)
  1777. fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
  1778. }
  1779. static void intel_pt_print_info_str(const char *name, const char *str)
  1780. {
  1781. if (!dump_trace)
  1782. return;
  1783. fprintf(stdout, " %-20s%s\n", name, str ? str : "");
  1784. }
  1785. static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
  1786. {
  1787. return auxtrace_info->header.size >=
  1788. sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
  1789. }
  1790. int intel_pt_process_auxtrace_info(union perf_event *event,
  1791. struct perf_session *session)
  1792. {
  1793. struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
  1794. size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
  1795. struct intel_pt *pt;
  1796. void *info_end;
  1797. u64 *info;
  1798. int err;
  1799. if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
  1800. min_sz)
  1801. return -EINVAL;
  1802. pt = zalloc(sizeof(struct intel_pt));
  1803. if (!pt)
  1804. return -ENOMEM;
  1805. addr_filters__init(&pt->filts);
  1806. perf_config(intel_pt_perf_config, pt);
  1807. err = auxtrace_queues__init(&pt->queues);
  1808. if (err)
  1809. goto err_free;
  1810. intel_pt_log_set_name(INTEL_PT_PMU_NAME);
  1811. pt->session = session;
  1812. pt->machine = &session->machines.host; /* No kvm support */
  1813. pt->auxtrace_type = auxtrace_info->type;
  1814. pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
  1815. pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
  1816. pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
  1817. pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
  1818. pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
  1819. pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
  1820. pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
  1821. pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
  1822. pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
  1823. pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
  1824. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
  1825. INTEL_PT_PER_CPU_MMAPS);
  1826. if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
  1827. pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
  1828. pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
  1829. pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
  1830. pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
  1831. pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
  1832. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
  1833. INTEL_PT_CYC_BIT);
  1834. }
  1835. if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
  1836. pt->max_non_turbo_ratio =
  1837. auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
  1838. intel_pt_print_info(&auxtrace_info->priv[0],
  1839. INTEL_PT_MAX_NONTURBO_RATIO,
  1840. INTEL_PT_MAX_NONTURBO_RATIO);
  1841. }
  1842. info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
  1843. info_end = (void *)info + auxtrace_info->header.size;
  1844. if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
  1845. size_t len;
  1846. len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
  1847. intel_pt_print_info(&auxtrace_info->priv[0],
  1848. INTEL_PT_FILTER_STR_LEN,
  1849. INTEL_PT_FILTER_STR_LEN);
  1850. if (len) {
  1851. const char *filter = (const char *)info;
  1852. len = roundup(len + 1, 8);
  1853. info += len >> 3;
  1854. if ((void *)info > info_end) {
  1855. pr_err("%s: bad filter string length\n", __func__);
  1856. err = -EINVAL;
  1857. goto err_free_queues;
  1858. }
  1859. pt->filter = memdup(filter, len);
  1860. if (!pt->filter) {
  1861. err = -ENOMEM;
  1862. goto err_free_queues;
  1863. }
  1864. if (session->header.needs_swap)
  1865. mem_bswap_64(pt->filter, len);
  1866. if (pt->filter[len - 1]) {
  1867. pr_err("%s: filter string not null terminated\n", __func__);
  1868. err = -EINVAL;
  1869. goto err_free_queues;
  1870. }
  1871. err = addr_filters__parse_bare_filter(&pt->filts,
  1872. filter);
  1873. if (err)
  1874. goto err_free_queues;
  1875. }
  1876. intel_pt_print_info_str("Filter string", pt->filter);
  1877. }
  1878. pt->timeless_decoding = intel_pt_timeless_decoding(pt);
  1879. pt->have_tsc = intel_pt_have_tsc(pt);
  1880. pt->sampling_mode = false;
  1881. pt->est_tsc = !pt->timeless_decoding;
  1882. pt->unknown_thread = thread__new(999999999, 999999999);
  1883. if (!pt->unknown_thread) {
  1884. err = -ENOMEM;
  1885. goto err_free_queues;
  1886. }
  1887. /*
  1888. * Since this thread will not be kept in any rbtree not in a
  1889. * list, initialize its list node so that at thread__put() the
  1890. * current thread lifetime assuption is kept and we don't segfault
  1891. * at list_del_init().
  1892. */
  1893. INIT_LIST_HEAD(&pt->unknown_thread->node);
  1894. err = thread__set_comm(pt->unknown_thread, "unknown", 0);
  1895. if (err)
  1896. goto err_delete_thread;
  1897. if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
  1898. err = -ENOMEM;
  1899. goto err_delete_thread;
  1900. }
  1901. pt->auxtrace.process_event = intel_pt_process_event;
  1902. pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
  1903. pt->auxtrace.flush_events = intel_pt_flush;
  1904. pt->auxtrace.free_events = intel_pt_free_events;
  1905. pt->auxtrace.free = intel_pt_free;
  1906. session->auxtrace = &pt->auxtrace;
  1907. if (dump_trace)
  1908. return 0;
  1909. if (pt->have_sched_switch == 1) {
  1910. pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
  1911. if (!pt->switch_evsel) {
  1912. pr_err("%s: missing sched_switch event\n", __func__);
  1913. err = -EINVAL;
  1914. goto err_delete_thread;
  1915. }
  1916. } else if (pt->have_sched_switch == 2 &&
  1917. !intel_pt_find_switch(session->evlist)) {
  1918. pr_err("%s: missing context_switch attribute flag\n", __func__);
  1919. err = -EINVAL;
  1920. goto err_delete_thread;
  1921. }
  1922. if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
  1923. pt->synth_opts = *session->itrace_synth_opts;
  1924. } else {
  1925. itrace_synth_opts__set_default(&pt->synth_opts);
  1926. if (use_browser != -1) {
  1927. pt->synth_opts.branches = false;
  1928. pt->synth_opts.callchain = true;
  1929. }
  1930. if (session->itrace_synth_opts)
  1931. pt->synth_opts.thread_stack =
  1932. session->itrace_synth_opts->thread_stack;
  1933. }
  1934. if (pt->synth_opts.log)
  1935. intel_pt_log_enable();
  1936. /* Maximum non-turbo ratio is TSC freq / 100 MHz */
  1937. if (pt->tc.time_mult) {
  1938. u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
  1939. if (!pt->max_non_turbo_ratio)
  1940. pt->max_non_turbo_ratio =
  1941. (tsc_freq + 50000000) / 100000000;
  1942. intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
  1943. intel_pt_log("Maximum non-turbo ratio %u\n",
  1944. pt->max_non_turbo_ratio);
  1945. }
  1946. if (pt->synth_opts.calls)
  1947. pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
  1948. PERF_IP_FLAG_TRACE_END;
  1949. if (pt->synth_opts.returns)
  1950. pt->branches_filter |= PERF_IP_FLAG_RETURN |
  1951. PERF_IP_FLAG_TRACE_BEGIN;
  1952. if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
  1953. symbol_conf.use_callchain = true;
  1954. if (callchain_register_param(&callchain_param) < 0) {
  1955. symbol_conf.use_callchain = false;
  1956. pt->synth_opts.callchain = false;
  1957. }
  1958. }
  1959. err = intel_pt_synth_events(pt, session);
  1960. if (err)
  1961. goto err_delete_thread;
  1962. err = auxtrace_queues__process_index(&pt->queues, session);
  1963. if (err)
  1964. goto err_delete_thread;
  1965. if (pt->queues.populated)
  1966. pt->data_queued = true;
  1967. if (pt->timeless_decoding)
  1968. pr_debug2("Intel PT decoding without timestamps\n");
  1969. return 0;
  1970. err_delete_thread:
  1971. thread__zput(pt->unknown_thread);
  1972. err_free_queues:
  1973. intel_pt_log_disable();
  1974. auxtrace_queues__free(&pt->queues);
  1975. session->auxtrace = NULL;
  1976. err_free:
  1977. addr_filters__exit(&pt->filts);
  1978. zfree(&pt->filter);
  1979. free(pt);
  1980. return err;
  1981. }