jsm_tty.c 20 KB

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  1. /************************************************************************
  2. * Copyright 2003 Digi International (www.digi.com)
  3. *
  4. * Copyright (C) 2004 IBM Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
  13. * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  14. * PURPOSE. See the GNU General Public License for more details.
  15. *
  16. * Contact Information:
  17. * Scott H Kilau <Scott_Kilau@digi.com>
  18. * Ananda Venkatarman <mansarov@us.ibm.com>
  19. * Modifications:
  20. * 01/19/06: changed jsm_input routine to use the dynamically allocated
  21. * tty_buffer changes. Contributors: Scott Kilau and Ananda V.
  22. ***********************************************************************/
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/serial_reg.h>
  26. #include <linux/delay.h> /* For udelay */
  27. #include <linux/pci.h>
  28. #include <linux/slab.h>
  29. #include "jsm.h"
  30. static DECLARE_BITMAP(linemap, MAXLINES);
  31. static void jsm_carrier(struct jsm_channel *ch);
  32. static inline int jsm_get_mstat(struct jsm_channel *ch)
  33. {
  34. unsigned char mstat;
  35. unsigned result;
  36. jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n");
  37. mstat = (ch->ch_mostat | ch->ch_mistat);
  38. result = 0;
  39. if (mstat & UART_MCR_DTR)
  40. result |= TIOCM_DTR;
  41. if (mstat & UART_MCR_RTS)
  42. result |= TIOCM_RTS;
  43. if (mstat & UART_MSR_CTS)
  44. result |= TIOCM_CTS;
  45. if (mstat & UART_MSR_DSR)
  46. result |= TIOCM_DSR;
  47. if (mstat & UART_MSR_RI)
  48. result |= TIOCM_RI;
  49. if (mstat & UART_MSR_DCD)
  50. result |= TIOCM_CD;
  51. jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
  52. return result;
  53. }
  54. static unsigned int jsm_tty_tx_empty(struct uart_port *port)
  55. {
  56. return TIOCSER_TEMT;
  57. }
  58. /*
  59. * Return modem signals to ld.
  60. */
  61. static unsigned int jsm_tty_get_mctrl(struct uart_port *port)
  62. {
  63. int result;
  64. struct jsm_channel *channel =
  65. container_of(port, struct jsm_channel, uart_port);
  66. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  67. result = jsm_get_mstat(channel);
  68. if (result < 0)
  69. return -ENXIO;
  70. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  71. return result;
  72. }
  73. /*
  74. * jsm_set_modem_info()
  75. *
  76. * Set modem signals, called by ld.
  77. */
  78. static void jsm_tty_set_mctrl(struct uart_port *port, unsigned int mctrl)
  79. {
  80. struct jsm_channel *channel =
  81. container_of(port, struct jsm_channel, uart_port);
  82. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  83. if (mctrl & TIOCM_RTS)
  84. channel->ch_mostat |= UART_MCR_RTS;
  85. else
  86. channel->ch_mostat &= ~UART_MCR_RTS;
  87. if (mctrl & TIOCM_DTR)
  88. channel->ch_mostat |= UART_MCR_DTR;
  89. else
  90. channel->ch_mostat &= ~UART_MCR_DTR;
  91. channel->ch_bd->bd_ops->assert_modem_signals(channel);
  92. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  93. udelay(10);
  94. }
  95. /*
  96. * jsm_tty_write()
  97. *
  98. * Take data from the user or kernel and send it out to the FEP.
  99. * In here exists all the Transparent Print magic as well.
  100. */
  101. static void jsm_tty_write(struct uart_port *port)
  102. {
  103. struct jsm_channel *channel;
  104. channel = container_of(port, struct jsm_channel, uart_port);
  105. channel->ch_bd->bd_ops->copy_data_from_queue_to_uart(channel);
  106. }
  107. static void jsm_tty_start_tx(struct uart_port *port)
  108. {
  109. struct jsm_channel *channel =
  110. container_of(port, struct jsm_channel, uart_port);
  111. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  112. channel->ch_flags &= ~(CH_STOP);
  113. jsm_tty_write(port);
  114. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  115. }
  116. static void jsm_tty_stop_tx(struct uart_port *port)
  117. {
  118. struct jsm_channel *channel =
  119. container_of(port, struct jsm_channel, uart_port);
  120. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n");
  121. channel->ch_flags |= (CH_STOP);
  122. jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n");
  123. }
  124. static void jsm_tty_send_xchar(struct uart_port *port, char ch)
  125. {
  126. unsigned long lock_flags;
  127. struct jsm_channel *channel =
  128. container_of(port, struct jsm_channel, uart_port);
  129. struct ktermios *termios;
  130. spin_lock_irqsave(&port->lock, lock_flags);
  131. termios = &port->state->port.tty->termios;
  132. if (ch == termios->c_cc[VSTART])
  133. channel->ch_bd->bd_ops->send_start_character(channel);
  134. if (ch == termios->c_cc[VSTOP])
  135. channel->ch_bd->bd_ops->send_stop_character(channel);
  136. spin_unlock_irqrestore(&port->lock, lock_flags);
  137. }
  138. static void jsm_tty_stop_rx(struct uart_port *port)
  139. {
  140. struct jsm_channel *channel =
  141. container_of(port, struct jsm_channel, uart_port);
  142. channel->ch_bd->bd_ops->disable_receiver(channel);
  143. }
  144. static void jsm_tty_break(struct uart_port *port, int break_state)
  145. {
  146. unsigned long lock_flags;
  147. struct jsm_channel *channel =
  148. container_of(port, struct jsm_channel, uart_port);
  149. spin_lock_irqsave(&port->lock, lock_flags);
  150. if (break_state == -1)
  151. channel->ch_bd->bd_ops->send_break(channel);
  152. else
  153. channel->ch_bd->bd_ops->clear_break(channel);
  154. spin_unlock_irqrestore(&port->lock, lock_flags);
  155. }
  156. static int jsm_tty_open(struct uart_port *port)
  157. {
  158. struct jsm_board *brd;
  159. struct jsm_channel *channel =
  160. container_of(port, struct jsm_channel, uart_port);
  161. struct ktermios *termios;
  162. /* Get board pointer from our array of majors we have allocated */
  163. brd = channel->ch_bd;
  164. /*
  165. * Allocate channel buffers for read/write/error.
  166. * Set flag, so we don't get trounced on.
  167. */
  168. channel->ch_flags |= (CH_OPENING);
  169. /* Drop locks, as malloc with GFP_KERNEL can sleep */
  170. if (!channel->ch_rqueue) {
  171. channel->ch_rqueue = kzalloc(RQUEUESIZE, GFP_KERNEL);
  172. if (!channel->ch_rqueue) {
  173. jsm_dbg(INIT, &channel->ch_bd->pci_dev,
  174. "unable to allocate read queue buf\n");
  175. return -ENOMEM;
  176. }
  177. }
  178. if (!channel->ch_equeue) {
  179. channel->ch_equeue = kzalloc(EQUEUESIZE, GFP_KERNEL);
  180. if (!channel->ch_equeue) {
  181. jsm_dbg(INIT, &channel->ch_bd->pci_dev,
  182. "unable to allocate error queue buf\n");
  183. return -ENOMEM;
  184. }
  185. }
  186. channel->ch_flags &= ~(CH_OPENING);
  187. /*
  188. * Initialize if neither terminal is open.
  189. */
  190. jsm_dbg(OPEN, &channel->ch_bd->pci_dev,
  191. "jsm_open: initializing channel in open...\n");
  192. /*
  193. * Flush input queues.
  194. */
  195. channel->ch_r_head = channel->ch_r_tail = 0;
  196. channel->ch_e_head = channel->ch_e_tail = 0;
  197. brd->bd_ops->flush_uart_write(channel);
  198. brd->bd_ops->flush_uart_read(channel);
  199. channel->ch_flags = 0;
  200. channel->ch_cached_lsr = 0;
  201. channel->ch_stops_sent = 0;
  202. termios = &port->state->port.tty->termios;
  203. channel->ch_c_cflag = termios->c_cflag;
  204. channel->ch_c_iflag = termios->c_iflag;
  205. channel->ch_c_oflag = termios->c_oflag;
  206. channel->ch_c_lflag = termios->c_lflag;
  207. channel->ch_startc = termios->c_cc[VSTART];
  208. channel->ch_stopc = termios->c_cc[VSTOP];
  209. /* Tell UART to init itself */
  210. brd->bd_ops->uart_init(channel);
  211. /*
  212. * Run param in case we changed anything
  213. */
  214. brd->bd_ops->param(channel);
  215. jsm_carrier(channel);
  216. channel->ch_open_count++;
  217. jsm_dbg(OPEN, &channel->ch_bd->pci_dev, "finish\n");
  218. return 0;
  219. }
  220. static void jsm_tty_close(struct uart_port *port)
  221. {
  222. struct jsm_board *bd;
  223. struct ktermios *ts;
  224. struct jsm_channel *channel =
  225. container_of(port, struct jsm_channel, uart_port);
  226. jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "start\n");
  227. bd = channel->ch_bd;
  228. ts = &port->state->port.tty->termios;
  229. channel->ch_flags &= ~(CH_STOPI);
  230. channel->ch_open_count--;
  231. /*
  232. * If we have HUPCL set, lower DTR and RTS
  233. */
  234. if (channel->ch_c_cflag & HUPCL) {
  235. jsm_dbg(CLOSE, &channel->ch_bd->pci_dev,
  236. "Close. HUPCL set, dropping DTR/RTS\n");
  237. /* Drop RTS/DTR */
  238. channel->ch_mostat &= ~(UART_MCR_DTR | UART_MCR_RTS);
  239. bd->bd_ops->assert_modem_signals(channel);
  240. }
  241. /* Turn off UART interrupts for this port */
  242. channel->ch_bd->bd_ops->uart_off(channel);
  243. jsm_dbg(CLOSE, &channel->ch_bd->pci_dev, "finish\n");
  244. }
  245. static void jsm_tty_set_termios(struct uart_port *port,
  246. struct ktermios *termios,
  247. struct ktermios *old_termios)
  248. {
  249. unsigned long lock_flags;
  250. struct jsm_channel *channel =
  251. container_of(port, struct jsm_channel, uart_port);
  252. spin_lock_irqsave(&port->lock, lock_flags);
  253. channel->ch_c_cflag = termios->c_cflag;
  254. channel->ch_c_iflag = termios->c_iflag;
  255. channel->ch_c_oflag = termios->c_oflag;
  256. channel->ch_c_lflag = termios->c_lflag;
  257. channel->ch_startc = termios->c_cc[VSTART];
  258. channel->ch_stopc = termios->c_cc[VSTOP];
  259. channel->ch_bd->bd_ops->param(channel);
  260. jsm_carrier(channel);
  261. spin_unlock_irqrestore(&port->lock, lock_flags);
  262. }
  263. static const char *jsm_tty_type(struct uart_port *port)
  264. {
  265. return "jsm";
  266. }
  267. static void jsm_tty_release_port(struct uart_port *port)
  268. {
  269. }
  270. static int jsm_tty_request_port(struct uart_port *port)
  271. {
  272. return 0;
  273. }
  274. static void jsm_config_port(struct uart_port *port, int flags)
  275. {
  276. port->type = PORT_JSM;
  277. }
  278. static const struct uart_ops jsm_ops = {
  279. .tx_empty = jsm_tty_tx_empty,
  280. .set_mctrl = jsm_tty_set_mctrl,
  281. .get_mctrl = jsm_tty_get_mctrl,
  282. .stop_tx = jsm_tty_stop_tx,
  283. .start_tx = jsm_tty_start_tx,
  284. .send_xchar = jsm_tty_send_xchar,
  285. .stop_rx = jsm_tty_stop_rx,
  286. .break_ctl = jsm_tty_break,
  287. .startup = jsm_tty_open,
  288. .shutdown = jsm_tty_close,
  289. .set_termios = jsm_tty_set_termios,
  290. .type = jsm_tty_type,
  291. .release_port = jsm_tty_release_port,
  292. .request_port = jsm_tty_request_port,
  293. .config_port = jsm_config_port,
  294. };
  295. /*
  296. * jsm_tty_init()
  297. *
  298. * Init the tty subsystem. Called once per board after board has been
  299. * downloaded and init'ed.
  300. */
  301. int jsm_tty_init(struct jsm_board *brd)
  302. {
  303. int i;
  304. void __iomem *vaddr;
  305. struct jsm_channel *ch;
  306. if (!brd)
  307. return -ENXIO;
  308. jsm_dbg(INIT, &brd->pci_dev, "start\n");
  309. /*
  310. * Initialize board structure elements.
  311. */
  312. brd->nasync = brd->maxports;
  313. /*
  314. * Allocate channel memory that might not have been allocated
  315. * when the driver was first loaded.
  316. */
  317. for (i = 0; i < brd->nasync; i++) {
  318. if (!brd->channels[i]) {
  319. /*
  320. * Okay to malloc with GFP_KERNEL, we are not at
  321. * interrupt context, and there are no locks held.
  322. */
  323. brd->channels[i] = kzalloc(sizeof(struct jsm_channel), GFP_KERNEL);
  324. if (!brd->channels[i]) {
  325. jsm_dbg(CORE, &brd->pci_dev,
  326. "%s:%d Unable to allocate memory for channel struct\n",
  327. __FILE__, __LINE__);
  328. }
  329. }
  330. }
  331. ch = brd->channels[0];
  332. vaddr = brd->re_map_membase;
  333. /* Set up channel variables */
  334. for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
  335. if (!brd->channels[i])
  336. continue;
  337. spin_lock_init(&ch->ch_lock);
  338. if (brd->bd_uart_offset == 0x200)
  339. ch->ch_neo_uart = vaddr + (brd->bd_uart_offset * i);
  340. else
  341. ch->ch_cls_uart = vaddr + (brd->bd_uart_offset * i);
  342. ch->ch_bd = brd;
  343. ch->ch_portnum = i;
  344. /* .25 second delay */
  345. ch->ch_close_delay = 250;
  346. init_waitqueue_head(&ch->ch_flags_wait);
  347. }
  348. jsm_dbg(INIT, &brd->pci_dev, "finish\n");
  349. return 0;
  350. }
  351. int jsm_uart_port_init(struct jsm_board *brd)
  352. {
  353. int i, rc;
  354. unsigned int line;
  355. struct jsm_channel *ch;
  356. if (!brd)
  357. return -ENXIO;
  358. jsm_dbg(INIT, &brd->pci_dev, "start\n");
  359. /*
  360. * Initialize board structure elements.
  361. */
  362. brd->nasync = brd->maxports;
  363. /* Set up channel variables */
  364. for (i = 0; i < brd->nasync; i++, ch = brd->channels[i]) {
  365. if (!brd->channels[i])
  366. continue;
  367. brd->channels[i]->uart_port.irq = brd->irq;
  368. brd->channels[i]->uart_port.uartclk = 14745600;
  369. brd->channels[i]->uart_port.type = PORT_JSM;
  370. brd->channels[i]->uart_port.iotype = UPIO_MEM;
  371. brd->channels[i]->uart_port.membase = brd->re_map_membase;
  372. brd->channels[i]->uart_port.fifosize = 16;
  373. brd->channels[i]->uart_port.ops = &jsm_ops;
  374. line = find_first_zero_bit(linemap, MAXLINES);
  375. if (line >= MAXLINES) {
  376. printk(KERN_INFO "jsm: linemap is full, added device failed\n");
  377. continue;
  378. } else
  379. set_bit(line, linemap);
  380. brd->channels[i]->uart_port.line = line;
  381. rc = uart_add_one_port (&jsm_uart_driver, &brd->channels[i]->uart_port);
  382. if (rc){
  383. printk(KERN_INFO "jsm: Port %d failed. Aborting...\n", i);
  384. return rc;
  385. }
  386. else
  387. printk(KERN_INFO "jsm: Port %d added\n", i);
  388. }
  389. jsm_dbg(INIT, &brd->pci_dev, "finish\n");
  390. return 0;
  391. }
  392. int jsm_remove_uart_port(struct jsm_board *brd)
  393. {
  394. int i;
  395. struct jsm_channel *ch;
  396. if (!brd)
  397. return -ENXIO;
  398. jsm_dbg(INIT, &brd->pci_dev, "start\n");
  399. /*
  400. * Initialize board structure elements.
  401. */
  402. brd->nasync = brd->maxports;
  403. /* Set up channel variables */
  404. for (i = 0; i < brd->nasync; i++) {
  405. if (!brd->channels[i])
  406. continue;
  407. ch = brd->channels[i];
  408. clear_bit(ch->uart_port.line, linemap);
  409. uart_remove_one_port(&jsm_uart_driver, &brd->channels[i]->uart_port);
  410. }
  411. jsm_dbg(INIT, &brd->pci_dev, "finish\n");
  412. return 0;
  413. }
  414. void jsm_input(struct jsm_channel *ch)
  415. {
  416. struct jsm_board *bd;
  417. struct tty_struct *tp;
  418. struct tty_port *port;
  419. u32 rmask;
  420. u16 head;
  421. u16 tail;
  422. int data_len;
  423. unsigned long lock_flags;
  424. int len = 0;
  425. int s = 0;
  426. int i = 0;
  427. jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
  428. if (!ch)
  429. return;
  430. port = &ch->uart_port.state->port;
  431. tp = port->tty;
  432. bd = ch->ch_bd;
  433. if(!bd)
  434. return;
  435. spin_lock_irqsave(&ch->ch_lock, lock_flags);
  436. /*
  437. *Figure the number of characters in the buffer.
  438. *Exit immediately if none.
  439. */
  440. rmask = RQUEUEMASK;
  441. head = ch->ch_r_head & rmask;
  442. tail = ch->ch_r_tail & rmask;
  443. data_len = (head - tail) & rmask;
  444. if (data_len == 0) {
  445. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  446. return;
  447. }
  448. jsm_dbg(READ, &ch->ch_bd->pci_dev, "start\n");
  449. /*
  450. *If the device is not open, or CREAD is off, flush
  451. *input data and return immediately.
  452. */
  453. if (!tp || !C_CREAD(tp)) {
  454. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  455. "input. dropping %d bytes on port %d...\n",
  456. data_len, ch->ch_portnum);
  457. ch->ch_r_head = tail;
  458. /* Force queue flow control to be released, if needed */
  459. jsm_check_queue_flow_control(ch);
  460. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  461. return;
  462. }
  463. /*
  464. * If we are throttled, simply don't read any data.
  465. */
  466. if (ch->ch_flags & CH_STOPI) {
  467. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  468. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  469. "Port %d throttled, not reading any data. head: %x tail: %x\n",
  470. ch->ch_portnum, head, tail);
  471. return;
  472. }
  473. jsm_dbg(READ, &ch->ch_bd->pci_dev, "start 2\n");
  474. len = tty_buffer_request_room(port, data_len);
  475. /*
  476. * len now contains the most amount of data we can copy,
  477. * bounded either by the flip buffer size or the amount
  478. * of data the card actually has pending...
  479. */
  480. while (len) {
  481. s = ((head >= tail) ? head : RQUEUESIZE) - tail;
  482. s = min(s, len);
  483. if (s <= 0)
  484. break;
  485. /*
  486. * If conditions are such that ld needs to see all
  487. * UART errors, we will have to walk each character
  488. * and error byte and send them to the buffer one at
  489. * a time.
  490. */
  491. if (I_PARMRK(tp) || I_BRKINT(tp) || I_INPCK(tp)) {
  492. for (i = 0; i < s; i++) {
  493. /*
  494. * Give the Linux ld the flags in the
  495. * format it likes.
  496. */
  497. if (*(ch->ch_equeue +tail +i) & UART_LSR_BI)
  498. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_BREAK);
  499. else if (*(ch->ch_equeue +tail +i) & UART_LSR_PE)
  500. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_PARITY);
  501. else if (*(ch->ch_equeue +tail +i) & UART_LSR_FE)
  502. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_FRAME);
  503. else
  504. tty_insert_flip_char(port, *(ch->ch_rqueue +tail +i), TTY_NORMAL);
  505. }
  506. } else {
  507. tty_insert_flip_string(port, ch->ch_rqueue + tail, s);
  508. }
  509. tail += s;
  510. len -= s;
  511. /* Flip queue if needed */
  512. tail &= rmask;
  513. }
  514. ch->ch_r_tail = tail & rmask;
  515. ch->ch_e_tail = tail & rmask;
  516. jsm_check_queue_flow_control(ch);
  517. spin_unlock_irqrestore(&ch->ch_lock, lock_flags);
  518. /* Tell the tty layer its okay to "eat" the data now */
  519. tty_flip_buffer_push(port);
  520. jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n");
  521. }
  522. static void jsm_carrier(struct jsm_channel *ch)
  523. {
  524. struct jsm_board *bd;
  525. int virt_carrier = 0;
  526. int phys_carrier = 0;
  527. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "start\n");
  528. if (!ch)
  529. return;
  530. bd = ch->ch_bd;
  531. if (!bd)
  532. return;
  533. if (ch->ch_mistat & UART_MSR_DCD) {
  534. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "mistat: %x D_CD: %x\n",
  535. ch->ch_mistat, ch->ch_mistat & UART_MSR_DCD);
  536. phys_carrier = 1;
  537. }
  538. if (ch->ch_c_cflag & CLOCAL)
  539. virt_carrier = 1;
  540. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "DCD: physical: %d virt: %d\n",
  541. phys_carrier, virt_carrier);
  542. /*
  543. * Test for a VIRTUAL carrier transition to HIGH.
  544. */
  545. if (((ch->ch_flags & CH_FCAR) == 0) && (virt_carrier == 1)) {
  546. /*
  547. * When carrier rises, wake any threads waiting
  548. * for carrier in the open routine.
  549. */
  550. jsm_dbg(CARR, &ch->ch_bd->pci_dev, "carrier: virt DCD rose\n");
  551. if (waitqueue_active(&(ch->ch_flags_wait)))
  552. wake_up_interruptible(&ch->ch_flags_wait);
  553. }
  554. /*
  555. * Test for a PHYSICAL carrier transition to HIGH.
  556. */
  557. if (((ch->ch_flags & CH_CD) == 0) && (phys_carrier == 1)) {
  558. /*
  559. * When carrier rises, wake any threads waiting
  560. * for carrier in the open routine.
  561. */
  562. jsm_dbg(CARR, &ch->ch_bd->pci_dev,
  563. "carrier: physical DCD rose\n");
  564. if (waitqueue_active(&(ch->ch_flags_wait)))
  565. wake_up_interruptible(&ch->ch_flags_wait);
  566. }
  567. /*
  568. * Test for a PHYSICAL transition to low, so long as we aren't
  569. * currently ignoring physical transitions (which is what "virtual
  570. * carrier" indicates).
  571. *
  572. * The transition of the virtual carrier to low really doesn't
  573. * matter... it really only means "ignore carrier state", not
  574. * "make pretend that carrier is there".
  575. */
  576. if ((virt_carrier == 0) && ((ch->ch_flags & CH_CD) != 0)
  577. && (phys_carrier == 0)) {
  578. /*
  579. * When carrier drops:
  580. *
  581. * Drop carrier on all open units.
  582. *
  583. * Flush queues, waking up any task waiting in the
  584. * line discipline.
  585. *
  586. * Send a hangup to the control terminal.
  587. *
  588. * Enable all select calls.
  589. */
  590. if (waitqueue_active(&(ch->ch_flags_wait)))
  591. wake_up_interruptible(&ch->ch_flags_wait);
  592. }
  593. /*
  594. * Make sure that our cached values reflect the current reality.
  595. */
  596. if (virt_carrier == 1)
  597. ch->ch_flags |= CH_FCAR;
  598. else
  599. ch->ch_flags &= ~CH_FCAR;
  600. if (phys_carrier == 1)
  601. ch->ch_flags |= CH_CD;
  602. else
  603. ch->ch_flags &= ~CH_CD;
  604. }
  605. void jsm_check_queue_flow_control(struct jsm_channel *ch)
  606. {
  607. struct board_ops *bd_ops = ch->ch_bd->bd_ops;
  608. int qleft;
  609. /* Store how much space we have left in the queue */
  610. if ((qleft = ch->ch_r_tail - ch->ch_r_head - 1) < 0)
  611. qleft += RQUEUEMASK + 1;
  612. /*
  613. * Check to see if we should enforce flow control on our queue because
  614. * the ld (or user) isn't reading data out of our queue fast enuf.
  615. *
  616. * NOTE: This is done based on what the current flow control of the
  617. * port is set for.
  618. *
  619. * 1) HWFLOW (RTS) - Turn off the UART's Receive interrupt.
  620. * This will cause the UART's FIFO to back up, and force
  621. * the RTS signal to be dropped.
  622. * 2) SWFLOW (IXOFF) - Keep trying to send a stop character to
  623. * the other side, in hopes it will stop sending data to us.
  624. * 3) NONE - Nothing we can do. We will simply drop any extra data
  625. * that gets sent into us when the queue fills up.
  626. */
  627. if (qleft < 256) {
  628. /* HWFLOW */
  629. if (ch->ch_c_cflag & CRTSCTS) {
  630. if(!(ch->ch_flags & CH_RECEIVER_OFF)) {
  631. bd_ops->disable_receiver(ch);
  632. ch->ch_flags |= (CH_RECEIVER_OFF);
  633. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  634. "Internal queue hit hilevel mark (%d)! Turning off interrupts\n",
  635. qleft);
  636. }
  637. }
  638. /* SWFLOW */
  639. else if (ch->ch_c_iflag & IXOFF) {
  640. if (ch->ch_stops_sent <= MAX_STOPS_SENT) {
  641. bd_ops->send_stop_character(ch);
  642. ch->ch_stops_sent++;
  643. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  644. "Sending stop char! Times sent: %x\n",
  645. ch->ch_stops_sent);
  646. }
  647. }
  648. }
  649. /*
  650. * Check to see if we should unenforce flow control because
  651. * ld (or user) finally read enuf data out of our queue.
  652. *
  653. * NOTE: This is done based on what the current flow control of the
  654. * port is set for.
  655. *
  656. * 1) HWFLOW (RTS) - Turn back on the UART's Receive interrupt.
  657. * This will cause the UART's FIFO to raise RTS back up,
  658. * which will allow the other side to start sending data again.
  659. * 2) SWFLOW (IXOFF) - Send a start character to
  660. * the other side, so it will start sending data to us again.
  661. * 3) NONE - Do nothing. Since we didn't do anything to turn off the
  662. * other side, we don't need to do anything now.
  663. */
  664. if (qleft > (RQUEUESIZE / 2)) {
  665. /* HWFLOW */
  666. if (ch->ch_c_cflag & CRTSCTS) {
  667. if (ch->ch_flags & CH_RECEIVER_OFF) {
  668. bd_ops->enable_receiver(ch);
  669. ch->ch_flags &= ~(CH_RECEIVER_OFF);
  670. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  671. "Internal queue hit lowlevel mark (%d)! Turning on interrupts\n",
  672. qleft);
  673. }
  674. }
  675. /* SWFLOW */
  676. else if (ch->ch_c_iflag & IXOFF && ch->ch_stops_sent) {
  677. ch->ch_stops_sent = 0;
  678. bd_ops->send_start_character(ch);
  679. jsm_dbg(READ, &ch->ch_bd->pci_dev,
  680. "Sending start char!\n");
  681. }
  682. }
  683. }