arc_uart.c 17 KB

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  1. /*
  2. * ARC On-Chip(fpga) UART Driver
  3. *
  4. * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * vineetg: July 10th 2012
  11. * -Decoupled the driver from arch/arc
  12. * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
  13. * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
  14. *
  15. * Vineetg: Aug 21st 2010
  16. * -Is uart_tx_stopped() not done in tty write path as it has already been
  17. * taken care of, in serial core
  18. *
  19. * Vineetg: Aug 18th 2010
  20. * -New Serial Core based ARC UART driver
  21. * -Derived largely from blackfin driver albiet with some major tweaks
  22. *
  23. * TODO:
  24. * -check if sysreq works
  25. */
  26. #if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/serial.h>
  31. #include <linux/console.h>
  32. #include <linux/sysrq.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/tty.h>
  35. #include <linux/tty_flip.h>
  36. #include <linux/serial_core.h>
  37. #include <linux/io.h>
  38. #include <linux/of_irq.h>
  39. #include <linux/of_address.h>
  40. /*************************************
  41. * ARC UART Hardware Specs
  42. ************************************/
  43. #define ARC_UART_TX_FIFO_SIZE 1
  44. /*
  45. * UART Register set (this is not a Standards Compliant IP)
  46. * Also each reg is Word aligned, but only 8 bits wide
  47. */
  48. #define R_ID0 0
  49. #define R_ID1 4
  50. #define R_ID2 8
  51. #define R_ID3 12
  52. #define R_DATA 16
  53. #define R_STS 20
  54. #define R_BAUDL 24
  55. #define R_BAUDH 28
  56. /* Bits for UART Status Reg (R/W) */
  57. #define RXIENB 0x04 /* Receive Interrupt Enable */
  58. #define TXIENB 0x40 /* Transmit Interrupt Enable */
  59. #define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
  60. #define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */
  61. #define RXFULL 0x08 /* Receive FIFO full */
  62. #define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */
  63. #define RXFERR 0x01 /* Frame Error: Stop Bit not detected */
  64. #define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */
  65. /* Uart bit fiddling helpers: lowest level */
  66. #define RBASE(port, reg) (port->membase + reg)
  67. #define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
  68. #define UART_REG_GET(u, r) readb(RBASE(u, r))
  69. #define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
  70. #define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
  71. /* Uart bit fiddling helpers: API level */
  72. #define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
  73. #define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
  74. #define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
  75. #define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
  76. #define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
  77. #define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
  78. #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
  79. #define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
  80. #define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
  81. #define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
  82. #define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
  83. #define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
  84. #define ARC_SERIAL_DEV_NAME "ttyARC"
  85. struct arc_uart_port {
  86. struct uart_port port;
  87. unsigned long baud;
  88. };
  89. #define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)
  90. static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
  91. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  92. static struct console arc_console;
  93. #endif
  94. #define DRIVER_NAME "arc-uart"
  95. static struct uart_driver arc_uart_driver = {
  96. .owner = THIS_MODULE,
  97. .driver_name = DRIVER_NAME,
  98. .dev_name = ARC_SERIAL_DEV_NAME,
  99. .major = 0,
  100. .minor = 0,
  101. .nr = CONFIG_SERIAL_ARC_NR_PORTS,
  102. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  103. .cons = &arc_console,
  104. #endif
  105. };
  106. static void arc_serial_stop_rx(struct uart_port *port)
  107. {
  108. UART_RX_IRQ_DISABLE(port);
  109. }
  110. static void arc_serial_stop_tx(struct uart_port *port)
  111. {
  112. while (!(UART_GET_STATUS(port) & TXEMPTY))
  113. cpu_relax();
  114. UART_TX_IRQ_DISABLE(port);
  115. }
  116. /*
  117. * Return TIOCSER_TEMT when transmitter is not busy.
  118. */
  119. static unsigned int arc_serial_tx_empty(struct uart_port *port)
  120. {
  121. unsigned int stat;
  122. stat = UART_GET_STATUS(port);
  123. if (stat & TXEMPTY)
  124. return TIOCSER_TEMT;
  125. return 0;
  126. }
  127. /*
  128. * Driver internal routine, used by both tty(serial core) as well as tx-isr
  129. * -Called under spinlock in either cases
  130. * -also tty->stopped has already been checked
  131. * = by uart_start( ) before calling us
  132. * = tx_ist checks that too before calling
  133. */
  134. static void arc_serial_tx_chars(struct uart_port *port)
  135. {
  136. struct circ_buf *xmit = &port->state->xmit;
  137. int sent = 0;
  138. unsigned char ch;
  139. if (unlikely(port->x_char)) {
  140. UART_SET_DATA(port, port->x_char);
  141. port->icount.tx++;
  142. port->x_char = 0;
  143. sent = 1;
  144. } else if (!uart_circ_empty(xmit)) {
  145. ch = xmit->buf[xmit->tail];
  146. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  147. port->icount.tx++;
  148. while (!(UART_GET_STATUS(port) & TXEMPTY))
  149. cpu_relax();
  150. UART_SET_DATA(port, ch);
  151. sent = 1;
  152. }
  153. /*
  154. * If num chars in xmit buffer are too few, ask tty layer for more.
  155. * By Hard ISR to schedule processing in software interrupt part
  156. */
  157. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  158. uart_write_wakeup(port);
  159. if (sent)
  160. UART_TX_IRQ_ENABLE(port);
  161. }
  162. /*
  163. * port is locked and interrupts are disabled
  164. * uart_start( ) calls us under the port spinlock irqsave
  165. */
  166. static void arc_serial_start_tx(struct uart_port *port)
  167. {
  168. arc_serial_tx_chars(port);
  169. }
  170. static void arc_serial_rx_chars(struct uart_port *port, unsigned int status)
  171. {
  172. unsigned int ch, flg = 0;
  173. /*
  174. * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
  175. * is very subtle. Here's how ...
  176. * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
  177. * driver reads the DATA Reg and keeps doing that in a loop, until
  178. * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
  179. * before RX-EMPTY=0, implies some sort of buffering going on in the
  180. * controller, which is indeed the Rx-FIFO.
  181. */
  182. do {
  183. /*
  184. * This could be an Rx Intr for err (no data),
  185. * so check err and clear that Intr first
  186. */
  187. if (unlikely(status & (RXOERR | RXFERR))) {
  188. if (status & RXOERR) {
  189. port->icount.overrun++;
  190. flg = TTY_OVERRUN;
  191. UART_CLR_STATUS(port, RXOERR);
  192. }
  193. if (status & RXFERR) {
  194. port->icount.frame++;
  195. flg = TTY_FRAME;
  196. UART_CLR_STATUS(port, RXFERR);
  197. }
  198. } else
  199. flg = TTY_NORMAL;
  200. if (status & RXEMPTY)
  201. continue;
  202. ch = UART_GET_DATA(port);
  203. port->icount.rx++;
  204. if (!(uart_handle_sysrq_char(port, ch)))
  205. uart_insert_char(port, status, RXOERR, ch, flg);
  206. spin_unlock(&port->lock);
  207. tty_flip_buffer_push(&port->state->port);
  208. spin_lock(&port->lock);
  209. } while (!((status = UART_GET_STATUS(port)) & RXEMPTY));
  210. }
  211. /*
  212. * A note on the Interrupt handling state machine of this driver
  213. *
  214. * kernel printk writes funnel thru the console driver framework and in order
  215. * to keep things simple as well as efficient, it writes to UART in polled
  216. * mode, in one shot, and exits.
  217. *
  218. * OTOH, Userland output (via tty layer), uses interrupt based writes as there
  219. * can be undeterministic delay between char writes.
  220. *
  221. * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
  222. * disabled.
  223. *
  224. * When tty has some data to send out, serial core calls driver's start_tx
  225. * which
  226. * -checks-if-tty-buffer-has-char-to-send
  227. * -writes-data-to-uart
  228. * -enable-tx-intr
  229. *
  230. * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
  231. * The first thing Tx ISR does is disable further Tx interrupts (as this could
  232. * be the last char to send, before settling down into the quiet polled mode).
  233. * It then calls the exact routine used by tty layer write to send out any
  234. * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
  235. * of no data, it remains disabled.
  236. * This is how the transmit state machine is dynamically switched on/off
  237. */
  238. static irqreturn_t arc_serial_isr(int irq, void *dev_id)
  239. {
  240. struct uart_port *port = dev_id;
  241. unsigned int status;
  242. status = UART_GET_STATUS(port);
  243. /*
  244. * Single IRQ for both Rx (data available) Tx (room available) Interrupt
  245. * notifications from the UART Controller.
  246. * To demultiplex between the two, we check the relevant bits
  247. */
  248. if (status & RXIENB) {
  249. /* already in ISR, no need of xx_irqsave */
  250. spin_lock(&port->lock);
  251. arc_serial_rx_chars(port, status);
  252. spin_unlock(&port->lock);
  253. }
  254. if ((status & TXIENB) && (status & TXEMPTY)) {
  255. /* Unconditionally disable further Tx-Interrupts.
  256. * will be enabled by tx_chars() if needed.
  257. */
  258. UART_TX_IRQ_DISABLE(port);
  259. spin_lock(&port->lock);
  260. if (!uart_tx_stopped(port))
  261. arc_serial_tx_chars(port);
  262. spin_unlock(&port->lock);
  263. }
  264. return IRQ_HANDLED;
  265. }
  266. static unsigned int arc_serial_get_mctrl(struct uart_port *port)
  267. {
  268. /*
  269. * Pretend we have a Modem status reg and following bits are
  270. * always set, to satify the serial core state machine
  271. * (DSR) Data Set Ready
  272. * (CTS) Clear To Send
  273. * (CAR) Carrier Detect
  274. */
  275. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  276. }
  277. static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  278. {
  279. /* MCR not present */
  280. }
  281. static void arc_serial_break_ctl(struct uart_port *port, int break_state)
  282. {
  283. /* ARC UART doesn't support sending Break signal */
  284. }
  285. static int arc_serial_startup(struct uart_port *port)
  286. {
  287. /* Before we hook up the ISR, Disable all UART Interrupts */
  288. UART_ALL_IRQ_DISABLE(port);
  289. if (request_irq(port->irq, arc_serial_isr, 0, "arc uart rx-tx", port)) {
  290. dev_warn(port->dev, "Unable to attach ARC UART intr\n");
  291. return -EBUSY;
  292. }
  293. UART_RX_IRQ_ENABLE(port); /* Only Rx IRQ enabled to begin with */
  294. return 0;
  295. }
  296. /* This is not really needed */
  297. static void arc_serial_shutdown(struct uart_port *port)
  298. {
  299. free_irq(port->irq, port);
  300. }
  301. static void
  302. arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
  303. struct ktermios *old)
  304. {
  305. struct arc_uart_port *uart = to_arc_port(port);
  306. unsigned int baud, uartl, uarth, hw_val;
  307. unsigned long flags;
  308. /*
  309. * Use the generic handler so that any specially encoded baud rates
  310. * such as SPD_xx flags or "%B0" can be handled
  311. * Max Baud I suppose will not be more than current 115K * 4
  312. * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
  313. * spread over two 8-bit registers
  314. */
  315. baud = uart_get_baud_rate(port, new, old, 0, 460800);
  316. hw_val = port->uartclk / (uart->baud * 4) - 1;
  317. uartl = hw_val & 0xFF;
  318. uarth = (hw_val >> 8) & 0xFF;
  319. spin_lock_irqsave(&port->lock, flags);
  320. UART_ALL_IRQ_DISABLE(port);
  321. UART_SET_BAUDL(port, uartl);
  322. UART_SET_BAUDH(port, uarth);
  323. UART_RX_IRQ_ENABLE(port);
  324. /*
  325. * UART doesn't support Parity/Hardware Flow Control;
  326. * Only supports 8N1 character size
  327. */
  328. new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
  329. new->c_cflag |= CS8;
  330. if (old)
  331. tty_termios_copy_hw(new, old);
  332. /* Don't rewrite B0 */
  333. if (tty_termios_baud_rate(new))
  334. tty_termios_encode_baud_rate(new, baud, baud);
  335. uart_update_timeout(port, new->c_cflag, baud);
  336. spin_unlock_irqrestore(&port->lock, flags);
  337. }
  338. static const char *arc_serial_type(struct uart_port *port)
  339. {
  340. return port->type == PORT_ARC ? DRIVER_NAME : NULL;
  341. }
  342. static void arc_serial_release_port(struct uart_port *port)
  343. {
  344. }
  345. static int arc_serial_request_port(struct uart_port *port)
  346. {
  347. return 0;
  348. }
  349. /*
  350. * Verify the new serial_struct (for TIOCSSERIAL).
  351. */
  352. static int
  353. arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  354. {
  355. if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
  356. return -EINVAL;
  357. return 0;
  358. }
  359. /*
  360. * Configure/autoconfigure the port.
  361. */
  362. static void arc_serial_config_port(struct uart_port *port, int flags)
  363. {
  364. if (flags & UART_CONFIG_TYPE)
  365. port->type = PORT_ARC;
  366. }
  367. #ifdef CONFIG_CONSOLE_POLL
  368. static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
  369. {
  370. while (!(UART_GET_STATUS(port) & TXEMPTY))
  371. cpu_relax();
  372. UART_SET_DATA(port, chr);
  373. }
  374. static int arc_serial_poll_getchar(struct uart_port *port)
  375. {
  376. unsigned char chr;
  377. while (!(UART_GET_STATUS(port) & RXEMPTY))
  378. cpu_relax();
  379. chr = UART_GET_DATA(port);
  380. return chr;
  381. }
  382. #endif
  383. static const struct uart_ops arc_serial_pops = {
  384. .tx_empty = arc_serial_tx_empty,
  385. .set_mctrl = arc_serial_set_mctrl,
  386. .get_mctrl = arc_serial_get_mctrl,
  387. .stop_tx = arc_serial_stop_tx,
  388. .start_tx = arc_serial_start_tx,
  389. .stop_rx = arc_serial_stop_rx,
  390. .break_ctl = arc_serial_break_ctl,
  391. .startup = arc_serial_startup,
  392. .shutdown = arc_serial_shutdown,
  393. .set_termios = arc_serial_set_termios,
  394. .type = arc_serial_type,
  395. .release_port = arc_serial_release_port,
  396. .request_port = arc_serial_request_port,
  397. .config_port = arc_serial_config_port,
  398. .verify_port = arc_serial_verify_port,
  399. #ifdef CONFIG_CONSOLE_POLL
  400. .poll_put_char = arc_serial_poll_putchar,
  401. .poll_get_char = arc_serial_poll_getchar,
  402. #endif
  403. };
  404. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  405. static int arc_serial_console_setup(struct console *co, char *options)
  406. {
  407. struct uart_port *port;
  408. int baud = 115200;
  409. int bits = 8;
  410. int parity = 'n';
  411. int flow = 'n';
  412. if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
  413. return -ENODEV;
  414. /*
  415. * The uart port backing the console (e.g. ttyARC1) might not have been
  416. * init yet. If so, defer the console setup to after the port.
  417. */
  418. port = &arc_uart_ports[co->index].port;
  419. if (!port->membase)
  420. return -ENODEV;
  421. if (options)
  422. uart_parse_options(options, &baud, &parity, &bits, &flow);
  423. /*
  424. * Serial core will call port->ops->set_termios( )
  425. * which will set the baud reg
  426. */
  427. return uart_set_options(port, co, baud, parity, bits, flow);
  428. }
  429. static void arc_serial_console_putchar(struct uart_port *port, int ch)
  430. {
  431. while (!(UART_GET_STATUS(port) & TXEMPTY))
  432. cpu_relax();
  433. UART_SET_DATA(port, (unsigned char)ch);
  434. }
  435. /*
  436. * Interrupts are disabled on entering
  437. */
  438. static void arc_serial_console_write(struct console *co, const char *s,
  439. unsigned int count)
  440. {
  441. struct uart_port *port = &arc_uart_ports[co->index].port;
  442. unsigned long flags;
  443. spin_lock_irqsave(&port->lock, flags);
  444. uart_console_write(port, s, count, arc_serial_console_putchar);
  445. spin_unlock_irqrestore(&port->lock, flags);
  446. }
  447. static struct console arc_console = {
  448. .name = ARC_SERIAL_DEV_NAME,
  449. .write = arc_serial_console_write,
  450. .device = uart_console_device,
  451. .setup = arc_serial_console_setup,
  452. .flags = CON_PRINTBUFFER,
  453. .index = -1,
  454. .data = &arc_uart_driver
  455. };
  456. static __init void arc_early_serial_write(struct console *con, const char *s,
  457. unsigned int n)
  458. {
  459. struct earlycon_device *dev = con->data;
  460. uart_console_write(&dev->port, s, n, arc_serial_console_putchar);
  461. }
  462. static int __init arc_early_console_setup(struct earlycon_device *dev,
  463. const char *opt)
  464. {
  465. struct uart_port *port = &dev->port;
  466. unsigned int l, h, hw_val;
  467. if (!dev->port.membase)
  468. return -ENODEV;
  469. hw_val = port->uartclk / (dev->baud * 4) - 1;
  470. l = hw_val & 0xFF;
  471. h = (hw_val >> 8) & 0xFF;
  472. UART_SET_BAUDL(port, l);
  473. UART_SET_BAUDH(port, h);
  474. dev->con->write = arc_early_serial_write;
  475. return 0;
  476. }
  477. OF_EARLYCON_DECLARE(arc_uart, "snps,arc-uart", arc_early_console_setup);
  478. #endif /* CONFIG_SERIAL_ARC_CONSOLE */
  479. static int arc_serial_probe(struct platform_device *pdev)
  480. {
  481. struct device_node *np = pdev->dev.of_node;
  482. struct arc_uart_port *uart;
  483. struct uart_port *port;
  484. int dev_id;
  485. u32 val;
  486. /* no device tree device */
  487. if (!np)
  488. return -ENODEV;
  489. dev_id = of_alias_get_id(np, "serial");
  490. if (dev_id < 0)
  491. dev_id = 0;
  492. if (dev_id >= ARRAY_SIZE(arc_uart_ports)) {
  493. dev_err(&pdev->dev, "serial%d out of range\n", dev_id);
  494. return -EINVAL;
  495. }
  496. uart = &arc_uart_ports[dev_id];
  497. port = &uart->port;
  498. if (of_property_read_u32(np, "clock-frequency", &val)) {
  499. dev_err(&pdev->dev, "clock-frequency property NOTset\n");
  500. return -EINVAL;
  501. }
  502. port->uartclk = val;
  503. if (of_property_read_u32(np, "current-speed", &val)) {
  504. dev_err(&pdev->dev, "current-speed property NOT set\n");
  505. return -EINVAL;
  506. }
  507. uart->baud = val;
  508. port->membase = of_iomap(np, 0);
  509. if (!port->membase)
  510. /* No point of dev_err since UART itself is hosed here */
  511. return -ENXIO;
  512. port->irq = irq_of_parse_and_map(np, 0);
  513. port->dev = &pdev->dev;
  514. port->iotype = UPIO_MEM;
  515. port->flags = UPF_BOOT_AUTOCONF;
  516. port->line = dev_id;
  517. port->ops = &arc_serial_pops;
  518. port->fifosize = ARC_UART_TX_FIFO_SIZE;
  519. /*
  520. * uart_insert_char( ) uses it in decideding whether to ignore a
  521. * char or not. Explicitly setting it here, removes the subtelty
  522. */
  523. port->ignore_status_mask = 0;
  524. return uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
  525. }
  526. static int arc_serial_remove(struct platform_device *pdev)
  527. {
  528. /* This will never be called */
  529. return 0;
  530. }
  531. static const struct of_device_id arc_uart_dt_ids[] = {
  532. { .compatible = "snps,arc-uart" },
  533. { /* Sentinel */ }
  534. };
  535. MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
  536. static struct platform_driver arc_platform_driver = {
  537. .probe = arc_serial_probe,
  538. .remove = arc_serial_remove,
  539. .driver = {
  540. .name = DRIVER_NAME,
  541. .of_match_table = arc_uart_dt_ids,
  542. },
  543. };
  544. static int __init arc_serial_init(void)
  545. {
  546. int ret;
  547. ret = uart_register_driver(&arc_uart_driver);
  548. if (ret)
  549. return ret;
  550. ret = platform_driver_register(&arc_platform_driver);
  551. if (ret)
  552. uart_unregister_driver(&arc_uart_driver);
  553. return ret;
  554. }
  555. static void __exit arc_serial_exit(void)
  556. {
  557. platform_driver_unregister(&arc_platform_driver);
  558. uart_unregister_driver(&arc_uart_driver);
  559. }
  560. module_init(arc_serial_init);
  561. module_exit(arc_serial_exit);
  562. MODULE_LICENSE("GPL");
  563. MODULE_ALIAS("platform:" DRIVER_NAME);
  564. MODULE_AUTHOR("Vineet Gupta");
  565. MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");