ar933x_uart.c 18 KB

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  1. /*
  2. * Atheros AR933X SoC built-in UART driver
  3. *
  4. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published
  10. * by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/ioport.h>
  14. #include <linux/init.h>
  15. #include <linux/console.h>
  16. #include <linux/sysrq.h>
  17. #include <linux/delay.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/serial_core.h>
  24. #include <linux/serial.h>
  25. #include <linux/slab.h>
  26. #include <linux/io.h>
  27. #include <linux/irq.h>
  28. #include <linux/clk.h>
  29. #include <asm/div64.h>
  30. #include <asm/mach-ath79/ar933x_uart.h>
  31. #define DRIVER_NAME "ar933x-uart"
  32. #define AR933X_UART_MAX_SCALE 0xff
  33. #define AR933X_UART_MAX_STEP 0xffff
  34. #define AR933X_UART_MIN_BAUD 300
  35. #define AR933X_UART_MAX_BAUD 3000000
  36. #define AR933X_DUMMY_STATUS_RD 0x01
  37. static struct uart_driver ar933x_uart_driver;
  38. struct ar933x_uart_port {
  39. struct uart_port port;
  40. unsigned int ier; /* shadow Interrupt Enable Register */
  41. unsigned int min_baud;
  42. unsigned int max_baud;
  43. struct clk *clk;
  44. };
  45. static inline bool ar933x_uart_console_enabled(void)
  46. {
  47. return IS_ENABLED(CONFIG_SERIAL_AR933X_CONSOLE);
  48. }
  49. static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
  50. int offset)
  51. {
  52. return readl(up->port.membase + offset);
  53. }
  54. static inline void ar933x_uart_write(struct ar933x_uart_port *up,
  55. int offset, unsigned int value)
  56. {
  57. writel(value, up->port.membase + offset);
  58. }
  59. static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
  60. unsigned int offset,
  61. unsigned int mask,
  62. unsigned int val)
  63. {
  64. unsigned int t;
  65. t = ar933x_uart_read(up, offset);
  66. t &= ~mask;
  67. t |= val;
  68. ar933x_uart_write(up, offset, t);
  69. }
  70. static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
  71. unsigned int offset,
  72. unsigned int val)
  73. {
  74. ar933x_uart_rmw(up, offset, 0, val);
  75. }
  76. static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
  77. unsigned int offset,
  78. unsigned int val)
  79. {
  80. ar933x_uart_rmw(up, offset, val, 0);
  81. }
  82. static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
  83. {
  84. up->ier |= AR933X_UART_INT_TX_EMPTY;
  85. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  86. }
  87. static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
  88. {
  89. up->ier &= ~AR933X_UART_INT_TX_EMPTY;
  90. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  91. }
  92. static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
  93. {
  94. unsigned int rdata;
  95. rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
  96. rdata |= AR933X_UART_DATA_TX_CSR;
  97. ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
  98. }
  99. static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
  100. {
  101. struct ar933x_uart_port *up =
  102. container_of(port, struct ar933x_uart_port, port);
  103. unsigned long flags;
  104. unsigned int rdata;
  105. spin_lock_irqsave(&up->port.lock, flags);
  106. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  107. spin_unlock_irqrestore(&up->port.lock, flags);
  108. return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
  109. }
  110. static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
  111. {
  112. return TIOCM_CAR;
  113. }
  114. static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  115. {
  116. }
  117. static void ar933x_uart_start_tx(struct uart_port *port)
  118. {
  119. struct ar933x_uart_port *up =
  120. container_of(port, struct ar933x_uart_port, port);
  121. ar933x_uart_start_tx_interrupt(up);
  122. }
  123. static void ar933x_uart_stop_tx(struct uart_port *port)
  124. {
  125. struct ar933x_uart_port *up =
  126. container_of(port, struct ar933x_uart_port, port);
  127. ar933x_uart_stop_tx_interrupt(up);
  128. }
  129. static void ar933x_uart_stop_rx(struct uart_port *port)
  130. {
  131. struct ar933x_uart_port *up =
  132. container_of(port, struct ar933x_uart_port, port);
  133. up->ier &= ~AR933X_UART_INT_RX_VALID;
  134. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  135. }
  136. static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
  137. {
  138. struct ar933x_uart_port *up =
  139. container_of(port, struct ar933x_uart_port, port);
  140. unsigned long flags;
  141. spin_lock_irqsave(&up->port.lock, flags);
  142. if (break_state == -1)
  143. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  144. AR933X_UART_CS_TX_BREAK);
  145. else
  146. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  147. AR933X_UART_CS_TX_BREAK);
  148. spin_unlock_irqrestore(&up->port.lock, flags);
  149. }
  150. /*
  151. * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
  152. */
  153. static unsigned long ar933x_uart_get_baud(unsigned int clk,
  154. unsigned int scale,
  155. unsigned int step)
  156. {
  157. u64 t;
  158. u32 div;
  159. div = (2 << 16) * (scale + 1);
  160. t = clk;
  161. t *= step;
  162. t += (div / 2);
  163. do_div(t, div);
  164. return t;
  165. }
  166. static void ar933x_uart_get_scale_step(unsigned int clk,
  167. unsigned int baud,
  168. unsigned int *scale,
  169. unsigned int *step)
  170. {
  171. unsigned int tscale;
  172. long min_diff;
  173. *scale = 0;
  174. *step = 0;
  175. min_diff = baud;
  176. for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
  177. u64 tstep;
  178. int diff;
  179. tstep = baud * (tscale + 1);
  180. tstep *= (2 << 16);
  181. do_div(tstep, clk);
  182. if (tstep > AR933X_UART_MAX_STEP)
  183. break;
  184. diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
  185. if (diff < min_diff) {
  186. min_diff = diff;
  187. *scale = tscale;
  188. *step = tstep;
  189. }
  190. }
  191. }
  192. static void ar933x_uart_set_termios(struct uart_port *port,
  193. struct ktermios *new,
  194. struct ktermios *old)
  195. {
  196. struct ar933x_uart_port *up =
  197. container_of(port, struct ar933x_uart_port, port);
  198. unsigned int cs;
  199. unsigned long flags;
  200. unsigned int baud, scale, step;
  201. /* Only CS8 is supported */
  202. new->c_cflag &= ~CSIZE;
  203. new->c_cflag |= CS8;
  204. /* Only one stop bit is supported */
  205. new->c_cflag &= ~CSTOPB;
  206. cs = 0;
  207. if (new->c_cflag & PARENB) {
  208. if (!(new->c_cflag & PARODD))
  209. cs |= AR933X_UART_CS_PARITY_EVEN;
  210. else
  211. cs |= AR933X_UART_CS_PARITY_ODD;
  212. } else {
  213. cs |= AR933X_UART_CS_PARITY_NONE;
  214. }
  215. /* Mark/space parity is not supported */
  216. new->c_cflag &= ~CMSPAR;
  217. baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
  218. ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
  219. /*
  220. * Ok, we're now changing the port state. Do it with
  221. * interrupts disabled.
  222. */
  223. spin_lock_irqsave(&up->port.lock, flags);
  224. /* disable the UART */
  225. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  226. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
  227. /* Update the per-port timeout. */
  228. uart_update_timeout(port, new->c_cflag, baud);
  229. up->port.ignore_status_mask = 0;
  230. /* ignore all characters if CREAD is not set */
  231. if ((new->c_cflag & CREAD) == 0)
  232. up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
  233. ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
  234. scale << AR933X_UART_CLOCK_SCALE_S | step);
  235. /* setup configuration register */
  236. ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
  237. /* enable host interrupt */
  238. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  239. AR933X_UART_CS_HOST_INT_EN);
  240. /* reenable the UART */
  241. ar933x_uart_rmw(up, AR933X_UART_CS_REG,
  242. AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
  243. AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
  244. spin_unlock_irqrestore(&up->port.lock, flags);
  245. if (tty_termios_baud_rate(new))
  246. tty_termios_encode_baud_rate(new, baud, baud);
  247. }
  248. static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
  249. {
  250. struct tty_port *port = &up->port.state->port;
  251. int max_count = 256;
  252. do {
  253. unsigned int rdata;
  254. unsigned char ch;
  255. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  256. if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
  257. break;
  258. /* remove the character from the FIFO */
  259. ar933x_uart_write(up, AR933X_UART_DATA_REG,
  260. AR933X_UART_DATA_RX_CSR);
  261. up->port.icount.rx++;
  262. ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
  263. if (uart_handle_sysrq_char(&up->port, ch))
  264. continue;
  265. if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
  266. tty_insert_flip_char(port, ch, TTY_NORMAL);
  267. } while (max_count-- > 0);
  268. spin_unlock(&up->port.lock);
  269. tty_flip_buffer_push(port);
  270. spin_lock(&up->port.lock);
  271. }
  272. static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
  273. {
  274. struct circ_buf *xmit = &up->port.state->xmit;
  275. int count;
  276. if (uart_tx_stopped(&up->port))
  277. return;
  278. count = up->port.fifosize;
  279. do {
  280. unsigned int rdata;
  281. rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  282. if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
  283. break;
  284. if (up->port.x_char) {
  285. ar933x_uart_putc(up, up->port.x_char);
  286. up->port.icount.tx++;
  287. up->port.x_char = 0;
  288. continue;
  289. }
  290. if (uart_circ_empty(xmit))
  291. break;
  292. ar933x_uart_putc(up, xmit->buf[xmit->tail]);
  293. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  294. up->port.icount.tx++;
  295. } while (--count > 0);
  296. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  297. uart_write_wakeup(&up->port);
  298. if (!uart_circ_empty(xmit))
  299. ar933x_uart_start_tx_interrupt(up);
  300. }
  301. static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
  302. {
  303. struct ar933x_uart_port *up = dev_id;
  304. unsigned int status;
  305. status = ar933x_uart_read(up, AR933X_UART_CS_REG);
  306. if ((status & AR933X_UART_CS_HOST_INT) == 0)
  307. return IRQ_NONE;
  308. spin_lock(&up->port.lock);
  309. status = ar933x_uart_read(up, AR933X_UART_INT_REG);
  310. status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  311. if (status & AR933X_UART_INT_RX_VALID) {
  312. ar933x_uart_write(up, AR933X_UART_INT_REG,
  313. AR933X_UART_INT_RX_VALID);
  314. ar933x_uart_rx_chars(up);
  315. }
  316. if (status & AR933X_UART_INT_TX_EMPTY) {
  317. ar933x_uart_write(up, AR933X_UART_INT_REG,
  318. AR933X_UART_INT_TX_EMPTY);
  319. ar933x_uart_stop_tx_interrupt(up);
  320. ar933x_uart_tx_chars(up);
  321. }
  322. spin_unlock(&up->port.lock);
  323. return IRQ_HANDLED;
  324. }
  325. static int ar933x_uart_startup(struct uart_port *port)
  326. {
  327. struct ar933x_uart_port *up =
  328. container_of(port, struct ar933x_uart_port, port);
  329. unsigned long flags;
  330. int ret;
  331. ret = request_irq(up->port.irq, ar933x_uart_interrupt,
  332. up->port.irqflags, dev_name(up->port.dev), up);
  333. if (ret)
  334. return ret;
  335. spin_lock_irqsave(&up->port.lock, flags);
  336. /* Enable HOST interrupts */
  337. ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
  338. AR933X_UART_CS_HOST_INT_EN);
  339. /* Enable RX interrupts */
  340. up->ier = AR933X_UART_INT_RX_VALID;
  341. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  342. spin_unlock_irqrestore(&up->port.lock, flags);
  343. return 0;
  344. }
  345. static void ar933x_uart_shutdown(struct uart_port *port)
  346. {
  347. struct ar933x_uart_port *up =
  348. container_of(port, struct ar933x_uart_port, port);
  349. /* Disable all interrupts */
  350. up->ier = 0;
  351. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
  352. /* Disable break condition */
  353. ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
  354. AR933X_UART_CS_TX_BREAK);
  355. free_irq(up->port.irq, up);
  356. }
  357. static const char *ar933x_uart_type(struct uart_port *port)
  358. {
  359. return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
  360. }
  361. static void ar933x_uart_release_port(struct uart_port *port)
  362. {
  363. /* Nothing to release ... */
  364. }
  365. static int ar933x_uart_request_port(struct uart_port *port)
  366. {
  367. /* UARTs always present */
  368. return 0;
  369. }
  370. static void ar933x_uart_config_port(struct uart_port *port, int flags)
  371. {
  372. if (flags & UART_CONFIG_TYPE)
  373. port->type = PORT_AR933X;
  374. }
  375. static int ar933x_uart_verify_port(struct uart_port *port,
  376. struct serial_struct *ser)
  377. {
  378. struct ar933x_uart_port *up =
  379. container_of(port, struct ar933x_uart_port, port);
  380. if (ser->type != PORT_UNKNOWN &&
  381. ser->type != PORT_AR933X)
  382. return -EINVAL;
  383. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  384. return -EINVAL;
  385. if (ser->baud_base < up->min_baud ||
  386. ser->baud_base > up->max_baud)
  387. return -EINVAL;
  388. return 0;
  389. }
  390. static struct uart_ops ar933x_uart_ops = {
  391. .tx_empty = ar933x_uart_tx_empty,
  392. .set_mctrl = ar933x_uart_set_mctrl,
  393. .get_mctrl = ar933x_uart_get_mctrl,
  394. .stop_tx = ar933x_uart_stop_tx,
  395. .start_tx = ar933x_uart_start_tx,
  396. .stop_rx = ar933x_uart_stop_rx,
  397. .break_ctl = ar933x_uart_break_ctl,
  398. .startup = ar933x_uart_startup,
  399. .shutdown = ar933x_uart_shutdown,
  400. .set_termios = ar933x_uart_set_termios,
  401. .type = ar933x_uart_type,
  402. .release_port = ar933x_uart_release_port,
  403. .request_port = ar933x_uart_request_port,
  404. .config_port = ar933x_uart_config_port,
  405. .verify_port = ar933x_uart_verify_port,
  406. };
  407. static struct ar933x_uart_port *
  408. ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
  409. static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
  410. {
  411. unsigned int status;
  412. unsigned int timeout = 60000;
  413. /* Wait up to 60ms for the character(s) to be sent. */
  414. do {
  415. status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
  416. if (--timeout == 0)
  417. break;
  418. udelay(1);
  419. } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
  420. }
  421. static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
  422. {
  423. struct ar933x_uart_port *up =
  424. container_of(port, struct ar933x_uart_port, port);
  425. ar933x_uart_wait_xmitr(up);
  426. ar933x_uart_putc(up, ch);
  427. }
  428. static void ar933x_uart_console_write(struct console *co, const char *s,
  429. unsigned int count)
  430. {
  431. struct ar933x_uart_port *up = ar933x_console_ports[co->index];
  432. unsigned long flags;
  433. unsigned int int_en;
  434. int locked = 1;
  435. local_irq_save(flags);
  436. if (up->port.sysrq)
  437. locked = 0;
  438. else if (oops_in_progress)
  439. locked = spin_trylock(&up->port.lock);
  440. else
  441. spin_lock(&up->port.lock);
  442. /*
  443. * First save the IER then disable the interrupts
  444. */
  445. int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
  446. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
  447. uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
  448. /*
  449. * Finally, wait for transmitter to become empty
  450. * and restore the IER
  451. */
  452. ar933x_uart_wait_xmitr(up);
  453. ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
  454. ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
  455. if (locked)
  456. spin_unlock(&up->port.lock);
  457. local_irq_restore(flags);
  458. }
  459. static int ar933x_uart_console_setup(struct console *co, char *options)
  460. {
  461. struct ar933x_uart_port *up;
  462. int baud = 115200;
  463. int bits = 8;
  464. int parity = 'n';
  465. int flow = 'n';
  466. if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
  467. return -EINVAL;
  468. up = ar933x_console_ports[co->index];
  469. if (!up)
  470. return -ENODEV;
  471. if (options)
  472. uart_parse_options(options, &baud, &parity, &bits, &flow);
  473. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  474. }
  475. static struct console ar933x_uart_console = {
  476. .name = "ttyATH",
  477. .write = ar933x_uart_console_write,
  478. .device = uart_console_device,
  479. .setup = ar933x_uart_console_setup,
  480. .flags = CON_PRINTBUFFER,
  481. .index = -1,
  482. .data = &ar933x_uart_driver,
  483. };
  484. static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
  485. {
  486. if (!ar933x_uart_console_enabled())
  487. return;
  488. ar933x_console_ports[up->port.line] = up;
  489. }
  490. static struct uart_driver ar933x_uart_driver = {
  491. .owner = THIS_MODULE,
  492. .driver_name = DRIVER_NAME,
  493. .dev_name = "ttyATH",
  494. .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
  495. .cons = NULL, /* filled in runtime */
  496. };
  497. static int ar933x_uart_probe(struct platform_device *pdev)
  498. {
  499. struct ar933x_uart_port *up;
  500. struct uart_port *port;
  501. struct resource *mem_res;
  502. struct resource *irq_res;
  503. struct device_node *np;
  504. unsigned int baud;
  505. int id;
  506. int ret;
  507. np = pdev->dev.of_node;
  508. if (IS_ENABLED(CONFIG_OF) && np) {
  509. id = of_alias_get_id(np, "serial");
  510. if (id < 0) {
  511. dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
  512. id);
  513. return id;
  514. }
  515. } else {
  516. id = pdev->id;
  517. if (id == -1)
  518. id = 0;
  519. }
  520. if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
  521. return -EINVAL;
  522. irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  523. if (!irq_res) {
  524. dev_err(&pdev->dev, "no IRQ resource\n");
  525. return -EINVAL;
  526. }
  527. up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
  528. GFP_KERNEL);
  529. if (!up)
  530. return -ENOMEM;
  531. up->clk = devm_clk_get(&pdev->dev, "uart");
  532. if (IS_ERR(up->clk)) {
  533. dev_err(&pdev->dev, "unable to get UART clock\n");
  534. return PTR_ERR(up->clk);
  535. }
  536. port = &up->port;
  537. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  538. port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
  539. if (IS_ERR(port->membase))
  540. return PTR_ERR(port->membase);
  541. ret = clk_prepare_enable(up->clk);
  542. if (ret)
  543. return ret;
  544. port->uartclk = clk_get_rate(up->clk);
  545. if (!port->uartclk) {
  546. ret = -EINVAL;
  547. goto err_disable_clk;
  548. }
  549. port->mapbase = mem_res->start;
  550. port->line = id;
  551. port->irq = irq_res->start;
  552. port->dev = &pdev->dev;
  553. port->type = PORT_AR933X;
  554. port->iotype = UPIO_MEM32;
  555. port->regshift = 2;
  556. port->fifosize = AR933X_UART_FIFO_SIZE;
  557. port->ops = &ar933x_uart_ops;
  558. baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
  559. up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
  560. baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
  561. up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
  562. ar933x_uart_add_console_port(up);
  563. ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
  564. if (ret)
  565. goto err_disable_clk;
  566. platform_set_drvdata(pdev, up);
  567. return 0;
  568. err_disable_clk:
  569. clk_disable_unprepare(up->clk);
  570. return ret;
  571. }
  572. static int ar933x_uart_remove(struct platform_device *pdev)
  573. {
  574. struct ar933x_uart_port *up;
  575. up = platform_get_drvdata(pdev);
  576. if (up) {
  577. uart_remove_one_port(&ar933x_uart_driver, &up->port);
  578. clk_disable_unprepare(up->clk);
  579. }
  580. return 0;
  581. }
  582. #ifdef CONFIG_OF
  583. static const struct of_device_id ar933x_uart_of_ids[] = {
  584. { .compatible = "qca,ar9330-uart" },
  585. {},
  586. };
  587. MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
  588. #endif
  589. static struct platform_driver ar933x_uart_platform_driver = {
  590. .probe = ar933x_uart_probe,
  591. .remove = ar933x_uart_remove,
  592. .driver = {
  593. .name = DRIVER_NAME,
  594. .of_match_table = of_match_ptr(ar933x_uart_of_ids),
  595. },
  596. };
  597. static int __init ar933x_uart_init(void)
  598. {
  599. int ret;
  600. if (ar933x_uart_console_enabled())
  601. ar933x_uart_driver.cons = &ar933x_uart_console;
  602. ret = uart_register_driver(&ar933x_uart_driver);
  603. if (ret)
  604. goto err_out;
  605. ret = platform_driver_register(&ar933x_uart_platform_driver);
  606. if (ret)
  607. goto err_unregister_uart_driver;
  608. return 0;
  609. err_unregister_uart_driver:
  610. uart_unregister_driver(&ar933x_uart_driver);
  611. err_out:
  612. return ret;
  613. }
  614. static void __exit ar933x_uart_exit(void)
  615. {
  616. platform_driver_unregister(&ar933x_uart_platform_driver);
  617. uart_unregister_driver(&ar933x_uart_driver);
  618. }
  619. module_init(ar933x_uart_init);
  620. module_exit(ar933x_uart_exit);
  621. MODULE_DESCRIPTION("Atheros AR933X UART driver");
  622. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
  623. MODULE_LICENSE("GPL v2");
  624. MODULE_ALIAS("platform:" DRIVER_NAME);