altera_uart.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636
  1. /*
  2. * altera_uart.c -- Altera UART driver
  3. *
  4. * Based on mcf.c -- Freescale ColdFire UART driver
  5. *
  6. * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
  7. * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
  8. * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/timer.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/console.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/serial.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/of.h>
  27. #include <linux/io.h>
  28. #include <linux/altera_uart.h>
  29. #define DRV_NAME "altera_uart"
  30. #define SERIAL_ALTERA_MAJOR 204
  31. #define SERIAL_ALTERA_MINOR 213
  32. /*
  33. * Altera UART register definitions according to the Nios UART datasheet:
  34. * http://www.altera.com/literature/ds/ds_nios_uart.pdf
  35. */
  36. #define ALTERA_UART_SIZE 32
  37. #define ALTERA_UART_RXDATA_REG 0
  38. #define ALTERA_UART_TXDATA_REG 4
  39. #define ALTERA_UART_STATUS_REG 8
  40. #define ALTERA_UART_CONTROL_REG 12
  41. #define ALTERA_UART_DIVISOR_REG 16
  42. #define ALTERA_UART_EOP_REG 20
  43. #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
  44. #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
  45. #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
  46. #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
  47. #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
  48. #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
  49. #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
  50. #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
  51. #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
  52. #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
  53. #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
  54. #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
  55. /* Enable interrupt on... */
  56. #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
  57. #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
  58. #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
  59. #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
  60. #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
  61. #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
  62. #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
  63. #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
  64. #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
  65. #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
  66. #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
  67. #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
  68. #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
  69. /*
  70. * Local per-uart structure.
  71. */
  72. struct altera_uart {
  73. struct uart_port port;
  74. struct timer_list tmr;
  75. unsigned int sigs; /* Local copy of line sigs */
  76. unsigned short imr; /* Local IMR mirror */
  77. };
  78. static u32 altera_uart_readl(struct uart_port *port, int reg)
  79. {
  80. return readl(port->membase + (reg << port->regshift));
  81. }
  82. static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
  83. {
  84. writel(dat, port->membase + (reg << port->regshift));
  85. }
  86. static unsigned int altera_uart_tx_empty(struct uart_port *port)
  87. {
  88. return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  89. ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
  90. }
  91. static unsigned int altera_uart_get_mctrl(struct uart_port *port)
  92. {
  93. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  94. unsigned int sigs;
  95. sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  96. ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
  97. sigs |= (pp->sigs & TIOCM_RTS);
  98. return sigs;
  99. }
  100. static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
  101. {
  102. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  103. pp->sigs = sigs;
  104. if (sigs & TIOCM_RTS)
  105. pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
  106. else
  107. pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
  108. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  109. }
  110. static void altera_uart_start_tx(struct uart_port *port)
  111. {
  112. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  113. pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
  114. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  115. }
  116. static void altera_uart_stop_tx(struct uart_port *port)
  117. {
  118. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  119. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  120. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  121. }
  122. static void altera_uart_stop_rx(struct uart_port *port)
  123. {
  124. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  125. pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
  126. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  127. }
  128. static void altera_uart_break_ctl(struct uart_port *port, int break_state)
  129. {
  130. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  131. unsigned long flags;
  132. spin_lock_irqsave(&port->lock, flags);
  133. if (break_state == -1)
  134. pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
  135. else
  136. pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
  137. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  138. spin_unlock_irqrestore(&port->lock, flags);
  139. }
  140. static void altera_uart_set_termios(struct uart_port *port,
  141. struct ktermios *termios,
  142. struct ktermios *old)
  143. {
  144. unsigned long flags;
  145. unsigned int baud, baudclk;
  146. baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
  147. baudclk = port->uartclk / baud;
  148. if (old)
  149. tty_termios_copy_hw(termios, old);
  150. tty_termios_encode_baud_rate(termios, baud, baud);
  151. spin_lock_irqsave(&port->lock, flags);
  152. uart_update_timeout(port, termios->c_cflag, baud);
  153. altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
  154. spin_unlock_irqrestore(&port->lock, flags);
  155. /*
  156. * FIXME: port->read_status_mask and port->ignore_status_mask
  157. * need to be initialized based on termios settings for
  158. * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
  159. */
  160. }
  161. static void altera_uart_rx_chars(struct altera_uart *pp)
  162. {
  163. struct uart_port *port = &pp->port;
  164. unsigned char ch, flag;
  165. unsigned short status;
  166. while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
  167. ALTERA_UART_STATUS_RRDY_MSK) {
  168. ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  169. flag = TTY_NORMAL;
  170. port->icount.rx++;
  171. if (status & ALTERA_UART_STATUS_E_MSK) {
  172. altera_uart_writel(port, status,
  173. ALTERA_UART_STATUS_REG);
  174. if (status & ALTERA_UART_STATUS_BRK_MSK) {
  175. port->icount.brk++;
  176. if (uart_handle_break(port))
  177. continue;
  178. } else if (status & ALTERA_UART_STATUS_PE_MSK) {
  179. port->icount.parity++;
  180. } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
  181. port->icount.overrun++;
  182. } else if (status & ALTERA_UART_STATUS_FE_MSK) {
  183. port->icount.frame++;
  184. }
  185. status &= port->read_status_mask;
  186. if (status & ALTERA_UART_STATUS_BRK_MSK)
  187. flag = TTY_BREAK;
  188. else if (status & ALTERA_UART_STATUS_PE_MSK)
  189. flag = TTY_PARITY;
  190. else if (status & ALTERA_UART_STATUS_FE_MSK)
  191. flag = TTY_FRAME;
  192. }
  193. if (uart_handle_sysrq_char(port, ch))
  194. continue;
  195. uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
  196. flag);
  197. }
  198. spin_unlock(&port->lock);
  199. tty_flip_buffer_push(&port->state->port);
  200. spin_lock(&port->lock);
  201. }
  202. static void altera_uart_tx_chars(struct altera_uart *pp)
  203. {
  204. struct uart_port *port = &pp->port;
  205. struct circ_buf *xmit = &port->state->xmit;
  206. if (port->x_char) {
  207. /* Send special char - probably flow control */
  208. altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
  209. port->x_char = 0;
  210. port->icount.tx++;
  211. return;
  212. }
  213. while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  214. ALTERA_UART_STATUS_TRDY_MSK) {
  215. if (xmit->head == xmit->tail)
  216. break;
  217. altera_uart_writel(port, xmit->buf[xmit->tail],
  218. ALTERA_UART_TXDATA_REG);
  219. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  220. port->icount.tx++;
  221. }
  222. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  223. uart_write_wakeup(port);
  224. if (xmit->head == xmit->tail) {
  225. pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
  226. altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
  227. }
  228. }
  229. static irqreturn_t altera_uart_interrupt(int irq, void *data)
  230. {
  231. struct uart_port *port = data;
  232. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  233. unsigned int isr;
  234. isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
  235. spin_lock(&port->lock);
  236. if (isr & ALTERA_UART_STATUS_RRDY_MSK)
  237. altera_uart_rx_chars(pp);
  238. if (isr & ALTERA_UART_STATUS_TRDY_MSK)
  239. altera_uart_tx_chars(pp);
  240. spin_unlock(&port->lock);
  241. return IRQ_RETVAL(isr);
  242. }
  243. static void altera_uart_timer(unsigned long data)
  244. {
  245. struct uart_port *port = (void *)data;
  246. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  247. altera_uart_interrupt(0, port);
  248. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  249. }
  250. static void altera_uart_config_port(struct uart_port *port, int flags)
  251. {
  252. port->type = PORT_ALTERA_UART;
  253. /* Clear mask, so no surprise interrupts. */
  254. altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
  255. /* Clear status register */
  256. altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
  257. }
  258. static int altera_uart_startup(struct uart_port *port)
  259. {
  260. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  261. unsigned long flags;
  262. int ret;
  263. if (!port->irq) {
  264. setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
  265. mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
  266. return 0;
  267. }
  268. ret = request_irq(port->irq, altera_uart_interrupt, 0,
  269. DRV_NAME, port);
  270. if (ret) {
  271. pr_err(DRV_NAME ": unable to attach Altera UART %d "
  272. "interrupt vector=%d\n", port->line, port->irq);
  273. return ret;
  274. }
  275. spin_lock_irqsave(&port->lock, flags);
  276. /* Enable RX interrupts now */
  277. pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
  278. writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
  279. spin_unlock_irqrestore(&port->lock, flags);
  280. return 0;
  281. }
  282. static void altera_uart_shutdown(struct uart_port *port)
  283. {
  284. struct altera_uart *pp = container_of(port, struct altera_uart, port);
  285. unsigned long flags;
  286. spin_lock_irqsave(&port->lock, flags);
  287. /* Disable all interrupts now */
  288. pp->imr = 0;
  289. writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
  290. spin_unlock_irqrestore(&port->lock, flags);
  291. if (port->irq)
  292. free_irq(port->irq, port);
  293. else
  294. del_timer_sync(&pp->tmr);
  295. }
  296. static const char *altera_uart_type(struct uart_port *port)
  297. {
  298. return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
  299. }
  300. static int altera_uart_request_port(struct uart_port *port)
  301. {
  302. /* UARTs always present */
  303. return 0;
  304. }
  305. static void altera_uart_release_port(struct uart_port *port)
  306. {
  307. /* Nothing to release... */
  308. }
  309. static int altera_uart_verify_port(struct uart_port *port,
  310. struct serial_struct *ser)
  311. {
  312. if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
  313. return -EINVAL;
  314. return 0;
  315. }
  316. #ifdef CONFIG_CONSOLE_POLL
  317. static int altera_uart_poll_get_char(struct uart_port *port)
  318. {
  319. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  320. ALTERA_UART_STATUS_RRDY_MSK))
  321. cpu_relax();
  322. return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
  323. }
  324. static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
  325. {
  326. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  327. ALTERA_UART_STATUS_TRDY_MSK))
  328. cpu_relax();
  329. altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
  330. }
  331. #endif
  332. /*
  333. * Define the basic serial functions we support.
  334. */
  335. static const struct uart_ops altera_uart_ops = {
  336. .tx_empty = altera_uart_tx_empty,
  337. .get_mctrl = altera_uart_get_mctrl,
  338. .set_mctrl = altera_uart_set_mctrl,
  339. .start_tx = altera_uart_start_tx,
  340. .stop_tx = altera_uart_stop_tx,
  341. .stop_rx = altera_uart_stop_rx,
  342. .break_ctl = altera_uart_break_ctl,
  343. .startup = altera_uart_startup,
  344. .shutdown = altera_uart_shutdown,
  345. .set_termios = altera_uart_set_termios,
  346. .type = altera_uart_type,
  347. .request_port = altera_uart_request_port,
  348. .release_port = altera_uart_release_port,
  349. .config_port = altera_uart_config_port,
  350. .verify_port = altera_uart_verify_port,
  351. #ifdef CONFIG_CONSOLE_POLL
  352. .poll_get_char = altera_uart_poll_get_char,
  353. .poll_put_char = altera_uart_poll_put_char,
  354. #endif
  355. };
  356. static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
  357. #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
  358. static void altera_uart_console_putc(struct uart_port *port, int c)
  359. {
  360. while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
  361. ALTERA_UART_STATUS_TRDY_MSK))
  362. cpu_relax();
  363. writel(c, port->membase + ALTERA_UART_TXDATA_REG);
  364. }
  365. static void altera_uart_console_write(struct console *co, const char *s,
  366. unsigned int count)
  367. {
  368. struct uart_port *port = &(altera_uart_ports + co->index)->port;
  369. uart_console_write(port, s, count, altera_uart_console_putc);
  370. }
  371. static int __init altera_uart_console_setup(struct console *co, char *options)
  372. {
  373. struct uart_port *port;
  374. int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
  375. int bits = 8;
  376. int parity = 'n';
  377. int flow = 'n';
  378. if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  379. return -EINVAL;
  380. port = &altera_uart_ports[co->index].port;
  381. if (!port->membase)
  382. return -ENODEV;
  383. if (options)
  384. uart_parse_options(options, &baud, &parity, &bits, &flow);
  385. return uart_set_options(port, co, baud, parity, bits, flow);
  386. }
  387. static struct uart_driver altera_uart_driver;
  388. static struct console altera_uart_console = {
  389. .name = "ttyAL",
  390. .write = altera_uart_console_write,
  391. .device = uart_console_device,
  392. .setup = altera_uart_console_setup,
  393. .flags = CON_PRINTBUFFER,
  394. .index = -1,
  395. .data = &altera_uart_driver,
  396. };
  397. static int __init altera_uart_console_init(void)
  398. {
  399. register_console(&altera_uart_console);
  400. return 0;
  401. }
  402. console_initcall(altera_uart_console_init);
  403. #define ALTERA_UART_CONSOLE (&altera_uart_console)
  404. #else
  405. #define ALTERA_UART_CONSOLE NULL
  406. #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
  407. /*
  408. * Define the altera_uart UART driver structure.
  409. */
  410. static struct uart_driver altera_uart_driver = {
  411. .owner = THIS_MODULE,
  412. .driver_name = DRV_NAME,
  413. .dev_name = "ttyAL",
  414. .major = SERIAL_ALTERA_MAJOR,
  415. .minor = SERIAL_ALTERA_MINOR,
  416. .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
  417. .cons = ALTERA_UART_CONSOLE,
  418. };
  419. static int altera_uart_probe(struct platform_device *pdev)
  420. {
  421. struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
  422. struct uart_port *port;
  423. struct resource *res_mem;
  424. struct resource *res_irq;
  425. int i = pdev->id;
  426. int ret;
  427. /* if id is -1 scan for a free id and use that one */
  428. if (i == -1) {
  429. for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
  430. if (altera_uart_ports[i].port.mapbase == 0)
  431. break;
  432. }
  433. if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
  434. return -EINVAL;
  435. port = &altera_uart_ports[i].port;
  436. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  437. if (res_mem)
  438. port->mapbase = res_mem->start;
  439. else if (platp)
  440. port->mapbase = platp->mapbase;
  441. else
  442. return -EINVAL;
  443. res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  444. if (res_irq)
  445. port->irq = res_irq->start;
  446. else if (platp)
  447. port->irq = platp->irq;
  448. /* Check platform data first so we can override device node data */
  449. if (platp)
  450. port->uartclk = platp->uartclk;
  451. else {
  452. ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
  453. &port->uartclk);
  454. if (ret)
  455. return ret;
  456. }
  457. port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
  458. if (!port->membase)
  459. return -ENOMEM;
  460. if (platp)
  461. port->regshift = platp->bus_shift;
  462. else
  463. port->regshift = 0;
  464. port->line = i;
  465. port->type = PORT_ALTERA_UART;
  466. port->iotype = SERIAL_IO_MEM;
  467. port->ops = &altera_uart_ops;
  468. port->flags = UPF_BOOT_AUTOCONF;
  469. port->dev = &pdev->dev;
  470. platform_set_drvdata(pdev, port);
  471. uart_add_one_port(&altera_uart_driver, port);
  472. return 0;
  473. }
  474. static int altera_uart_remove(struct platform_device *pdev)
  475. {
  476. struct uart_port *port = platform_get_drvdata(pdev);
  477. if (port) {
  478. uart_remove_one_port(&altera_uart_driver, port);
  479. port->mapbase = 0;
  480. }
  481. return 0;
  482. }
  483. #ifdef CONFIG_OF
  484. static const struct of_device_id altera_uart_match[] = {
  485. { .compatible = "ALTR,uart-1.0", },
  486. { .compatible = "altr,uart-1.0", },
  487. {},
  488. };
  489. MODULE_DEVICE_TABLE(of, altera_uart_match);
  490. #endif /* CONFIG_OF */
  491. static struct platform_driver altera_uart_platform_driver = {
  492. .probe = altera_uart_probe,
  493. .remove = altera_uart_remove,
  494. .driver = {
  495. .name = DRV_NAME,
  496. .of_match_table = of_match_ptr(altera_uart_match),
  497. },
  498. };
  499. static int __init altera_uart_init(void)
  500. {
  501. int rc;
  502. rc = uart_register_driver(&altera_uart_driver);
  503. if (rc)
  504. return rc;
  505. rc = platform_driver_register(&altera_uart_platform_driver);
  506. if (rc)
  507. uart_unregister_driver(&altera_uart_driver);
  508. return rc;
  509. }
  510. static void __exit altera_uart_exit(void)
  511. {
  512. platform_driver_unregister(&altera_uart_platform_driver);
  513. uart_unregister_driver(&altera_uart_driver);
  514. }
  515. module_init(altera_uart_init);
  516. module_exit(altera_uart_exit);
  517. MODULE_DESCRIPTION("Altera UART driver");
  518. MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
  519. MODULE_LICENSE("GPL");
  520. MODULE_ALIAS("platform:" DRV_NAME);
  521. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);