commsup.c 59 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc.
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000-2010 Adaptec, Inc.
  9. * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2, or (at your option)
  14. * any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; see the file COPYING. If not, write to
  23. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Module Name:
  26. * commsup.c
  27. *
  28. * Abstract: Contain all routines that are required for FSA host/adapter
  29. * communication.
  30. *
  31. */
  32. #include <linux/kernel.h>
  33. #include <linux/init.h>
  34. #include <linux/types.h>
  35. #include <linux/sched.h>
  36. #include <linux/pci.h>
  37. #include <linux/spinlock.h>
  38. #include <linux/slab.h>
  39. #include <linux/completion.h>
  40. #include <linux/blkdev.h>
  41. #include <linux/delay.h>
  42. #include <linux/kthread.h>
  43. #include <linux/interrupt.h>
  44. #include <linux/semaphore.h>
  45. #include <scsi/scsi.h>
  46. #include <scsi/scsi_host.h>
  47. #include <scsi/scsi_device.h>
  48. #include <scsi/scsi_cmnd.h>
  49. #include "aacraid.h"
  50. /**
  51. * fib_map_alloc - allocate the fib objects
  52. * @dev: Adapter to allocate for
  53. *
  54. * Allocate and map the shared PCI space for the FIB blocks used to
  55. * talk to the Adaptec firmware.
  56. */
  57. static int fib_map_alloc(struct aac_dev *dev)
  58. {
  59. dprintk((KERN_INFO
  60. "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
  61. dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
  62. AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
  63. dev->hw_fib_va = pci_alloc_consistent(dev->pdev,
  64. (dev->max_fib_size + sizeof(struct aac_fib_xporthdr))
  65. * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
  66. &dev->hw_fib_pa);
  67. if (dev->hw_fib_va == NULL)
  68. return -ENOMEM;
  69. return 0;
  70. }
  71. /**
  72. * aac_fib_map_free - free the fib objects
  73. * @dev: Adapter to free
  74. *
  75. * Free the PCI mappings and the memory allocated for FIB blocks
  76. * on this adapter.
  77. */
  78. void aac_fib_map_free(struct aac_dev *dev)
  79. {
  80. if (dev->hw_fib_va && dev->max_fib_size) {
  81. pci_free_consistent(dev->pdev,
  82. (dev->max_fib_size *
  83. (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)),
  84. dev->hw_fib_va, dev->hw_fib_pa);
  85. }
  86. dev->hw_fib_va = NULL;
  87. dev->hw_fib_pa = 0;
  88. }
  89. void aac_fib_vector_assign(struct aac_dev *dev)
  90. {
  91. u32 i = 0;
  92. u32 vector = 1;
  93. struct fib *fibptr = NULL;
  94. for (i = 0, fibptr = &dev->fibs[i];
  95. i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
  96. i++, fibptr++) {
  97. if ((dev->max_msix == 1) ||
  98. (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1)
  99. - dev->vector_cap))) {
  100. fibptr->vector_no = 0;
  101. } else {
  102. fibptr->vector_no = vector;
  103. vector++;
  104. if (vector == dev->max_msix)
  105. vector = 1;
  106. }
  107. }
  108. }
  109. /**
  110. * aac_fib_setup - setup the fibs
  111. * @dev: Adapter to set up
  112. *
  113. * Allocate the PCI space for the fibs, map it and then initialise the
  114. * fib area, the unmapped fib data and also the free list
  115. */
  116. int aac_fib_setup(struct aac_dev * dev)
  117. {
  118. struct fib *fibptr;
  119. struct hw_fib *hw_fib;
  120. dma_addr_t hw_fib_pa;
  121. int i;
  122. while (((i = fib_map_alloc(dev)) == -ENOMEM)
  123. && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
  124. dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
  125. dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
  126. }
  127. if (i<0)
  128. return -ENOMEM;
  129. /* 32 byte alignment for PMC */
  130. hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1);
  131. dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
  132. (hw_fib_pa - dev->hw_fib_pa));
  133. dev->hw_fib_pa = hw_fib_pa;
  134. memset(dev->hw_fib_va, 0,
  135. (dev->max_fib_size + sizeof(struct aac_fib_xporthdr)) *
  136. (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
  137. /* add Xport header */
  138. dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
  139. sizeof(struct aac_fib_xporthdr));
  140. dev->hw_fib_pa += sizeof(struct aac_fib_xporthdr);
  141. hw_fib = dev->hw_fib_va;
  142. hw_fib_pa = dev->hw_fib_pa;
  143. /*
  144. * Initialise the fibs
  145. */
  146. for (i = 0, fibptr = &dev->fibs[i];
  147. i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
  148. i++, fibptr++)
  149. {
  150. fibptr->flags = 0;
  151. fibptr->size = sizeof(struct fib);
  152. fibptr->dev = dev;
  153. fibptr->hw_fib_va = hw_fib;
  154. fibptr->data = (void *) fibptr->hw_fib_va->data;
  155. fibptr->next = fibptr+1; /* Forward chain the fibs */
  156. sema_init(&fibptr->event_wait, 0);
  157. spin_lock_init(&fibptr->event_lock);
  158. hw_fib->header.XferState = cpu_to_le32(0xffffffff);
  159. hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size);
  160. fibptr->hw_fib_pa = hw_fib_pa;
  161. hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
  162. dev->max_fib_size + sizeof(struct aac_fib_xporthdr));
  163. hw_fib_pa = hw_fib_pa +
  164. dev->max_fib_size + sizeof(struct aac_fib_xporthdr);
  165. }
  166. /*
  167. *Assign vector numbers to fibs
  168. */
  169. aac_fib_vector_assign(dev);
  170. /*
  171. * Add the fib chain to the free list
  172. */
  173. dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
  174. /*
  175. * Set 8 fibs aside for management tools
  176. */
  177. dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue];
  178. return 0;
  179. }
  180. /**
  181. * aac_fib_alloc_tag-allocate a fib using tags
  182. * @dev: Adapter to allocate the fib for
  183. *
  184. * Allocate a fib from the adapter fib pool using tags
  185. * from the blk layer.
  186. */
  187. struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd)
  188. {
  189. struct fib *fibptr;
  190. fibptr = &dev->fibs[scmd->request->tag];
  191. /*
  192. * Null out fields that depend on being zero at the start of
  193. * each I/O
  194. */
  195. fibptr->hw_fib_va->header.XferState = 0;
  196. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  197. fibptr->callback_data = NULL;
  198. fibptr->callback = NULL;
  199. return fibptr;
  200. }
  201. /**
  202. * aac_fib_alloc - allocate a fib
  203. * @dev: Adapter to allocate the fib for
  204. *
  205. * Allocate a fib from the adapter fib pool. If the pool is empty we
  206. * return NULL.
  207. */
  208. struct fib *aac_fib_alloc(struct aac_dev *dev)
  209. {
  210. struct fib * fibptr;
  211. unsigned long flags;
  212. spin_lock_irqsave(&dev->fib_lock, flags);
  213. fibptr = dev->free_fib;
  214. if(!fibptr){
  215. spin_unlock_irqrestore(&dev->fib_lock, flags);
  216. return fibptr;
  217. }
  218. dev->free_fib = fibptr->next;
  219. spin_unlock_irqrestore(&dev->fib_lock, flags);
  220. /*
  221. * Set the proper node type code and node byte size
  222. */
  223. fibptr->type = FSAFS_NTC_FIB_CONTEXT;
  224. fibptr->size = sizeof(struct fib);
  225. /*
  226. * Null out fields that depend on being zero at the start of
  227. * each I/O
  228. */
  229. fibptr->hw_fib_va->header.XferState = 0;
  230. fibptr->flags = 0;
  231. fibptr->callback = NULL;
  232. fibptr->callback_data = NULL;
  233. return fibptr;
  234. }
  235. /**
  236. * aac_fib_free - free a fib
  237. * @fibptr: fib to free up
  238. *
  239. * Frees up a fib and places it on the appropriate queue
  240. */
  241. void aac_fib_free(struct fib *fibptr)
  242. {
  243. unsigned long flags;
  244. if (fibptr->done == 2)
  245. return;
  246. spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
  247. if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
  248. aac_config.fib_timeouts++;
  249. if (fibptr->hw_fib_va->header.XferState != 0) {
  250. printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
  251. (void*)fibptr,
  252. le32_to_cpu(fibptr->hw_fib_va->header.XferState));
  253. }
  254. fibptr->next = fibptr->dev->free_fib;
  255. fibptr->dev->free_fib = fibptr;
  256. spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
  257. }
  258. /**
  259. * aac_fib_init - initialise a fib
  260. * @fibptr: The fib to initialize
  261. *
  262. * Set up the generic fib fields ready for use
  263. */
  264. void aac_fib_init(struct fib *fibptr)
  265. {
  266. struct hw_fib *hw_fib = fibptr->hw_fib_va;
  267. memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr));
  268. hw_fib->header.StructType = FIB_MAGIC;
  269. hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
  270. hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
  271. hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
  272. hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
  273. }
  274. /**
  275. * fib_deallocate - deallocate a fib
  276. * @fibptr: fib to deallocate
  277. *
  278. * Will deallocate and return to the free pool the FIB pointed to by the
  279. * caller.
  280. */
  281. static void fib_dealloc(struct fib * fibptr)
  282. {
  283. struct hw_fib *hw_fib = fibptr->hw_fib_va;
  284. hw_fib->header.XferState = 0;
  285. }
  286. /*
  287. * Commuication primitives define and support the queuing method we use to
  288. * support host to adapter commuication. All queue accesses happen through
  289. * these routines and are the only routines which have a knowledge of the
  290. * how these queues are implemented.
  291. */
  292. /**
  293. * aac_get_entry - get a queue entry
  294. * @dev: Adapter
  295. * @qid: Queue Number
  296. * @entry: Entry return
  297. * @index: Index return
  298. * @nonotify: notification control
  299. *
  300. * With a priority the routine returns a queue entry if the queue has free entries. If the queue
  301. * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
  302. * returned.
  303. */
  304. static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
  305. {
  306. struct aac_queue * q;
  307. unsigned long idx;
  308. /*
  309. * All of the queues wrap when they reach the end, so we check
  310. * to see if they have reached the end and if they have we just
  311. * set the index back to zero. This is a wrap. You could or off
  312. * the high bits in all updates but this is a bit faster I think.
  313. */
  314. q = &dev->queues->queue[qid];
  315. idx = *index = le32_to_cpu(*(q->headers.producer));
  316. /* Interrupt Moderation, only interrupt for first two entries */
  317. if (idx != le32_to_cpu(*(q->headers.consumer))) {
  318. if (--idx == 0) {
  319. if (qid == AdapNormCmdQueue)
  320. idx = ADAP_NORM_CMD_ENTRIES;
  321. else
  322. idx = ADAP_NORM_RESP_ENTRIES;
  323. }
  324. if (idx != le32_to_cpu(*(q->headers.consumer)))
  325. *nonotify = 1;
  326. }
  327. if (qid == AdapNormCmdQueue) {
  328. if (*index >= ADAP_NORM_CMD_ENTRIES)
  329. *index = 0; /* Wrap to front of the Producer Queue. */
  330. } else {
  331. if (*index >= ADAP_NORM_RESP_ENTRIES)
  332. *index = 0; /* Wrap to front of the Producer Queue. */
  333. }
  334. /* Queue is full */
  335. if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
  336. printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
  337. qid, atomic_read(&q->numpending));
  338. return 0;
  339. } else {
  340. *entry = q->base + *index;
  341. return 1;
  342. }
  343. }
  344. /**
  345. * aac_queue_get - get the next free QE
  346. * @dev: Adapter
  347. * @index: Returned index
  348. * @priority: Priority of fib
  349. * @fib: Fib to associate with the queue entry
  350. * @wait: Wait if queue full
  351. * @fibptr: Driver fib object to go with fib
  352. * @nonotify: Don't notify the adapter
  353. *
  354. * Gets the next free QE off the requested priorty adapter command
  355. * queue and associates the Fib with the QE. The QE represented by
  356. * index is ready to insert on the queue when this routine returns
  357. * success.
  358. */
  359. int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
  360. {
  361. struct aac_entry * entry = NULL;
  362. int map = 0;
  363. if (qid == AdapNormCmdQueue) {
  364. /* if no entries wait for some if caller wants to */
  365. while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
  366. printk(KERN_ERR "GetEntries failed\n");
  367. }
  368. /*
  369. * Setup queue entry with a command, status and fib mapped
  370. */
  371. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  372. map = 1;
  373. } else {
  374. while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
  375. /* if no entries wait for some if caller wants to */
  376. }
  377. /*
  378. * Setup queue entry with command, status and fib mapped
  379. */
  380. entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
  381. entry->addr = hw_fib->header.SenderFibAddress;
  382. /* Restore adapters pointer to the FIB */
  383. hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
  384. map = 0;
  385. }
  386. /*
  387. * If MapFib is true than we need to map the Fib and put pointers
  388. * in the queue entry.
  389. */
  390. if (map)
  391. entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
  392. return 0;
  393. }
  394. /*
  395. * Define the highest level of host to adapter communication routines.
  396. * These routines will support host to adapter FS commuication. These
  397. * routines have no knowledge of the commuication method used. This level
  398. * sends and receives FIBs. This level has no knowledge of how these FIBs
  399. * get passed back and forth.
  400. */
  401. /**
  402. * aac_fib_send - send a fib to the adapter
  403. * @command: Command to send
  404. * @fibptr: The fib
  405. * @size: Size of fib data area
  406. * @priority: Priority of Fib
  407. * @wait: Async/sync select
  408. * @reply: True if a reply is wanted
  409. * @callback: Called with reply
  410. * @callback_data: Passed to callback
  411. *
  412. * Sends the requested FIB to the adapter and optionally will wait for a
  413. * response FIB. If the caller does not wish to wait for a response than
  414. * an event to wait on must be supplied. This event will be set when a
  415. * response FIB is received from the adapter.
  416. */
  417. int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
  418. int priority, int wait, int reply, fib_callback callback,
  419. void *callback_data)
  420. {
  421. struct aac_dev * dev = fibptr->dev;
  422. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  423. unsigned long flags = 0;
  424. unsigned long mflags = 0;
  425. unsigned long sflags = 0;
  426. if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
  427. return -EBUSY;
  428. /*
  429. * There are 5 cases with the wait and response requested flags.
  430. * The only invalid cases are if the caller requests to wait and
  431. * does not request a response and if the caller does not want a
  432. * response and the Fib is not allocated from pool. If a response
  433. * is not requesed the Fib will just be deallocaed by the DPC
  434. * routine when the response comes back from the adapter. No
  435. * further processing will be done besides deleting the Fib. We
  436. * will have a debug mode where the adapter can notify the host
  437. * it had a problem and the host can log that fact.
  438. */
  439. fibptr->flags = 0;
  440. if (wait && !reply) {
  441. return -EINVAL;
  442. } else if (!wait && reply) {
  443. hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
  444. FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
  445. } else if (!wait && !reply) {
  446. hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
  447. FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
  448. } else if (wait && reply) {
  449. hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
  450. FIB_COUNTER_INCREMENT(aac_config.NormalSent);
  451. }
  452. /*
  453. * Map the fib into 32bits by using the fib number
  454. */
  455. hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
  456. hw_fib->header.Handle = (u32)(fibptr - dev->fibs) + 1;
  457. /*
  458. * Set FIB state to indicate where it came from and if we want a
  459. * response from the adapter. Also load the command from the
  460. * caller.
  461. *
  462. * Map the hw fib pointer as a 32bit value
  463. */
  464. hw_fib->header.Command = cpu_to_le16(command);
  465. hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
  466. /*
  467. * Set the size of the Fib we want to send to the adapter
  468. */
  469. hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
  470. if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
  471. return -EMSGSIZE;
  472. }
  473. /*
  474. * Get a queue entry connect the FIB to it and send an notify
  475. * the adapter a command is ready.
  476. */
  477. hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
  478. /*
  479. * Fill in the Callback and CallbackContext if we are not
  480. * going to wait.
  481. */
  482. if (!wait) {
  483. fibptr->callback = callback;
  484. fibptr->callback_data = callback_data;
  485. fibptr->flags = FIB_CONTEXT_FLAG;
  486. }
  487. fibptr->done = 0;
  488. FIB_COUNTER_INCREMENT(aac_config.FibsSent);
  489. dprintk((KERN_DEBUG "Fib contents:.\n"));
  490. dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
  491. dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
  492. dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
  493. dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
  494. dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
  495. dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
  496. if (!dev->queues)
  497. return -EBUSY;
  498. if (wait) {
  499. spin_lock_irqsave(&dev->manage_lock, mflags);
  500. if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
  501. printk(KERN_INFO "No management Fibs Available:%d\n",
  502. dev->management_fib_count);
  503. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  504. return -EBUSY;
  505. }
  506. dev->management_fib_count++;
  507. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  508. spin_lock_irqsave(&fibptr->event_lock, flags);
  509. }
  510. if (dev->sync_mode) {
  511. if (wait)
  512. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  513. spin_lock_irqsave(&dev->sync_lock, sflags);
  514. if (dev->sync_fib) {
  515. list_add_tail(&fibptr->fiblink, &dev->sync_fib_list);
  516. spin_unlock_irqrestore(&dev->sync_lock, sflags);
  517. } else {
  518. dev->sync_fib = fibptr;
  519. spin_unlock_irqrestore(&dev->sync_lock, sflags);
  520. aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
  521. (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0,
  522. NULL, NULL, NULL, NULL, NULL);
  523. }
  524. if (wait) {
  525. fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
  526. if (down_interruptible(&fibptr->event_wait)) {
  527. fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT;
  528. return -EFAULT;
  529. }
  530. return 0;
  531. }
  532. return -EINPROGRESS;
  533. }
  534. if (aac_adapter_deliver(fibptr) != 0) {
  535. printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
  536. if (wait) {
  537. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  538. spin_lock_irqsave(&dev->manage_lock, mflags);
  539. dev->management_fib_count--;
  540. spin_unlock_irqrestore(&dev->manage_lock, mflags);
  541. }
  542. return -EBUSY;
  543. }
  544. /*
  545. * If the caller wanted us to wait for response wait now.
  546. */
  547. if (wait) {
  548. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  549. /* Only set for first known interruptable command */
  550. if (wait < 0) {
  551. /*
  552. * *VERY* Dangerous to time out a command, the
  553. * assumption is made that we have no hope of
  554. * functioning because an interrupt routing or other
  555. * hardware failure has occurred.
  556. */
  557. unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */
  558. while (down_trylock(&fibptr->event_wait)) {
  559. int blink;
  560. if (time_is_before_eq_jiffies(timeout)) {
  561. struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
  562. atomic_dec(&q->numpending);
  563. if (wait == -1) {
  564. printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
  565. "Usually a result of a PCI interrupt routing problem;\n"
  566. "update mother board BIOS or consider utilizing one of\n"
  567. "the SAFE mode kernel options (acpi, apic etc)\n");
  568. }
  569. return -ETIMEDOUT;
  570. }
  571. if ((blink = aac_adapter_check_health(dev)) > 0) {
  572. if (wait == -1) {
  573. printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
  574. "Usually a result of a serious unrecoverable hardware problem\n",
  575. blink);
  576. }
  577. return -EFAULT;
  578. }
  579. /*
  580. * Allow other processes / CPUS to use core
  581. */
  582. schedule();
  583. }
  584. } else if (down_interruptible(&fibptr->event_wait)) {
  585. /* Do nothing ... satisfy
  586. * down_interruptible must_check */
  587. }
  588. spin_lock_irqsave(&fibptr->event_lock, flags);
  589. if (fibptr->done == 0) {
  590. fibptr->done = 2; /* Tell interrupt we aborted */
  591. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  592. return -ERESTARTSYS;
  593. }
  594. spin_unlock_irqrestore(&fibptr->event_lock, flags);
  595. BUG_ON(fibptr->done == 0);
  596. if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
  597. return -ETIMEDOUT;
  598. return 0;
  599. }
  600. /*
  601. * If the user does not want a response than return success otherwise
  602. * return pending
  603. */
  604. if (reply)
  605. return -EINPROGRESS;
  606. else
  607. return 0;
  608. }
  609. /**
  610. * aac_consumer_get - get the top of the queue
  611. * @dev: Adapter
  612. * @q: Queue
  613. * @entry: Return entry
  614. *
  615. * Will return a pointer to the entry on the top of the queue requested that
  616. * we are a consumer of, and return the address of the queue entry. It does
  617. * not change the state of the queue.
  618. */
  619. int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
  620. {
  621. u32 index;
  622. int status;
  623. if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
  624. status = 0;
  625. } else {
  626. /*
  627. * The consumer index must be wrapped if we have reached
  628. * the end of the queue, else we just use the entry
  629. * pointed to by the header index
  630. */
  631. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  632. index = 0;
  633. else
  634. index = le32_to_cpu(*q->headers.consumer);
  635. *entry = q->base + index;
  636. status = 1;
  637. }
  638. return(status);
  639. }
  640. /**
  641. * aac_consumer_free - free consumer entry
  642. * @dev: Adapter
  643. * @q: Queue
  644. * @qid: Queue ident
  645. *
  646. * Frees up the current top of the queue we are a consumer of. If the
  647. * queue was full notify the producer that the queue is no longer full.
  648. */
  649. void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
  650. {
  651. int wasfull = 0;
  652. u32 notify;
  653. if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
  654. wasfull = 1;
  655. if (le32_to_cpu(*q->headers.consumer) >= q->entries)
  656. *q->headers.consumer = cpu_to_le32(1);
  657. else
  658. le32_add_cpu(q->headers.consumer, 1);
  659. if (wasfull) {
  660. switch (qid) {
  661. case HostNormCmdQueue:
  662. notify = HostNormCmdNotFull;
  663. break;
  664. case HostNormRespQueue:
  665. notify = HostNormRespNotFull;
  666. break;
  667. default:
  668. BUG();
  669. return;
  670. }
  671. aac_adapter_notify(dev, notify);
  672. }
  673. }
  674. /**
  675. * aac_fib_adapter_complete - complete adapter issued fib
  676. * @fibptr: fib to complete
  677. * @size: size of fib
  678. *
  679. * Will do all necessary work to complete a FIB that was sent from
  680. * the adapter.
  681. */
  682. int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
  683. {
  684. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  685. struct aac_dev * dev = fibptr->dev;
  686. struct aac_queue * q;
  687. unsigned long nointr = 0;
  688. unsigned long qflags;
  689. if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
  690. dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
  691. kfree(hw_fib);
  692. return 0;
  693. }
  694. if (hw_fib->header.XferState == 0) {
  695. if (dev->comm_interface == AAC_COMM_MESSAGE)
  696. kfree(hw_fib);
  697. return 0;
  698. }
  699. /*
  700. * If we plan to do anything check the structure type first.
  701. */
  702. if (hw_fib->header.StructType != FIB_MAGIC &&
  703. hw_fib->header.StructType != FIB_MAGIC2 &&
  704. hw_fib->header.StructType != FIB_MAGIC2_64) {
  705. if (dev->comm_interface == AAC_COMM_MESSAGE)
  706. kfree(hw_fib);
  707. return -EINVAL;
  708. }
  709. /*
  710. * This block handles the case where the adapter had sent us a
  711. * command and we have finished processing the command. We
  712. * call completeFib when we are done processing the command
  713. * and want to send a response back to the adapter. This will
  714. * send the completed cdb to the adapter.
  715. */
  716. if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
  717. if (dev->comm_interface == AAC_COMM_MESSAGE) {
  718. kfree (hw_fib);
  719. } else {
  720. u32 index;
  721. hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
  722. if (size) {
  723. size += sizeof(struct aac_fibhdr);
  724. if (size > le16_to_cpu(hw_fib->header.SenderSize))
  725. return -EMSGSIZE;
  726. hw_fib->header.Size = cpu_to_le16(size);
  727. }
  728. q = &dev->queues->queue[AdapNormRespQueue];
  729. spin_lock_irqsave(q->lock, qflags);
  730. aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
  731. *(q->headers.producer) = cpu_to_le32(index + 1);
  732. spin_unlock_irqrestore(q->lock, qflags);
  733. if (!(nointr & (int)aac_config.irq_mod))
  734. aac_adapter_notify(dev, AdapNormRespQueue);
  735. }
  736. } else {
  737. printk(KERN_WARNING "aac_fib_adapter_complete: "
  738. "Unknown xferstate detected.\n");
  739. BUG();
  740. }
  741. return 0;
  742. }
  743. /**
  744. * aac_fib_complete - fib completion handler
  745. * @fib: FIB to complete
  746. *
  747. * Will do all necessary work to complete a FIB.
  748. */
  749. int aac_fib_complete(struct fib *fibptr)
  750. {
  751. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  752. /*
  753. * Check for a fib which has already been completed
  754. */
  755. if (hw_fib->header.XferState == 0)
  756. return 0;
  757. /*
  758. * If we plan to do anything check the structure type first.
  759. */
  760. if (hw_fib->header.StructType != FIB_MAGIC &&
  761. hw_fib->header.StructType != FIB_MAGIC2 &&
  762. hw_fib->header.StructType != FIB_MAGIC2_64)
  763. return -EINVAL;
  764. /*
  765. * This block completes a cdb which orginated on the host and we
  766. * just need to deallocate the cdb or reinit it. At this point the
  767. * command is complete that we had sent to the adapter and this
  768. * cdb could be reused.
  769. */
  770. if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
  771. (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
  772. {
  773. fib_dealloc(fibptr);
  774. }
  775. else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
  776. {
  777. /*
  778. * This handles the case when the host has aborted the I/O
  779. * to the adapter because the adapter is not responding
  780. */
  781. fib_dealloc(fibptr);
  782. } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
  783. fib_dealloc(fibptr);
  784. } else {
  785. BUG();
  786. }
  787. return 0;
  788. }
  789. /**
  790. * aac_printf - handle printf from firmware
  791. * @dev: Adapter
  792. * @val: Message info
  793. *
  794. * Print a message passed to us by the controller firmware on the
  795. * Adaptec board
  796. */
  797. void aac_printf(struct aac_dev *dev, u32 val)
  798. {
  799. char *cp = dev->printfbuf;
  800. if (dev->printf_enabled)
  801. {
  802. int length = val & 0xffff;
  803. int level = (val >> 16) & 0xffff;
  804. /*
  805. * The size of the printfbuf is set in port.c
  806. * There is no variable or define for it
  807. */
  808. if (length > 255)
  809. length = 255;
  810. if (cp[length] != 0)
  811. cp[length] = 0;
  812. if (level == LOG_AAC_HIGH_ERROR)
  813. printk(KERN_WARNING "%s:%s", dev->name, cp);
  814. else
  815. printk(KERN_INFO "%s:%s", dev->name, cp);
  816. }
  817. memset(cp, 0, 256);
  818. }
  819. static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index)
  820. {
  821. return le32_to_cpu(((__le32 *)aifcmd->data)[index]);
  822. }
  823. static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd)
  824. {
  825. switch (aac_aif_data(aifcmd, 1)) {
  826. case AifBuCacheDataLoss:
  827. if (aac_aif_data(aifcmd, 2))
  828. dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n",
  829. aac_aif_data(aifcmd, 2));
  830. else
  831. dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n");
  832. break;
  833. case AifBuCacheDataRecover:
  834. if (aac_aif_data(aifcmd, 2))
  835. dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n",
  836. aac_aif_data(aifcmd, 2));
  837. else
  838. dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n");
  839. break;
  840. }
  841. }
  842. /**
  843. * aac_handle_aif - Handle a message from the firmware
  844. * @dev: Which adapter this fib is from
  845. * @fibptr: Pointer to fibptr from adapter
  846. *
  847. * This routine handles a driver notify fib from the adapter and
  848. * dispatches it to the appropriate routine for handling.
  849. */
  850. #define AIF_SNIFF_TIMEOUT (500*HZ)
  851. static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
  852. {
  853. struct hw_fib * hw_fib = fibptr->hw_fib_va;
  854. struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
  855. u32 channel, id, lun, container;
  856. struct scsi_device *device;
  857. enum {
  858. NOTHING,
  859. DELETE,
  860. ADD,
  861. CHANGE
  862. } device_config_needed = NOTHING;
  863. /* Sniff for container changes */
  864. if (!dev || !dev->fsa_dev)
  865. return;
  866. container = channel = id = lun = (u32)-1;
  867. /*
  868. * We have set this up to try and minimize the number of
  869. * re-configures that take place. As a result of this when
  870. * certain AIF's come in we will set a flag waiting for another
  871. * type of AIF before setting the re-config flag.
  872. */
  873. switch (le32_to_cpu(aifcmd->command)) {
  874. case AifCmdDriverNotify:
  875. switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
  876. case AifRawDeviceRemove:
  877. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  878. if ((container >> 28)) {
  879. container = (u32)-1;
  880. break;
  881. }
  882. channel = (container >> 24) & 0xF;
  883. if (channel >= dev->maximum_num_channels) {
  884. container = (u32)-1;
  885. break;
  886. }
  887. id = container & 0xFFFF;
  888. if (id >= dev->maximum_num_physicals) {
  889. container = (u32)-1;
  890. break;
  891. }
  892. lun = (container >> 16) & 0xFF;
  893. container = (u32)-1;
  894. channel = aac_phys_to_logical(channel);
  895. device_config_needed =
  896. (((__le32 *)aifcmd->data)[0] ==
  897. cpu_to_le32(AifRawDeviceRemove)) ? DELETE : ADD;
  898. if (device_config_needed == ADD) {
  899. device = scsi_device_lookup(
  900. dev->scsi_host_ptr,
  901. channel, id, lun);
  902. if (device) {
  903. scsi_remove_device(device);
  904. scsi_device_put(device);
  905. }
  906. }
  907. break;
  908. /*
  909. * Morph or Expand complete
  910. */
  911. case AifDenMorphComplete:
  912. case AifDenVolumeExtendComplete:
  913. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  914. if (container >= dev->maximum_num_containers)
  915. break;
  916. /*
  917. * Find the scsi_device associated with the SCSI
  918. * address. Make sure we have the right array, and if
  919. * so set the flag to initiate a new re-config once we
  920. * see an AifEnConfigChange AIF come through.
  921. */
  922. if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
  923. device = scsi_device_lookup(dev->scsi_host_ptr,
  924. CONTAINER_TO_CHANNEL(container),
  925. CONTAINER_TO_ID(container),
  926. CONTAINER_TO_LUN(container));
  927. if (device) {
  928. dev->fsa_dev[container].config_needed = CHANGE;
  929. dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
  930. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  931. scsi_device_put(device);
  932. }
  933. }
  934. }
  935. /*
  936. * If we are waiting on something and this happens to be
  937. * that thing then set the re-configure flag.
  938. */
  939. if (container != (u32)-1) {
  940. if (container >= dev->maximum_num_containers)
  941. break;
  942. if ((dev->fsa_dev[container].config_waiting_on ==
  943. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  944. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  945. dev->fsa_dev[container].config_waiting_on = 0;
  946. } else for (container = 0;
  947. container < dev->maximum_num_containers; ++container) {
  948. if ((dev->fsa_dev[container].config_waiting_on ==
  949. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  950. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  951. dev->fsa_dev[container].config_waiting_on = 0;
  952. }
  953. break;
  954. case AifCmdEventNotify:
  955. switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
  956. case AifEnBatteryEvent:
  957. dev->cache_protected =
  958. (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3));
  959. break;
  960. /*
  961. * Add an Array.
  962. */
  963. case AifEnAddContainer:
  964. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  965. if (container >= dev->maximum_num_containers)
  966. break;
  967. dev->fsa_dev[container].config_needed = ADD;
  968. dev->fsa_dev[container].config_waiting_on =
  969. AifEnConfigChange;
  970. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  971. break;
  972. /*
  973. * Delete an Array.
  974. */
  975. case AifEnDeleteContainer:
  976. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  977. if (container >= dev->maximum_num_containers)
  978. break;
  979. dev->fsa_dev[container].config_needed = DELETE;
  980. dev->fsa_dev[container].config_waiting_on =
  981. AifEnConfigChange;
  982. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  983. break;
  984. /*
  985. * Container change detected. If we currently are not
  986. * waiting on something else, setup to wait on a Config Change.
  987. */
  988. case AifEnContainerChange:
  989. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  990. if (container >= dev->maximum_num_containers)
  991. break;
  992. if (dev->fsa_dev[container].config_waiting_on &&
  993. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  994. break;
  995. dev->fsa_dev[container].config_needed = CHANGE;
  996. dev->fsa_dev[container].config_waiting_on =
  997. AifEnConfigChange;
  998. dev->fsa_dev[container].config_waiting_stamp = jiffies;
  999. break;
  1000. case AifEnConfigChange:
  1001. break;
  1002. case AifEnAddJBOD:
  1003. case AifEnDeleteJBOD:
  1004. container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
  1005. if ((container >> 28)) {
  1006. container = (u32)-1;
  1007. break;
  1008. }
  1009. channel = (container >> 24) & 0xF;
  1010. if (channel >= dev->maximum_num_channels) {
  1011. container = (u32)-1;
  1012. break;
  1013. }
  1014. id = container & 0xFFFF;
  1015. if (id >= dev->maximum_num_physicals) {
  1016. container = (u32)-1;
  1017. break;
  1018. }
  1019. lun = (container >> 16) & 0xFF;
  1020. container = (u32)-1;
  1021. channel = aac_phys_to_logical(channel);
  1022. device_config_needed =
  1023. (((__le32 *)aifcmd->data)[0] ==
  1024. cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE;
  1025. if (device_config_needed == ADD) {
  1026. device = scsi_device_lookup(dev->scsi_host_ptr,
  1027. channel,
  1028. id,
  1029. lun);
  1030. if (device) {
  1031. scsi_remove_device(device);
  1032. scsi_device_put(device);
  1033. }
  1034. }
  1035. break;
  1036. case AifEnEnclosureManagement:
  1037. /*
  1038. * If in JBOD mode, automatic exposure of new
  1039. * physical target to be suppressed until configured.
  1040. */
  1041. if (dev->jbod)
  1042. break;
  1043. switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
  1044. case EM_DRIVE_INSERTION:
  1045. case EM_DRIVE_REMOVAL:
  1046. case EM_SES_DRIVE_INSERTION:
  1047. case EM_SES_DRIVE_REMOVAL:
  1048. container = le32_to_cpu(
  1049. ((__le32 *)aifcmd->data)[2]);
  1050. if ((container >> 28)) {
  1051. container = (u32)-1;
  1052. break;
  1053. }
  1054. channel = (container >> 24) & 0xF;
  1055. if (channel >= dev->maximum_num_channels) {
  1056. container = (u32)-1;
  1057. break;
  1058. }
  1059. id = container & 0xFFFF;
  1060. lun = (container >> 16) & 0xFF;
  1061. container = (u32)-1;
  1062. if (id >= dev->maximum_num_physicals) {
  1063. /* legacy dev_t ? */
  1064. if ((0x2000 <= id) || lun || channel ||
  1065. ((channel = (id >> 7) & 0x3F) >=
  1066. dev->maximum_num_channels))
  1067. break;
  1068. lun = (id >> 4) & 7;
  1069. id &= 0xF;
  1070. }
  1071. channel = aac_phys_to_logical(channel);
  1072. device_config_needed =
  1073. ((((__le32 *)aifcmd->data)[3]
  1074. == cpu_to_le32(EM_DRIVE_INSERTION)) ||
  1075. (((__le32 *)aifcmd->data)[3]
  1076. == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ?
  1077. ADD : DELETE;
  1078. break;
  1079. }
  1080. case AifBuManagerEvent:
  1081. aac_handle_aif_bu(dev, aifcmd);
  1082. break;
  1083. }
  1084. /*
  1085. * If we are waiting on something and this happens to be
  1086. * that thing then set the re-configure flag.
  1087. */
  1088. if (container != (u32)-1) {
  1089. if (container >= dev->maximum_num_containers)
  1090. break;
  1091. if ((dev->fsa_dev[container].config_waiting_on ==
  1092. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  1093. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1094. dev->fsa_dev[container].config_waiting_on = 0;
  1095. } else for (container = 0;
  1096. container < dev->maximum_num_containers; ++container) {
  1097. if ((dev->fsa_dev[container].config_waiting_on ==
  1098. le32_to_cpu(*(__le32 *)aifcmd->data)) &&
  1099. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
  1100. dev->fsa_dev[container].config_waiting_on = 0;
  1101. }
  1102. break;
  1103. case AifCmdJobProgress:
  1104. /*
  1105. * These are job progress AIF's. When a Clear is being
  1106. * done on a container it is initially created then hidden from
  1107. * the OS. When the clear completes we don't get a config
  1108. * change so we monitor the job status complete on a clear then
  1109. * wait for a container change.
  1110. */
  1111. if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
  1112. (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] ||
  1113. ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) {
  1114. for (container = 0;
  1115. container < dev->maximum_num_containers;
  1116. ++container) {
  1117. /*
  1118. * Stomp on all config sequencing for all
  1119. * containers?
  1120. */
  1121. dev->fsa_dev[container].config_waiting_on =
  1122. AifEnContainerChange;
  1123. dev->fsa_dev[container].config_needed = ADD;
  1124. dev->fsa_dev[container].config_waiting_stamp =
  1125. jiffies;
  1126. }
  1127. }
  1128. if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
  1129. ((__le32 *)aifcmd->data)[6] == 0 &&
  1130. ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) {
  1131. for (container = 0;
  1132. container < dev->maximum_num_containers;
  1133. ++container) {
  1134. /*
  1135. * Stomp on all config sequencing for all
  1136. * containers?
  1137. */
  1138. dev->fsa_dev[container].config_waiting_on =
  1139. AifEnContainerChange;
  1140. dev->fsa_dev[container].config_needed = DELETE;
  1141. dev->fsa_dev[container].config_waiting_stamp =
  1142. jiffies;
  1143. }
  1144. }
  1145. break;
  1146. }
  1147. container = 0;
  1148. retry_next:
  1149. if (device_config_needed == NOTHING)
  1150. for (; container < dev->maximum_num_containers; ++container) {
  1151. if ((dev->fsa_dev[container].config_waiting_on == 0) &&
  1152. (dev->fsa_dev[container].config_needed != NOTHING) &&
  1153. time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
  1154. device_config_needed =
  1155. dev->fsa_dev[container].config_needed;
  1156. dev->fsa_dev[container].config_needed = NOTHING;
  1157. channel = CONTAINER_TO_CHANNEL(container);
  1158. id = CONTAINER_TO_ID(container);
  1159. lun = CONTAINER_TO_LUN(container);
  1160. break;
  1161. }
  1162. }
  1163. if (device_config_needed == NOTHING)
  1164. return;
  1165. /*
  1166. * If we decided that a re-configuration needs to be done,
  1167. * schedule it here on the way out the door, please close the door
  1168. * behind you.
  1169. */
  1170. /*
  1171. * Find the scsi_device associated with the SCSI address,
  1172. * and mark it as changed, invalidating the cache. This deals
  1173. * with changes to existing device IDs.
  1174. */
  1175. if (!dev || !dev->scsi_host_ptr)
  1176. return;
  1177. /*
  1178. * force reload of disk info via aac_probe_container
  1179. */
  1180. if ((channel == CONTAINER_CHANNEL) &&
  1181. (device_config_needed != NOTHING)) {
  1182. if (dev->fsa_dev[container].valid == 1)
  1183. dev->fsa_dev[container].valid = 2;
  1184. aac_probe_container(dev, container);
  1185. }
  1186. device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun);
  1187. if (device) {
  1188. switch (device_config_needed) {
  1189. case DELETE:
  1190. #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
  1191. scsi_remove_device(device);
  1192. #else
  1193. if (scsi_device_online(device)) {
  1194. scsi_device_set_state(device, SDEV_OFFLINE);
  1195. sdev_printk(KERN_INFO, device,
  1196. "Device offlined - %s\n",
  1197. (channel == CONTAINER_CHANNEL) ?
  1198. "array deleted" :
  1199. "enclosure services event");
  1200. }
  1201. #endif
  1202. break;
  1203. case ADD:
  1204. if (!scsi_device_online(device)) {
  1205. sdev_printk(KERN_INFO, device,
  1206. "Device online - %s\n",
  1207. (channel == CONTAINER_CHANNEL) ?
  1208. "array created" :
  1209. "enclosure services event");
  1210. scsi_device_set_state(device, SDEV_RUNNING);
  1211. }
  1212. /* FALLTHRU */
  1213. case CHANGE:
  1214. if ((channel == CONTAINER_CHANNEL)
  1215. && (!dev->fsa_dev[container].valid)) {
  1216. #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
  1217. scsi_remove_device(device);
  1218. #else
  1219. if (!scsi_device_online(device))
  1220. break;
  1221. scsi_device_set_state(device, SDEV_OFFLINE);
  1222. sdev_printk(KERN_INFO, device,
  1223. "Device offlined - %s\n",
  1224. "array failed");
  1225. #endif
  1226. break;
  1227. }
  1228. scsi_rescan_device(&device->sdev_gendev);
  1229. default:
  1230. break;
  1231. }
  1232. scsi_device_put(device);
  1233. device_config_needed = NOTHING;
  1234. }
  1235. if (device_config_needed == ADD)
  1236. scsi_add_device(dev->scsi_host_ptr, channel, id, lun);
  1237. if (channel == CONTAINER_CHANNEL) {
  1238. container++;
  1239. device_config_needed = NOTHING;
  1240. goto retry_next;
  1241. }
  1242. }
  1243. static int _aac_reset_adapter(struct aac_dev *aac, int forced)
  1244. {
  1245. int index, quirks;
  1246. int retval;
  1247. struct Scsi_Host *host;
  1248. struct scsi_device *dev;
  1249. struct scsi_cmnd *command;
  1250. struct scsi_cmnd *command_list;
  1251. int jafo = 0;
  1252. /*
  1253. * Assumptions:
  1254. * - host is locked, unless called by the aacraid thread.
  1255. * (a matter of convenience, due to legacy issues surrounding
  1256. * eh_host_adapter_reset).
  1257. * - in_reset is asserted, so no new i/o is getting to the
  1258. * card.
  1259. * - The card is dead, or will be very shortly ;-/ so no new
  1260. * commands are completing in the interrupt service.
  1261. */
  1262. host = aac->scsi_host_ptr;
  1263. scsi_block_requests(host);
  1264. aac_adapter_disable_int(aac);
  1265. if (aac->thread && aac->thread->pid != current->pid) {
  1266. spin_unlock_irq(host->host_lock);
  1267. kthread_stop(aac->thread);
  1268. aac->thread = NULL;
  1269. jafo = 1;
  1270. }
  1271. /*
  1272. * If a positive health, means in a known DEAD PANIC
  1273. * state and the adapter could be reset to `try again'.
  1274. */
  1275. retval = aac_adapter_restart(aac, forced ? 0 : aac_adapter_check_health(aac));
  1276. if (retval)
  1277. goto out;
  1278. /*
  1279. * Loop through the fibs, close the synchronous FIBS
  1280. */
  1281. for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) {
  1282. struct fib *fib = &aac->fibs[index];
  1283. if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) &&
  1284. (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) {
  1285. unsigned long flagv;
  1286. spin_lock_irqsave(&fib->event_lock, flagv);
  1287. up(&fib->event_wait);
  1288. spin_unlock_irqrestore(&fib->event_lock, flagv);
  1289. schedule();
  1290. retval = 0;
  1291. }
  1292. }
  1293. /* Give some extra time for ioctls to complete. */
  1294. if (retval == 0)
  1295. ssleep(2);
  1296. index = aac->cardtype;
  1297. /*
  1298. * Re-initialize the adapter, first free resources, then carefully
  1299. * apply the initialization sequence to come back again. Only risk
  1300. * is a change in Firmware dropping cache, it is assumed the caller
  1301. * will ensure that i/o is queisced and the card is flushed in that
  1302. * case.
  1303. */
  1304. aac_free_irq(aac);
  1305. aac_fib_map_free(aac);
  1306. pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
  1307. aac->comm_addr = NULL;
  1308. aac->comm_phys = 0;
  1309. kfree(aac->queues);
  1310. aac->queues = NULL;
  1311. kfree(aac->fsa_dev);
  1312. aac->fsa_dev = NULL;
  1313. quirks = aac_get_driver_ident(index)->quirks;
  1314. if (quirks & AAC_QUIRK_31BIT) {
  1315. if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(31)))) ||
  1316. ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(31)))))
  1317. goto out;
  1318. } else {
  1319. if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32)))) ||
  1320. ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(32)))))
  1321. goto out;
  1322. }
  1323. if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
  1324. goto out;
  1325. if (quirks & AAC_QUIRK_31BIT)
  1326. if ((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32))))
  1327. goto out;
  1328. if (jafo) {
  1329. aac->thread = kthread_run(aac_command_thread, aac, "%s",
  1330. aac->name);
  1331. if (IS_ERR(aac->thread)) {
  1332. retval = PTR_ERR(aac->thread);
  1333. aac->thread = NULL;
  1334. goto out;
  1335. }
  1336. }
  1337. (void)aac_get_adapter_info(aac);
  1338. if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
  1339. host->sg_tablesize = 34;
  1340. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1341. }
  1342. if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
  1343. host->sg_tablesize = 17;
  1344. host->max_sectors = (host->sg_tablesize * 8) + 112;
  1345. }
  1346. aac_get_config_status(aac, 1);
  1347. aac_get_containers(aac);
  1348. /*
  1349. * This is where the assumption that the Adapter is quiesced
  1350. * is important.
  1351. */
  1352. command_list = NULL;
  1353. __shost_for_each_device(dev, host) {
  1354. unsigned long flags;
  1355. spin_lock_irqsave(&dev->list_lock, flags);
  1356. list_for_each_entry(command, &dev->cmd_list, list)
  1357. if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
  1358. command->SCp.buffer = (struct scatterlist *)command_list;
  1359. command_list = command;
  1360. }
  1361. spin_unlock_irqrestore(&dev->list_lock, flags);
  1362. }
  1363. while ((command = command_list)) {
  1364. command_list = (struct scsi_cmnd *)command->SCp.buffer;
  1365. command->SCp.buffer = NULL;
  1366. command->result = DID_OK << 16
  1367. | COMMAND_COMPLETE << 8
  1368. | SAM_STAT_TASK_SET_FULL;
  1369. command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
  1370. command->scsi_done(command);
  1371. }
  1372. retval = 0;
  1373. out:
  1374. aac->in_reset = 0;
  1375. scsi_unblock_requests(host);
  1376. if (jafo) {
  1377. spin_lock_irq(host->host_lock);
  1378. }
  1379. return retval;
  1380. }
  1381. int aac_reset_adapter(struct aac_dev * aac, int forced)
  1382. {
  1383. unsigned long flagv = 0;
  1384. int retval;
  1385. struct Scsi_Host * host;
  1386. if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
  1387. return -EBUSY;
  1388. if (aac->in_reset) {
  1389. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1390. return -EBUSY;
  1391. }
  1392. aac->in_reset = 1;
  1393. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1394. /*
  1395. * Wait for all commands to complete to this specific
  1396. * target (block maximum 60 seconds). Although not necessary,
  1397. * it does make us a good storage citizen.
  1398. */
  1399. host = aac->scsi_host_ptr;
  1400. scsi_block_requests(host);
  1401. if (forced < 2) for (retval = 60; retval; --retval) {
  1402. struct scsi_device * dev;
  1403. struct scsi_cmnd * command;
  1404. int active = 0;
  1405. __shost_for_each_device(dev, host) {
  1406. spin_lock_irqsave(&dev->list_lock, flagv);
  1407. list_for_each_entry(command, &dev->cmd_list, list) {
  1408. if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
  1409. active++;
  1410. break;
  1411. }
  1412. }
  1413. spin_unlock_irqrestore(&dev->list_lock, flagv);
  1414. if (active)
  1415. break;
  1416. }
  1417. /*
  1418. * We can exit If all the commands are complete
  1419. */
  1420. if (active == 0)
  1421. break;
  1422. ssleep(1);
  1423. }
  1424. /* Quiesce build, flush cache, write through mode */
  1425. if (forced < 2)
  1426. aac_send_shutdown(aac);
  1427. spin_lock_irqsave(host->host_lock, flagv);
  1428. retval = _aac_reset_adapter(aac, forced ? forced : ((aac_check_reset != 0) && (aac_check_reset != 1)));
  1429. spin_unlock_irqrestore(host->host_lock, flagv);
  1430. if ((forced < 2) && (retval == -ENODEV)) {
  1431. /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */
  1432. struct fib * fibctx = aac_fib_alloc(aac);
  1433. if (fibctx) {
  1434. struct aac_pause *cmd;
  1435. int status;
  1436. aac_fib_init(fibctx);
  1437. cmd = (struct aac_pause *) fib_data(fibctx);
  1438. cmd->command = cpu_to_le32(VM_ContainerConfig);
  1439. cmd->type = cpu_to_le32(CT_PAUSE_IO);
  1440. cmd->timeout = cpu_to_le32(1);
  1441. cmd->min = cpu_to_le32(1);
  1442. cmd->noRescan = cpu_to_le32(1);
  1443. cmd->count = cpu_to_le32(0);
  1444. status = aac_fib_send(ContainerCommand,
  1445. fibctx,
  1446. sizeof(struct aac_pause),
  1447. FsaNormal,
  1448. -2 /* Timeout silently */, 1,
  1449. NULL, NULL);
  1450. if (status >= 0)
  1451. aac_fib_complete(fibctx);
  1452. /* FIB should be freed only after getting
  1453. * the response from the F/W */
  1454. if (status != -ERESTARTSYS)
  1455. aac_fib_free(fibctx);
  1456. }
  1457. }
  1458. return retval;
  1459. }
  1460. int aac_check_health(struct aac_dev * aac)
  1461. {
  1462. int BlinkLED;
  1463. unsigned long time_now, flagv = 0;
  1464. struct list_head * entry;
  1465. struct Scsi_Host * host;
  1466. /* Extending the scope of fib_lock slightly to protect aac->in_reset */
  1467. if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
  1468. return 0;
  1469. if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
  1470. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1471. return 0; /* OK */
  1472. }
  1473. aac->in_reset = 1;
  1474. /* Fake up an AIF:
  1475. * aac_aifcmd.command = AifCmdEventNotify = 1
  1476. * aac_aifcmd.seqnum = 0xFFFFFFFF
  1477. * aac_aifcmd.data[0] = AifEnExpEvent = 23
  1478. * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
  1479. * aac.aifcmd.data[2] = AifHighPriority = 3
  1480. * aac.aifcmd.data[3] = BlinkLED
  1481. */
  1482. time_now = jiffies/HZ;
  1483. entry = aac->fib_list.next;
  1484. /*
  1485. * For each Context that is on the
  1486. * fibctxList, make a copy of the
  1487. * fib, and then set the event to wake up the
  1488. * thread that is waiting for it.
  1489. */
  1490. while (entry != &aac->fib_list) {
  1491. /*
  1492. * Extract the fibctx
  1493. */
  1494. struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
  1495. struct hw_fib * hw_fib;
  1496. struct fib * fib;
  1497. /*
  1498. * Check if the queue is getting
  1499. * backlogged
  1500. */
  1501. if (fibctx->count > 20) {
  1502. /*
  1503. * It's *not* jiffies folks,
  1504. * but jiffies / HZ, so do not
  1505. * panic ...
  1506. */
  1507. u32 time_last = fibctx->jiffies;
  1508. /*
  1509. * Has it been > 2 minutes
  1510. * since the last read off
  1511. * the queue?
  1512. */
  1513. if ((time_now - time_last) > aif_timeout) {
  1514. entry = entry->next;
  1515. aac_close_fib_context(aac, fibctx);
  1516. continue;
  1517. }
  1518. }
  1519. /*
  1520. * Warning: no sleep allowed while
  1521. * holding spinlock
  1522. */
  1523. hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC);
  1524. fib = kzalloc(sizeof(struct fib), GFP_ATOMIC);
  1525. if (fib && hw_fib) {
  1526. struct aac_aifcmd * aif;
  1527. fib->hw_fib_va = hw_fib;
  1528. fib->dev = aac;
  1529. aac_fib_init(fib);
  1530. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1531. fib->size = sizeof (struct fib);
  1532. fib->data = hw_fib->data;
  1533. aif = (struct aac_aifcmd *)hw_fib->data;
  1534. aif->command = cpu_to_le32(AifCmdEventNotify);
  1535. aif->seqnum = cpu_to_le32(0xFFFFFFFF);
  1536. ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent);
  1537. ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic);
  1538. ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority);
  1539. ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED);
  1540. /*
  1541. * Put the FIB onto the
  1542. * fibctx's fibs
  1543. */
  1544. list_add_tail(&fib->fiblink, &fibctx->fib_list);
  1545. fibctx->count++;
  1546. /*
  1547. * Set the event to wake up the
  1548. * thread that will waiting.
  1549. */
  1550. up(&fibctx->wait_sem);
  1551. } else {
  1552. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1553. kfree(fib);
  1554. kfree(hw_fib);
  1555. }
  1556. entry = entry->next;
  1557. }
  1558. spin_unlock_irqrestore(&aac->fib_lock, flagv);
  1559. if (BlinkLED < 0) {
  1560. printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
  1561. goto out;
  1562. }
  1563. printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
  1564. if (!aac_check_reset || ((aac_check_reset == 1) &&
  1565. (aac->supplement_adapter_info.SupportedOptions2 &
  1566. AAC_OPTION_IGNORE_RESET)))
  1567. goto out;
  1568. host = aac->scsi_host_ptr;
  1569. if (aac->thread->pid != current->pid)
  1570. spin_lock_irqsave(host->host_lock, flagv);
  1571. BlinkLED = _aac_reset_adapter(aac, aac_check_reset != 1);
  1572. if (aac->thread->pid != current->pid)
  1573. spin_unlock_irqrestore(host->host_lock, flagv);
  1574. return BlinkLED;
  1575. out:
  1576. aac->in_reset = 0;
  1577. return BlinkLED;
  1578. }
  1579. /**
  1580. * aac_command_thread - command processing thread
  1581. * @dev: Adapter to monitor
  1582. *
  1583. * Waits on the commandready event in it's queue. When the event gets set
  1584. * it will pull FIBs off it's queue. It will continue to pull FIBs off
  1585. * until the queue is empty. When the queue is empty it will wait for
  1586. * more FIBs.
  1587. */
  1588. int aac_command_thread(void *data)
  1589. {
  1590. struct aac_dev *dev = data;
  1591. struct hw_fib *hw_fib, *hw_newfib;
  1592. struct fib *fib, *newfib;
  1593. struct aac_fib_context *fibctx;
  1594. unsigned long flags;
  1595. DECLARE_WAITQUEUE(wait, current);
  1596. unsigned long next_jiffies = jiffies + HZ;
  1597. unsigned long next_check_jiffies = next_jiffies;
  1598. long difference = HZ;
  1599. /*
  1600. * We can only have one thread per adapter for AIF's.
  1601. */
  1602. if (dev->aif_thread)
  1603. return -EINVAL;
  1604. /*
  1605. * Let the DPC know it has a place to send the AIF's to.
  1606. */
  1607. dev->aif_thread = 1;
  1608. add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1609. set_current_state(TASK_INTERRUPTIBLE);
  1610. dprintk ((KERN_INFO "aac_command_thread start\n"));
  1611. while (1) {
  1612. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1613. while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
  1614. struct list_head *entry;
  1615. struct aac_aifcmd * aifcmd;
  1616. set_current_state(TASK_RUNNING);
  1617. entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
  1618. list_del(entry);
  1619. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1620. fib = list_entry(entry, struct fib, fiblink);
  1621. /*
  1622. * We will process the FIB here or pass it to a
  1623. * worker thread that is TBD. We Really can't
  1624. * do anything at this point since we don't have
  1625. * anything defined for this thread to do.
  1626. */
  1627. hw_fib = fib->hw_fib_va;
  1628. memset(fib, 0, sizeof(struct fib));
  1629. fib->type = FSAFS_NTC_FIB_CONTEXT;
  1630. fib->size = sizeof(struct fib);
  1631. fib->hw_fib_va = hw_fib;
  1632. fib->data = hw_fib->data;
  1633. fib->dev = dev;
  1634. /*
  1635. * We only handle AifRequest fibs from the adapter.
  1636. */
  1637. aifcmd = (struct aac_aifcmd *) hw_fib->data;
  1638. if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
  1639. /* Handle Driver Notify Events */
  1640. aac_handle_aif(dev, fib);
  1641. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1642. aac_fib_adapter_complete(fib, (u16)sizeof(u32));
  1643. } else {
  1644. /* The u32 here is important and intended. We are using
  1645. 32bit wrapping time to fit the adapter field */
  1646. u32 time_now, time_last;
  1647. unsigned long flagv;
  1648. unsigned num;
  1649. struct hw_fib ** hw_fib_pool, ** hw_fib_p;
  1650. struct fib ** fib_pool, ** fib_p;
  1651. /* Sniff events */
  1652. if ((aifcmd->command ==
  1653. cpu_to_le32(AifCmdEventNotify)) ||
  1654. (aifcmd->command ==
  1655. cpu_to_le32(AifCmdJobProgress))) {
  1656. aac_handle_aif(dev, fib);
  1657. }
  1658. time_now = jiffies/HZ;
  1659. /*
  1660. * Warning: no sleep allowed while
  1661. * holding spinlock. We take the estimate
  1662. * and pre-allocate a set of fibs outside the
  1663. * lock.
  1664. */
  1665. num = le32_to_cpu(dev->init->AdapterFibsSize)
  1666. / sizeof(struct hw_fib); /* some extra */
  1667. spin_lock_irqsave(&dev->fib_lock, flagv);
  1668. entry = dev->fib_list.next;
  1669. while (entry != &dev->fib_list) {
  1670. entry = entry->next;
  1671. ++num;
  1672. }
  1673. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1674. hw_fib_pool = NULL;
  1675. fib_pool = NULL;
  1676. if (num
  1677. && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
  1678. && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
  1679. hw_fib_p = hw_fib_pool;
  1680. fib_p = fib_pool;
  1681. while (hw_fib_p < &hw_fib_pool[num]) {
  1682. if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
  1683. --hw_fib_p;
  1684. break;
  1685. }
  1686. if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
  1687. kfree(*(--hw_fib_p));
  1688. break;
  1689. }
  1690. }
  1691. if ((num = hw_fib_p - hw_fib_pool) == 0) {
  1692. kfree(fib_pool);
  1693. fib_pool = NULL;
  1694. kfree(hw_fib_pool);
  1695. hw_fib_pool = NULL;
  1696. }
  1697. } else {
  1698. kfree(hw_fib_pool);
  1699. hw_fib_pool = NULL;
  1700. }
  1701. spin_lock_irqsave(&dev->fib_lock, flagv);
  1702. entry = dev->fib_list.next;
  1703. /*
  1704. * For each Context that is on the
  1705. * fibctxList, make a copy of the
  1706. * fib, and then set the event to wake up the
  1707. * thread that is waiting for it.
  1708. */
  1709. hw_fib_p = hw_fib_pool;
  1710. fib_p = fib_pool;
  1711. while (entry != &dev->fib_list) {
  1712. /*
  1713. * Extract the fibctx
  1714. */
  1715. fibctx = list_entry(entry, struct aac_fib_context, next);
  1716. /*
  1717. * Check if the queue is getting
  1718. * backlogged
  1719. */
  1720. if (fibctx->count > 20)
  1721. {
  1722. /*
  1723. * It's *not* jiffies folks,
  1724. * but jiffies / HZ so do not
  1725. * panic ...
  1726. */
  1727. time_last = fibctx->jiffies;
  1728. /*
  1729. * Has it been > 2 minutes
  1730. * since the last read off
  1731. * the queue?
  1732. */
  1733. if ((time_now - time_last) > aif_timeout) {
  1734. entry = entry->next;
  1735. aac_close_fib_context(dev, fibctx);
  1736. continue;
  1737. }
  1738. }
  1739. /*
  1740. * Warning: no sleep allowed while
  1741. * holding spinlock
  1742. */
  1743. if (hw_fib_p < &hw_fib_pool[num]) {
  1744. hw_newfib = *hw_fib_p;
  1745. *(hw_fib_p++) = NULL;
  1746. newfib = *fib_p;
  1747. *(fib_p++) = NULL;
  1748. /*
  1749. * Make the copy of the FIB
  1750. */
  1751. memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
  1752. memcpy(newfib, fib, sizeof(struct fib));
  1753. newfib->hw_fib_va = hw_newfib;
  1754. /*
  1755. * Put the FIB onto the
  1756. * fibctx's fibs
  1757. */
  1758. list_add_tail(&newfib->fiblink, &fibctx->fib_list);
  1759. fibctx->count++;
  1760. /*
  1761. * Set the event to wake up the
  1762. * thread that is waiting.
  1763. */
  1764. up(&fibctx->wait_sem);
  1765. } else {
  1766. printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
  1767. }
  1768. entry = entry->next;
  1769. }
  1770. /*
  1771. * Set the status of this FIB
  1772. */
  1773. *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
  1774. aac_fib_adapter_complete(fib, sizeof(u32));
  1775. spin_unlock_irqrestore(&dev->fib_lock, flagv);
  1776. /* Free up the remaining resources */
  1777. hw_fib_p = hw_fib_pool;
  1778. fib_p = fib_pool;
  1779. while (hw_fib_p < &hw_fib_pool[num]) {
  1780. kfree(*hw_fib_p);
  1781. kfree(*fib_p);
  1782. ++fib_p;
  1783. ++hw_fib_p;
  1784. }
  1785. kfree(hw_fib_pool);
  1786. kfree(fib_pool);
  1787. }
  1788. kfree(fib);
  1789. spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1790. }
  1791. /*
  1792. * There are no more AIF's
  1793. */
  1794. spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
  1795. /*
  1796. * Background activity
  1797. */
  1798. if ((time_before(next_check_jiffies,next_jiffies))
  1799. && ((difference = next_check_jiffies - jiffies) <= 0)) {
  1800. next_check_jiffies = next_jiffies;
  1801. if (aac_check_health(dev) == 0) {
  1802. difference = ((long)(unsigned)check_interval)
  1803. * HZ;
  1804. next_check_jiffies = jiffies + difference;
  1805. } else if (!dev->queues)
  1806. break;
  1807. }
  1808. if (!time_before(next_check_jiffies,next_jiffies)
  1809. && ((difference = next_jiffies - jiffies) <= 0)) {
  1810. struct timeval now;
  1811. int ret;
  1812. /* Don't even try to talk to adapter if its sick */
  1813. ret = aac_check_health(dev);
  1814. if (!ret && !dev->queues)
  1815. break;
  1816. next_check_jiffies = jiffies
  1817. + ((long)(unsigned)check_interval)
  1818. * HZ;
  1819. do_gettimeofday(&now);
  1820. /* Synchronize our watches */
  1821. if (((1000000 - (1000000 / HZ)) > now.tv_usec)
  1822. && (now.tv_usec > (1000000 / HZ)))
  1823. difference = (((1000000 - now.tv_usec) * HZ)
  1824. + 500000) / 1000000;
  1825. else if (ret == 0) {
  1826. struct fib *fibptr;
  1827. if ((fibptr = aac_fib_alloc(dev))) {
  1828. int status;
  1829. __le32 *info;
  1830. aac_fib_init(fibptr);
  1831. info = (__le32 *) fib_data(fibptr);
  1832. if (now.tv_usec > 500000)
  1833. ++now.tv_sec;
  1834. *info = cpu_to_le32(now.tv_sec);
  1835. status = aac_fib_send(SendHostTime,
  1836. fibptr,
  1837. sizeof(*info),
  1838. FsaNormal,
  1839. 1, 1,
  1840. NULL,
  1841. NULL);
  1842. /* Do not set XferState to zero unless
  1843. * receives a response from F/W */
  1844. if (status >= 0)
  1845. aac_fib_complete(fibptr);
  1846. /* FIB should be freed only after
  1847. * getting the response from the F/W */
  1848. if (status != -ERESTARTSYS)
  1849. aac_fib_free(fibptr);
  1850. }
  1851. difference = (long)(unsigned)update_interval*HZ;
  1852. } else {
  1853. /* retry shortly */
  1854. difference = 10 * HZ;
  1855. }
  1856. next_jiffies = jiffies + difference;
  1857. if (time_before(next_check_jiffies,next_jiffies))
  1858. difference = next_check_jiffies - jiffies;
  1859. }
  1860. if (difference <= 0)
  1861. difference = 1;
  1862. set_current_state(TASK_INTERRUPTIBLE);
  1863. if (kthread_should_stop())
  1864. break;
  1865. schedule_timeout(difference);
  1866. if (kthread_should_stop())
  1867. break;
  1868. }
  1869. if (dev->queues)
  1870. remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
  1871. dev->aif_thread = 0;
  1872. return 0;
  1873. }
  1874. int aac_acquire_irq(struct aac_dev *dev)
  1875. {
  1876. int i;
  1877. int j;
  1878. int ret = 0;
  1879. int cpu;
  1880. cpu = cpumask_first(cpu_online_mask);
  1881. if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) {
  1882. for (i = 0; i < dev->max_msix; i++) {
  1883. dev->aac_msix[i].vector_no = i;
  1884. dev->aac_msix[i].dev = dev;
  1885. if (request_irq(dev->msixentry[i].vector,
  1886. dev->a_ops.adapter_intr,
  1887. 0, "aacraid", &(dev->aac_msix[i]))) {
  1888. printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n",
  1889. dev->name, dev->id, i);
  1890. for (j = 0 ; j < i ; j++)
  1891. free_irq(dev->msixentry[j].vector,
  1892. &(dev->aac_msix[j]));
  1893. pci_disable_msix(dev->pdev);
  1894. ret = -1;
  1895. }
  1896. if (irq_set_affinity_hint(dev->msixentry[i].vector,
  1897. get_cpu_mask(cpu))) {
  1898. printk(KERN_ERR "%s%d: Failed to set IRQ affinity for cpu %d\n",
  1899. dev->name, dev->id, cpu);
  1900. }
  1901. cpu = cpumask_next(cpu, cpu_online_mask);
  1902. }
  1903. } else {
  1904. dev->aac_msix[0].vector_no = 0;
  1905. dev->aac_msix[0].dev = dev;
  1906. if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
  1907. IRQF_SHARED, "aacraid",
  1908. &(dev->aac_msix[0])) < 0) {
  1909. if (dev->msi)
  1910. pci_disable_msi(dev->pdev);
  1911. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  1912. dev->name, dev->id);
  1913. ret = -1;
  1914. }
  1915. }
  1916. return ret;
  1917. }
  1918. void aac_free_irq(struct aac_dev *dev)
  1919. {
  1920. int i;
  1921. int cpu;
  1922. cpu = cpumask_first(cpu_online_mask);
  1923. if (dev->pdev->device == PMC_DEVICE_S6 ||
  1924. dev->pdev->device == PMC_DEVICE_S7 ||
  1925. dev->pdev->device == PMC_DEVICE_S8 ||
  1926. dev->pdev->device == PMC_DEVICE_S9) {
  1927. if (dev->max_msix > 1) {
  1928. for (i = 0; i < dev->max_msix; i++) {
  1929. if (irq_set_affinity_hint(
  1930. dev->msixentry[i].vector, NULL)) {
  1931. printk(KERN_ERR "%s%d: Failed to reset IRQ affinity for cpu %d\n",
  1932. dev->name, dev->id, cpu);
  1933. }
  1934. cpu = cpumask_next(cpu, cpu_online_mask);
  1935. free_irq(dev->msixentry[i].vector,
  1936. &(dev->aac_msix[i]));
  1937. }
  1938. } else {
  1939. free_irq(dev->pdev->irq, &(dev->aac_msix[0]));
  1940. }
  1941. } else {
  1942. free_irq(dev->pdev->irq, dev);
  1943. }
  1944. if (dev->msi)
  1945. pci_disable_msi(dev->pdev);
  1946. else if (dev->max_msix > 1)
  1947. pci_disable_msix(dev->pdev);
  1948. }