reset-stm32.c 2.6 KB

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  1. /*
  2. * Copyright (C) Maxime Coquelin 2015
  3. * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
  4. * License terms: GNU General Public License (GPL), version 2
  5. *
  6. * Heavily based on sunxi driver from Maxime Ripard.
  7. */
  8. #include <linux/err.h>
  9. #include <linux/io.h>
  10. #include <linux/of.h>
  11. #include <linux/of_address.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/reset-controller.h>
  14. #include <linux/slab.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/types.h>
  17. struct stm32_reset_data {
  18. spinlock_t lock;
  19. void __iomem *membase;
  20. struct reset_controller_dev rcdev;
  21. };
  22. static int stm32_reset_assert(struct reset_controller_dev *rcdev,
  23. unsigned long id)
  24. {
  25. struct stm32_reset_data *data = container_of(rcdev,
  26. struct stm32_reset_data,
  27. rcdev);
  28. int bank = id / BITS_PER_LONG;
  29. int offset = id % BITS_PER_LONG;
  30. unsigned long flags;
  31. u32 reg;
  32. spin_lock_irqsave(&data->lock, flags);
  33. reg = readl(data->membase + (bank * 4));
  34. writel(reg | BIT(offset), data->membase + (bank * 4));
  35. spin_unlock_irqrestore(&data->lock, flags);
  36. return 0;
  37. }
  38. static int stm32_reset_deassert(struct reset_controller_dev *rcdev,
  39. unsigned long id)
  40. {
  41. struct stm32_reset_data *data = container_of(rcdev,
  42. struct stm32_reset_data,
  43. rcdev);
  44. int bank = id / BITS_PER_LONG;
  45. int offset = id % BITS_PER_LONG;
  46. unsigned long flags;
  47. u32 reg;
  48. spin_lock_irqsave(&data->lock, flags);
  49. reg = readl(data->membase + (bank * 4));
  50. writel(reg & ~BIT(offset), data->membase + (bank * 4));
  51. spin_unlock_irqrestore(&data->lock, flags);
  52. return 0;
  53. }
  54. static const struct reset_control_ops stm32_reset_ops = {
  55. .assert = stm32_reset_assert,
  56. .deassert = stm32_reset_deassert,
  57. };
  58. static const struct of_device_id stm32_reset_dt_ids[] = {
  59. { .compatible = "st,stm32-rcc", },
  60. { /* sentinel */ },
  61. };
  62. static int stm32_reset_probe(struct platform_device *pdev)
  63. {
  64. struct stm32_reset_data *data;
  65. struct resource *res;
  66. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  67. if (!data)
  68. return -ENOMEM;
  69. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  70. data->membase = devm_ioremap_resource(&pdev->dev, res);
  71. if (IS_ERR(data->membase))
  72. return PTR_ERR(data->membase);
  73. spin_lock_init(&data->lock);
  74. data->rcdev.owner = THIS_MODULE;
  75. data->rcdev.nr_resets = resource_size(res) * 8;
  76. data->rcdev.ops = &stm32_reset_ops;
  77. data->rcdev.of_node = pdev->dev.of_node;
  78. return devm_reset_controller_register(&pdev->dev, &data->rcdev);
  79. }
  80. static struct platform_driver stm32_reset_driver = {
  81. .probe = stm32_reset_probe,
  82. .driver = {
  83. .name = "stm32-rcc-reset",
  84. .of_match_table = stm32_reset_dt_ids,
  85. },
  86. };
  87. builtin_platform_driver(stm32_reset_driver);