tps80031-regulator.c 21 KB

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  1. /*
  2. * tps80031-regulator.c -- TI TPS80031 regulator driver.
  3. *
  4. * Regulator driver for TI TPS80031/TPS80032 Fully Integrated Power
  5. * Management with Power Path and Battery Charger.
  6. *
  7. * Copyright (c) 2012, NVIDIA Corporation.
  8. *
  9. * Author: Laxman Dewangan <ldewangan@nvidia.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation version 2.
  14. *
  15. * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
  16. * whether express or implied; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  23. * 02111-1307, USA
  24. */
  25. #include <linux/delay.h>
  26. #include <linux/err.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/mfd/tps80031.h>
  30. #include <linux/module.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/regulator/driver.h>
  33. #include <linux/regulator/machine.h>
  34. #include <linux/slab.h>
  35. /* Flags for DCDC Voltage reading */
  36. #define DCDC_OFFSET_EN BIT(0)
  37. #define DCDC_EXTENDED_EN BIT(1)
  38. #define TRACK_MODE_ENABLE BIT(2)
  39. #define SMPS_MULTOFFSET_VIO BIT(1)
  40. #define SMPS_MULTOFFSET_SMPS1 BIT(3)
  41. #define SMPS_MULTOFFSET_SMPS2 BIT(4)
  42. #define SMPS_MULTOFFSET_SMPS3 BIT(6)
  43. #define SMPS_MULTOFFSET_SMPS4 BIT(0)
  44. #define SMPS_CMD_MASK 0xC0
  45. #define SMPS_VSEL_MASK 0x3F
  46. #define LDO_VSEL_MASK 0x1F
  47. #define LDO_TRACK_VSEL_MASK 0x3F
  48. #define MISC2_LDOUSB_IN_VSYS BIT(4)
  49. #define MISC2_LDOUSB_IN_PMID BIT(3)
  50. #define MISC2_LDOUSB_IN_MASK 0x18
  51. #define MISC2_LDO3_SEL_VIB_VAL BIT(0)
  52. #define MISC2_LDO3_SEL_VIB_MASK 0x1
  53. #define BOOST_HW_PWR_EN BIT(5)
  54. #define BOOST_HW_PWR_EN_MASK BIT(5)
  55. #define OPA_MODE_EN BIT(6)
  56. #define OPA_MODE_EN_MASK BIT(6)
  57. #define USB_VBUS_CTRL_SET 0x04
  58. #define USB_VBUS_CTRL_CLR 0x05
  59. #define VBUS_DISCHRG 0x20
  60. struct tps80031_regulator_info {
  61. /* Regulator register address.*/
  62. u8 trans_reg;
  63. u8 state_reg;
  64. u8 force_reg;
  65. u8 volt_reg;
  66. u8 volt_id;
  67. /*Power request bits */
  68. int preq_bit;
  69. /* used by regulator core */
  70. struct regulator_desc desc;
  71. };
  72. struct tps80031_regulator {
  73. struct device *dev;
  74. struct regulator_dev *rdev;
  75. struct tps80031_regulator_info *rinfo;
  76. u8 device_flags;
  77. unsigned int config_flags;
  78. unsigned int ext_ctrl_flag;
  79. };
  80. static inline struct device *to_tps80031_dev(struct regulator_dev *rdev)
  81. {
  82. return rdev_get_dev(rdev)->parent->parent;
  83. }
  84. static int tps80031_reg_is_enabled(struct regulator_dev *rdev)
  85. {
  86. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  87. struct device *parent = to_tps80031_dev(rdev);
  88. u8 reg_val;
  89. int ret;
  90. if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ)
  91. return true;
  92. ret = tps80031_read(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg,
  93. &reg_val);
  94. if (ret < 0) {
  95. dev_err(&rdev->dev, "Reg 0x%02x read failed, err = %d\n",
  96. ri->rinfo->state_reg, ret);
  97. return ret;
  98. }
  99. return (reg_val & TPS80031_STATE_MASK) == TPS80031_STATE_ON;
  100. }
  101. static int tps80031_reg_enable(struct regulator_dev *rdev)
  102. {
  103. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  104. struct device *parent = to_tps80031_dev(rdev);
  105. int ret;
  106. if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ)
  107. return 0;
  108. ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg,
  109. TPS80031_STATE_ON, TPS80031_STATE_MASK);
  110. if (ret < 0) {
  111. dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n",
  112. ri->rinfo->state_reg, ret);
  113. return ret;
  114. }
  115. return ret;
  116. }
  117. static int tps80031_reg_disable(struct regulator_dev *rdev)
  118. {
  119. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  120. struct device *parent = to_tps80031_dev(rdev);
  121. int ret;
  122. if (ri->ext_ctrl_flag & TPS80031_EXT_PWR_REQ)
  123. return 0;
  124. ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->state_reg,
  125. TPS80031_STATE_OFF, TPS80031_STATE_MASK);
  126. if (ret < 0)
  127. dev_err(&rdev->dev, "Reg 0x%02x update failed, err = %d\n",
  128. ri->rinfo->state_reg, ret);
  129. return ret;
  130. }
  131. /* DCDC voltages for the selector of 58 to 63 */
  132. static int tps80031_dcdc_voltages[4][5] = {
  133. { 1350, 1500, 1800, 1900, 2100},
  134. { 1350, 1500, 1800, 1900, 2100},
  135. { 2084, 2315, 2778, 2932, 3241},
  136. { 4167, 2315, 2778, 2932, 3241},
  137. };
  138. static int tps80031_dcdc_list_voltage(struct regulator_dev *rdev, unsigned sel)
  139. {
  140. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  141. int volt_index = ri->device_flags & 0x3;
  142. if (sel == 0)
  143. return 0;
  144. else if (sel < 58)
  145. return regulator_list_voltage_linear(rdev, sel - 1);
  146. else
  147. return tps80031_dcdc_voltages[volt_index][sel - 58] * 1000;
  148. }
  149. static int tps80031_dcdc_set_voltage_sel(struct regulator_dev *rdev,
  150. unsigned vsel)
  151. {
  152. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  153. struct device *parent = to_tps80031_dev(rdev);
  154. int ret;
  155. u8 reg_val;
  156. if (ri->rinfo->force_reg) {
  157. ret = tps80031_read(parent, ri->rinfo->volt_id,
  158. ri->rinfo->force_reg, &reg_val);
  159. if (ret < 0) {
  160. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  161. ri->rinfo->force_reg, ret);
  162. return ret;
  163. }
  164. if (!(reg_val & SMPS_CMD_MASK)) {
  165. ret = tps80031_update(parent, ri->rinfo->volt_id,
  166. ri->rinfo->force_reg, vsel, SMPS_VSEL_MASK);
  167. if (ret < 0)
  168. dev_err(ri->dev,
  169. "reg 0x%02x update failed, e = %d\n",
  170. ri->rinfo->force_reg, ret);
  171. return ret;
  172. }
  173. }
  174. ret = tps80031_update(parent, ri->rinfo->volt_id,
  175. ri->rinfo->volt_reg, vsel, SMPS_VSEL_MASK);
  176. if (ret < 0)
  177. dev_err(ri->dev, "reg 0x%02x update failed, e = %d\n",
  178. ri->rinfo->volt_reg, ret);
  179. return ret;
  180. }
  181. static int tps80031_dcdc_get_voltage_sel(struct regulator_dev *rdev)
  182. {
  183. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  184. struct device *parent = to_tps80031_dev(rdev);
  185. uint8_t vsel = 0;
  186. int ret;
  187. if (ri->rinfo->force_reg) {
  188. ret = tps80031_read(parent, ri->rinfo->volt_id,
  189. ri->rinfo->force_reg, &vsel);
  190. if (ret < 0) {
  191. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  192. ri->rinfo->force_reg, ret);
  193. return ret;
  194. }
  195. if (!(vsel & SMPS_CMD_MASK))
  196. return vsel & SMPS_VSEL_MASK;
  197. }
  198. ret = tps80031_read(parent, ri->rinfo->volt_id,
  199. ri->rinfo->volt_reg, &vsel);
  200. if (ret < 0) {
  201. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  202. ri->rinfo->volt_reg, ret);
  203. return ret;
  204. }
  205. return vsel & SMPS_VSEL_MASK;
  206. }
  207. static int tps80031_ldo_list_voltage(struct regulator_dev *rdev,
  208. unsigned int sel)
  209. {
  210. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  211. struct device *parent = to_tps80031_dev(rdev);
  212. /* Check for valid setting for TPS80031 or TPS80032-ES1.0 */
  213. if ((ri->rinfo->desc.id == TPS80031_REGULATOR_LDO2) &&
  214. (ri->device_flags & TRACK_MODE_ENABLE)) {
  215. unsigned nvsel = (sel) & 0x1F;
  216. if (((tps80031_get_chip_info(parent) == TPS80031) ||
  217. ((tps80031_get_chip_info(parent) == TPS80032) &&
  218. (tps80031_get_pmu_version(parent) == 0x0))) &&
  219. ((nvsel == 0x0) || (nvsel >= 0x19 && nvsel <= 0x1F))) {
  220. dev_err(ri->dev,
  221. "Invalid sel %d in track mode LDO2\n",
  222. nvsel);
  223. return -EINVAL;
  224. }
  225. }
  226. return regulator_list_voltage_linear(rdev, sel);
  227. }
  228. static int tps80031_ldo_map_voltage(struct regulator_dev *rdev,
  229. int min_uV, int max_uV)
  230. {
  231. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  232. struct device *parent = to_tps80031_dev(rdev);
  233. /* Check for valid setting for TPS80031 or TPS80032-ES1.0 */
  234. if ((ri->rinfo->desc.id == TPS80031_REGULATOR_LDO2) &&
  235. (ri->device_flags & TRACK_MODE_ENABLE)) {
  236. if (((tps80031_get_chip_info(parent) == TPS80031) ||
  237. ((tps80031_get_chip_info(parent) == TPS80032) &&
  238. (tps80031_get_pmu_version(parent) == 0x0)))) {
  239. return regulator_map_voltage_iterate(rdev, min_uV,
  240. max_uV);
  241. }
  242. }
  243. return regulator_map_voltage_linear(rdev, min_uV, max_uV);
  244. }
  245. static int tps80031_vbus_is_enabled(struct regulator_dev *rdev)
  246. {
  247. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  248. struct device *parent = to_tps80031_dev(rdev);
  249. int ret = -EIO;
  250. uint8_t ctrl1 = 0;
  251. uint8_t ctrl3 = 0;
  252. ret = tps80031_read(parent, TPS80031_SLAVE_ID2,
  253. TPS80031_CHARGERUSB_CTRL1, &ctrl1);
  254. if (ret < 0) {
  255. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  256. TPS80031_CHARGERUSB_CTRL1, ret);
  257. return ret;
  258. }
  259. ret = tps80031_read(parent, TPS80031_SLAVE_ID2,
  260. TPS80031_CHARGERUSB_CTRL3, &ctrl3);
  261. if (ret < 0) {
  262. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  263. TPS80031_CHARGERUSB_CTRL3, ret);
  264. return ret;
  265. }
  266. if ((ctrl1 & OPA_MODE_EN) && (ctrl3 & BOOST_HW_PWR_EN))
  267. return 1;
  268. return ret;
  269. }
  270. static int tps80031_vbus_enable(struct regulator_dev *rdev)
  271. {
  272. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  273. struct device *parent = to_tps80031_dev(rdev);
  274. int ret;
  275. ret = tps80031_set_bits(parent, TPS80031_SLAVE_ID2,
  276. TPS80031_CHARGERUSB_CTRL1, OPA_MODE_EN);
  277. if (ret < 0) {
  278. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  279. TPS80031_CHARGERUSB_CTRL1, ret);
  280. return ret;
  281. }
  282. ret = tps80031_set_bits(parent, TPS80031_SLAVE_ID2,
  283. TPS80031_CHARGERUSB_CTRL3, BOOST_HW_PWR_EN);
  284. if (ret < 0) {
  285. dev_err(ri->dev, "reg 0x%02x read failed, e = %d\n",
  286. TPS80031_CHARGERUSB_CTRL3, ret);
  287. return ret;
  288. }
  289. return ret;
  290. }
  291. static int tps80031_vbus_disable(struct regulator_dev *rdev)
  292. {
  293. struct tps80031_regulator *ri = rdev_get_drvdata(rdev);
  294. struct device *parent = to_tps80031_dev(rdev);
  295. int ret = 0;
  296. if (ri->config_flags & TPS80031_VBUS_DISCHRG_EN_PDN) {
  297. ret = tps80031_write(parent, TPS80031_SLAVE_ID2,
  298. USB_VBUS_CTRL_SET, VBUS_DISCHRG);
  299. if (ret < 0) {
  300. dev_err(ri->dev, "reg 0x%02x write failed, e = %d\n",
  301. USB_VBUS_CTRL_SET, ret);
  302. return ret;
  303. }
  304. }
  305. ret = tps80031_clr_bits(parent, TPS80031_SLAVE_ID2,
  306. TPS80031_CHARGERUSB_CTRL1, OPA_MODE_EN);
  307. if (ret < 0) {
  308. dev_err(ri->dev, "reg 0x%02x clearbit failed, e = %d\n",
  309. TPS80031_CHARGERUSB_CTRL1, ret);
  310. return ret;
  311. }
  312. ret = tps80031_clr_bits(parent, TPS80031_SLAVE_ID2,
  313. TPS80031_CHARGERUSB_CTRL3, BOOST_HW_PWR_EN);
  314. if (ret < 0) {
  315. dev_err(ri->dev, "reg 0x%02x clearbit failed, e = %d\n",
  316. TPS80031_CHARGERUSB_CTRL3, ret);
  317. return ret;
  318. }
  319. mdelay(DIV_ROUND_UP(ri->rinfo->desc.enable_time, 1000));
  320. if (ri->config_flags & TPS80031_VBUS_DISCHRG_EN_PDN) {
  321. ret = tps80031_write(parent, TPS80031_SLAVE_ID2,
  322. USB_VBUS_CTRL_CLR, VBUS_DISCHRG);
  323. if (ret < 0) {
  324. dev_err(ri->dev, "reg 0x%02x write failed, e = %d\n",
  325. USB_VBUS_CTRL_CLR, ret);
  326. return ret;
  327. }
  328. }
  329. return ret;
  330. }
  331. static struct regulator_ops tps80031_dcdc_ops = {
  332. .list_voltage = tps80031_dcdc_list_voltage,
  333. .set_voltage_sel = tps80031_dcdc_set_voltage_sel,
  334. .get_voltage_sel = tps80031_dcdc_get_voltage_sel,
  335. .enable = tps80031_reg_enable,
  336. .disable = tps80031_reg_disable,
  337. .is_enabled = tps80031_reg_is_enabled,
  338. };
  339. static struct regulator_ops tps80031_ldo_ops = {
  340. .list_voltage = tps80031_ldo_list_voltage,
  341. .map_voltage = tps80031_ldo_map_voltage,
  342. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  343. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  344. .enable = tps80031_reg_enable,
  345. .disable = tps80031_reg_disable,
  346. .is_enabled = tps80031_reg_is_enabled,
  347. };
  348. static struct regulator_ops tps80031_vbus_sw_ops = {
  349. .list_voltage = regulator_list_voltage_linear,
  350. .enable = tps80031_vbus_enable,
  351. .disable = tps80031_vbus_disable,
  352. .is_enabled = tps80031_vbus_is_enabled,
  353. };
  354. static struct regulator_ops tps80031_vbus_hw_ops = {
  355. .list_voltage = regulator_list_voltage_linear,
  356. };
  357. static struct regulator_ops tps80031_ext_reg_ops = {
  358. .list_voltage = regulator_list_voltage_linear,
  359. .enable = tps80031_reg_enable,
  360. .disable = tps80031_reg_disable,
  361. .is_enabled = tps80031_reg_is_enabled,
  362. };
  363. /* Non-exiting default definition for some register */
  364. #define TPS80031_SMPS3_CFG_FORCE 0
  365. #define TPS80031_SMPS4_CFG_FORCE 0
  366. #define TPS80031_VBUS_CFG_TRANS 0
  367. #define TPS80031_VBUS_CFG_STATE 0
  368. #define TPS80031_REG_SMPS(_id, _volt_id, _pbit) \
  369. { \
  370. .trans_reg = TPS80031_##_id##_CFG_TRANS, \
  371. .state_reg = TPS80031_##_id##_CFG_STATE, \
  372. .force_reg = TPS80031_##_id##_CFG_FORCE, \
  373. .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \
  374. .volt_id = TPS80031_SLAVE_##_volt_id, \
  375. .preq_bit = _pbit, \
  376. .desc = { \
  377. .name = "tps80031_"#_id, \
  378. .id = TPS80031_REGULATOR_##_id, \
  379. .n_voltages = 63, \
  380. .ops = &tps80031_dcdc_ops, \
  381. .type = REGULATOR_VOLTAGE, \
  382. .owner = THIS_MODULE, \
  383. .enable_time = 500, \
  384. }, \
  385. }
  386. #define TPS80031_REG_LDO(_id, _preq_bit) \
  387. { \
  388. .trans_reg = TPS80031_##_id##_CFG_TRANS, \
  389. .state_reg = TPS80031_##_id##_CFG_STATE, \
  390. .volt_reg = TPS80031_##_id##_CFG_VOLTAGE, \
  391. .volt_id = TPS80031_SLAVE_ID1, \
  392. .preq_bit = _preq_bit, \
  393. .desc = { \
  394. .owner = THIS_MODULE, \
  395. .name = "tps80031_"#_id, \
  396. .id = TPS80031_REGULATOR_##_id, \
  397. .ops = &tps80031_ldo_ops, \
  398. .type = REGULATOR_VOLTAGE, \
  399. .min_uV = 1000000, \
  400. .uV_step = 100000, \
  401. .linear_min_sel = 1, \
  402. .n_voltages = 25, \
  403. .vsel_reg = TPS80031_##_id##_CFG_VOLTAGE, \
  404. .vsel_mask = LDO_VSEL_MASK, \
  405. .enable_time = 500, \
  406. }, \
  407. }
  408. #define TPS80031_REG_FIXED(_id, max_mV, _ops, _delay, _pbit) \
  409. { \
  410. .trans_reg = TPS80031_##_id##_CFG_TRANS, \
  411. .state_reg = TPS80031_##_id##_CFG_STATE, \
  412. .volt_id = TPS80031_SLAVE_ID1, \
  413. .preq_bit = _pbit, \
  414. .desc = { \
  415. .name = "tps80031_"#_id, \
  416. .id = TPS80031_REGULATOR_##_id, \
  417. .min_uV = max_mV * 1000, \
  418. .n_voltages = 1, \
  419. .ops = &_ops, \
  420. .type = REGULATOR_VOLTAGE, \
  421. .owner = THIS_MODULE, \
  422. .enable_time = _delay, \
  423. }, \
  424. }
  425. static struct tps80031_regulator_info tps80031_rinfo[TPS80031_REGULATOR_MAX] = {
  426. TPS80031_REG_SMPS(VIO, ID0, 4),
  427. TPS80031_REG_SMPS(SMPS1, ID0, 0),
  428. TPS80031_REG_SMPS(SMPS2, ID0, 1),
  429. TPS80031_REG_SMPS(SMPS3, ID1, 2),
  430. TPS80031_REG_SMPS(SMPS4, ID1, 3),
  431. TPS80031_REG_LDO(VANA, -1),
  432. TPS80031_REG_LDO(LDO1, 8),
  433. TPS80031_REG_LDO(LDO2, 9),
  434. TPS80031_REG_LDO(LDO3, 10),
  435. TPS80031_REG_LDO(LDO4, 11),
  436. TPS80031_REG_LDO(LDO5, 12),
  437. TPS80031_REG_LDO(LDO6, 13),
  438. TPS80031_REG_LDO(LDO7, 14),
  439. TPS80031_REG_LDO(LDOLN, 15),
  440. TPS80031_REG_LDO(LDOUSB, 5),
  441. TPS80031_REG_FIXED(VBUS, 5000, tps80031_vbus_hw_ops, 100000, -1),
  442. TPS80031_REG_FIXED(REGEN1, 3300, tps80031_ext_reg_ops, 0, 16),
  443. TPS80031_REG_FIXED(REGEN2, 3300, tps80031_ext_reg_ops, 0, 17),
  444. TPS80031_REG_FIXED(SYSEN, 3300, tps80031_ext_reg_ops, 0, 18),
  445. };
  446. static int tps80031_power_req_config(struct device *parent,
  447. struct tps80031_regulator *ri,
  448. struct tps80031_regulator_platform_data *tps80031_pdata)
  449. {
  450. int ret = 0;
  451. if (ri->rinfo->preq_bit < 0)
  452. goto skip_pwr_req_config;
  453. ret = tps80031_ext_power_req_config(parent, ri->ext_ctrl_flag,
  454. ri->rinfo->preq_bit, ri->rinfo->state_reg,
  455. ri->rinfo->trans_reg);
  456. if (ret < 0) {
  457. dev_err(ri->dev, "ext powerreq config failed, err = %d\n", ret);
  458. return ret;
  459. }
  460. skip_pwr_req_config:
  461. if (tps80031_pdata->ext_ctrl_flag & TPS80031_PWR_ON_ON_SLEEP) {
  462. ret = tps80031_update(parent, TPS80031_SLAVE_ID1,
  463. ri->rinfo->trans_reg, TPS80031_TRANS_SLEEP_ON,
  464. TPS80031_TRANS_SLEEP_MASK);
  465. if (ret < 0) {
  466. dev_err(ri->dev, "Reg 0x%02x update failed, e %d\n",
  467. ri->rinfo->trans_reg, ret);
  468. return ret;
  469. }
  470. }
  471. return ret;
  472. }
  473. static int tps80031_regulator_config(struct device *parent,
  474. struct tps80031_regulator *ri,
  475. struct tps80031_regulator_platform_data *tps80031_pdata)
  476. {
  477. int ret = 0;
  478. switch (ri->rinfo->desc.id) {
  479. case TPS80031_REGULATOR_LDOUSB:
  480. if (ri->config_flags & (TPS80031_USBLDO_INPUT_VSYS |
  481. TPS80031_USBLDO_INPUT_PMID)) {
  482. unsigned val = 0;
  483. if (ri->config_flags & TPS80031_USBLDO_INPUT_VSYS)
  484. val = MISC2_LDOUSB_IN_VSYS;
  485. else
  486. val = MISC2_LDOUSB_IN_PMID;
  487. ret = tps80031_update(parent, TPS80031_SLAVE_ID1,
  488. TPS80031_MISC2, val,
  489. MISC2_LDOUSB_IN_MASK);
  490. if (ret < 0) {
  491. dev_err(ri->dev,
  492. "LDOUSB config failed, e= %d\n", ret);
  493. return ret;
  494. }
  495. }
  496. break;
  497. case TPS80031_REGULATOR_LDO3:
  498. if (ri->config_flags & TPS80031_LDO3_OUTPUT_VIB) {
  499. ret = tps80031_update(parent, TPS80031_SLAVE_ID1,
  500. TPS80031_MISC2, MISC2_LDO3_SEL_VIB_VAL,
  501. MISC2_LDO3_SEL_VIB_MASK);
  502. if (ret < 0) {
  503. dev_err(ri->dev,
  504. "LDO3 config failed, e = %d\n", ret);
  505. return ret;
  506. }
  507. }
  508. break;
  509. case TPS80031_REGULATOR_VBUS:
  510. /* Provide SW control Ops if VBUS is SW control */
  511. if (!(ri->config_flags & TPS80031_VBUS_SW_ONLY))
  512. ri->rinfo->desc.ops = &tps80031_vbus_sw_ops;
  513. break;
  514. default:
  515. break;
  516. }
  517. /* Configure Active state to ON, SLEEP to OFF and OFF_state to OFF */
  518. ret = tps80031_update(parent, TPS80031_SLAVE_ID1, ri->rinfo->trans_reg,
  519. TPS80031_TRANS_ACTIVE_ON | TPS80031_TRANS_SLEEP_OFF |
  520. TPS80031_TRANS_OFF_OFF, TPS80031_TRANS_ACTIVE_MASK |
  521. TPS80031_TRANS_SLEEP_MASK | TPS80031_TRANS_OFF_MASK);
  522. if (ret < 0) {
  523. dev_err(ri->dev, "trans reg update failed, e %d\n", ret);
  524. return ret;
  525. }
  526. return ret;
  527. }
  528. static int check_smps_mode_mult(struct device *parent,
  529. struct tps80031_regulator *ri)
  530. {
  531. int mult_offset;
  532. int ret;
  533. u8 smps_offset;
  534. u8 smps_mult;
  535. ret = tps80031_read(parent, TPS80031_SLAVE_ID1,
  536. TPS80031_SMPS_OFFSET, &smps_offset);
  537. if (ret < 0) {
  538. dev_err(parent, "Error in reading smps offset register\n");
  539. return ret;
  540. }
  541. ret = tps80031_read(parent, TPS80031_SLAVE_ID1,
  542. TPS80031_SMPS_MULT, &smps_mult);
  543. if (ret < 0) {
  544. dev_err(parent, "Error in reading smps mult register\n");
  545. return ret;
  546. }
  547. switch (ri->rinfo->desc.id) {
  548. case TPS80031_REGULATOR_VIO:
  549. mult_offset = SMPS_MULTOFFSET_VIO;
  550. break;
  551. case TPS80031_REGULATOR_SMPS1:
  552. mult_offset = SMPS_MULTOFFSET_SMPS1;
  553. break;
  554. case TPS80031_REGULATOR_SMPS2:
  555. mult_offset = SMPS_MULTOFFSET_SMPS2;
  556. break;
  557. case TPS80031_REGULATOR_SMPS3:
  558. mult_offset = SMPS_MULTOFFSET_SMPS3;
  559. break;
  560. case TPS80031_REGULATOR_SMPS4:
  561. mult_offset = SMPS_MULTOFFSET_SMPS4;
  562. break;
  563. case TPS80031_REGULATOR_LDO2:
  564. ri->device_flags = smps_mult & BIT(5) ? TRACK_MODE_ENABLE : 0;
  565. /* TRACK mode the ldo2 varies from 600mV to 1300mV */
  566. if (ri->device_flags & TRACK_MODE_ENABLE) {
  567. ri->rinfo->desc.min_uV = 600000;
  568. ri->rinfo->desc.uV_step = 12500;
  569. ri->rinfo->desc.n_voltages = 57;
  570. ri->rinfo->desc.vsel_mask = LDO_TRACK_VSEL_MASK;
  571. }
  572. return 0;
  573. default:
  574. return 0;
  575. }
  576. ri->device_flags = (smps_offset & mult_offset) ? DCDC_OFFSET_EN : 0;
  577. ri->device_flags |= (smps_mult & mult_offset) ? DCDC_EXTENDED_EN : 0;
  578. switch (ri->device_flags) {
  579. case 0:
  580. ri->rinfo->desc.min_uV = 607700;
  581. ri->rinfo->desc.uV_step = 12660;
  582. break;
  583. case DCDC_OFFSET_EN:
  584. ri->rinfo->desc.min_uV = 700000;
  585. ri->rinfo->desc.uV_step = 12500;
  586. break;
  587. case DCDC_EXTENDED_EN:
  588. ri->rinfo->desc.min_uV = 1852000;
  589. ri->rinfo->desc.uV_step = 38600;
  590. break;
  591. case DCDC_OFFSET_EN | DCDC_EXTENDED_EN:
  592. ri->rinfo->desc.min_uV = 2161000;
  593. ri->rinfo->desc.uV_step = 38600;
  594. break;
  595. }
  596. return 0;
  597. }
  598. static int tps80031_regulator_probe(struct platform_device *pdev)
  599. {
  600. struct tps80031_platform_data *pdata;
  601. struct tps80031_regulator_platform_data *tps_pdata;
  602. struct tps80031_regulator *ri;
  603. struct tps80031_regulator *pmic;
  604. struct regulator_dev *rdev;
  605. struct regulator_config config = { };
  606. struct tps80031 *tps80031_mfd = dev_get_drvdata(pdev->dev.parent);
  607. int ret;
  608. int num;
  609. pdata = dev_get_platdata(pdev->dev.parent);
  610. if (!pdata) {
  611. dev_err(&pdev->dev, "No platform data\n");
  612. return -EINVAL;
  613. }
  614. pmic = devm_kzalloc(&pdev->dev,
  615. TPS80031_REGULATOR_MAX * sizeof(*pmic), GFP_KERNEL);
  616. if (!pmic)
  617. return -ENOMEM;
  618. for (num = 0; num < TPS80031_REGULATOR_MAX; ++num) {
  619. tps_pdata = pdata->regulator_pdata[num];
  620. ri = &pmic[num];
  621. ri->rinfo = &tps80031_rinfo[num];
  622. ri->dev = &pdev->dev;
  623. check_smps_mode_mult(pdev->dev.parent, ri);
  624. config.dev = &pdev->dev;
  625. config.init_data = NULL;
  626. config.driver_data = ri;
  627. config.regmap = tps80031_mfd->regmap[ri->rinfo->volt_id];
  628. if (tps_pdata) {
  629. config.init_data = tps_pdata->reg_init_data;
  630. ri->config_flags = tps_pdata->config_flags;
  631. ri->ext_ctrl_flag = tps_pdata->ext_ctrl_flag;
  632. ret = tps80031_regulator_config(pdev->dev.parent,
  633. ri, tps_pdata);
  634. if (ret < 0) {
  635. dev_err(&pdev->dev,
  636. "regulator config failed, e %d\n", ret);
  637. return ret;
  638. }
  639. ret = tps80031_power_req_config(pdev->dev.parent,
  640. ri, tps_pdata);
  641. if (ret < 0) {
  642. dev_err(&pdev->dev,
  643. "pwr_req config failed, err %d\n", ret);
  644. return ret;
  645. }
  646. }
  647. rdev = devm_regulator_register(&pdev->dev, &ri->rinfo->desc,
  648. &config);
  649. if (IS_ERR(rdev)) {
  650. dev_err(&pdev->dev,
  651. "register regulator failed %s\n",
  652. ri->rinfo->desc.name);
  653. return PTR_ERR(rdev);
  654. }
  655. ri->rdev = rdev;
  656. }
  657. platform_set_drvdata(pdev, pmic);
  658. return 0;
  659. }
  660. static struct platform_driver tps80031_regulator_driver = {
  661. .driver = {
  662. .name = "tps80031-pmic",
  663. },
  664. .probe = tps80031_regulator_probe,
  665. };
  666. static int __init tps80031_regulator_init(void)
  667. {
  668. return platform_driver_register(&tps80031_regulator_driver);
  669. }
  670. subsys_initcall(tps80031_regulator_init);
  671. static void __exit tps80031_regulator_exit(void)
  672. {
  673. platform_driver_unregister(&tps80031_regulator_driver);
  674. }
  675. module_exit(tps80031_regulator_exit);
  676. MODULE_ALIAS("platform:tps80031-regulator");
  677. MODULE_DESCRIPTION("Regulator Driver for TI TPS80031/TPS80032 PMIC");
  678. MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
  679. MODULE_LICENSE("GPL v2");