lp8788-ldo.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638
  1. /*
  2. * TI LP8788 MFD - ldo regulator driver
  3. *
  4. * Copyright 2012 Texas Instruments
  5. *
  6. * Author: Milo(Woogyom) Kim <milo.kim@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/regulator/driver.h>
  18. #include <linux/gpio.h>
  19. #include <linux/mfd/lp8788.h>
  20. /* register address */
  21. #define LP8788_EN_LDO_A 0x0D /* DLDO 1 ~ 8 */
  22. #define LP8788_EN_LDO_B 0x0E /* DLDO 9 ~ 12, ALDO 1 ~ 4 */
  23. #define LP8788_EN_LDO_C 0x0F /* ALDO 5 ~ 10 */
  24. #define LP8788_EN_SEL 0x10
  25. #define LP8788_DLDO1_VOUT 0x2E
  26. #define LP8788_DLDO2_VOUT 0x2F
  27. #define LP8788_DLDO3_VOUT 0x30
  28. #define LP8788_DLDO4_VOUT 0x31
  29. #define LP8788_DLDO5_VOUT 0x32
  30. #define LP8788_DLDO6_VOUT 0x33
  31. #define LP8788_DLDO7_VOUT 0x34
  32. #define LP8788_DLDO8_VOUT 0x35
  33. #define LP8788_DLDO9_VOUT 0x36
  34. #define LP8788_DLDO10_VOUT 0x37
  35. #define LP8788_DLDO11_VOUT 0x38
  36. #define LP8788_DLDO12_VOUT 0x39
  37. #define LP8788_ALDO1_VOUT 0x3A
  38. #define LP8788_ALDO2_VOUT 0x3B
  39. #define LP8788_ALDO3_VOUT 0x3C
  40. #define LP8788_ALDO4_VOUT 0x3D
  41. #define LP8788_ALDO5_VOUT 0x3E
  42. #define LP8788_ALDO6_VOUT 0x3F
  43. #define LP8788_ALDO7_VOUT 0x40
  44. #define LP8788_ALDO8_VOUT 0x41
  45. #define LP8788_ALDO9_VOUT 0x42
  46. #define LP8788_ALDO10_VOUT 0x43
  47. #define LP8788_DLDO1_TIMESTEP 0x44
  48. /* mask/shift bits */
  49. #define LP8788_EN_DLDO1_M BIT(0) /* Addr 0Dh ~ 0Fh */
  50. #define LP8788_EN_DLDO2_M BIT(1)
  51. #define LP8788_EN_DLDO3_M BIT(2)
  52. #define LP8788_EN_DLDO4_M BIT(3)
  53. #define LP8788_EN_DLDO5_M BIT(4)
  54. #define LP8788_EN_DLDO6_M BIT(5)
  55. #define LP8788_EN_DLDO7_M BIT(6)
  56. #define LP8788_EN_DLDO8_M BIT(7)
  57. #define LP8788_EN_DLDO9_M BIT(0)
  58. #define LP8788_EN_DLDO10_M BIT(1)
  59. #define LP8788_EN_DLDO11_M BIT(2)
  60. #define LP8788_EN_DLDO12_M BIT(3)
  61. #define LP8788_EN_ALDO1_M BIT(4)
  62. #define LP8788_EN_ALDO2_M BIT(5)
  63. #define LP8788_EN_ALDO3_M BIT(6)
  64. #define LP8788_EN_ALDO4_M BIT(7)
  65. #define LP8788_EN_ALDO5_M BIT(0)
  66. #define LP8788_EN_ALDO6_M BIT(1)
  67. #define LP8788_EN_ALDO7_M BIT(2)
  68. #define LP8788_EN_ALDO8_M BIT(3)
  69. #define LP8788_EN_ALDO9_M BIT(4)
  70. #define LP8788_EN_ALDO10_M BIT(5)
  71. #define LP8788_EN_SEL_DLDO911_M BIT(0) /* Addr 10h */
  72. #define LP8788_EN_SEL_DLDO7_M BIT(1)
  73. #define LP8788_EN_SEL_ALDO7_M BIT(2)
  74. #define LP8788_EN_SEL_ALDO5_M BIT(3)
  75. #define LP8788_EN_SEL_ALDO234_M BIT(4)
  76. #define LP8788_EN_SEL_ALDO1_M BIT(5)
  77. #define LP8788_VOUT_5BIT_M 0x1F /* Addr 2Eh ~ 43h */
  78. #define LP8788_VOUT_4BIT_M 0x0F
  79. #define LP8788_VOUT_3BIT_M 0x07
  80. #define LP8788_VOUT_1BIT_M 0x01
  81. #define LP8788_STARTUP_TIME_M 0xF8 /* Addr 44h ~ 59h */
  82. #define LP8788_STARTUP_TIME_S 3
  83. #define ENABLE_TIME_USEC 32
  84. #define ENABLE GPIOF_OUT_INIT_HIGH
  85. #define DISABLE GPIOF_OUT_INIT_LOW
  86. enum lp8788_ldo_id {
  87. DLDO1,
  88. DLDO2,
  89. DLDO3,
  90. DLDO4,
  91. DLDO5,
  92. DLDO6,
  93. DLDO7,
  94. DLDO8,
  95. DLDO9,
  96. DLDO10,
  97. DLDO11,
  98. DLDO12,
  99. ALDO1,
  100. ALDO2,
  101. ALDO3,
  102. ALDO4,
  103. ALDO5,
  104. ALDO6,
  105. ALDO7,
  106. ALDO8,
  107. ALDO9,
  108. ALDO10,
  109. };
  110. struct lp8788_ldo {
  111. struct lp8788 *lp;
  112. struct regulator_desc *desc;
  113. struct regulator_dev *regulator;
  114. struct lp8788_ldo_enable_pin *en_pin;
  115. };
  116. /* DLDO 1, 2, 3, 9 voltage table */
  117. static const int lp8788_dldo1239_vtbl[] = {
  118. 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
  119. 2600000, 2700000, 2800000, 2900000, 3000000, 2850000, 2850000, 2850000,
  120. 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
  121. 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000, 2850000,
  122. };
  123. /* DLDO 4 voltage table */
  124. static const int lp8788_dldo4_vtbl[] = { 1800000, 3000000 };
  125. /* DLDO 5, 7, 8 and ALDO 6 voltage table */
  126. static const int lp8788_dldo578_aldo6_vtbl[] = {
  127. 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
  128. 2600000, 2700000, 2800000, 2900000, 3000000, 3000000, 3000000, 3000000,
  129. };
  130. /* DLDO 6 voltage table */
  131. static const int lp8788_dldo6_vtbl[] = {
  132. 3000000, 3100000, 3200000, 3300000, 3400000, 3500000, 3600000, 3600000,
  133. };
  134. /* DLDO 10, 11 voltage table */
  135. static const int lp8788_dldo1011_vtbl[] = {
  136. 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000,
  137. 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000, 1500000,
  138. };
  139. /* ALDO 1 voltage table */
  140. static const int lp8788_aldo1_vtbl[] = { 1800000, 2850000 };
  141. /* ALDO 7 voltage table */
  142. static const int lp8788_aldo7_vtbl[] = {
  143. 1200000, 1300000, 1400000, 1500000, 1600000, 1700000, 1800000, 1800000,
  144. };
  145. static int lp8788_ldo_enable_time(struct regulator_dev *rdev)
  146. {
  147. struct lp8788_ldo *ldo = rdev_get_drvdata(rdev);
  148. enum lp8788_ldo_id id = rdev_get_id(rdev);
  149. u8 val, addr = LP8788_DLDO1_TIMESTEP + id;
  150. if (lp8788_read_byte(ldo->lp, addr, &val))
  151. return -EINVAL;
  152. val = (val & LP8788_STARTUP_TIME_M) >> LP8788_STARTUP_TIME_S;
  153. return ENABLE_TIME_USEC * val;
  154. }
  155. static const struct regulator_ops lp8788_ldo_voltage_table_ops = {
  156. .list_voltage = regulator_list_voltage_table,
  157. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  158. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  159. .enable = regulator_enable_regmap,
  160. .disable = regulator_disable_regmap,
  161. .is_enabled = regulator_is_enabled_regmap,
  162. .enable_time = lp8788_ldo_enable_time,
  163. };
  164. static const struct regulator_ops lp8788_ldo_voltage_fixed_ops = {
  165. .list_voltage = regulator_list_voltage_linear,
  166. .enable = regulator_enable_regmap,
  167. .disable = regulator_disable_regmap,
  168. .is_enabled = regulator_is_enabled_regmap,
  169. .enable_time = lp8788_ldo_enable_time,
  170. };
  171. static struct regulator_desc lp8788_dldo_desc[] = {
  172. {
  173. .name = "dldo1",
  174. .id = DLDO1,
  175. .ops = &lp8788_ldo_voltage_table_ops,
  176. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  177. .volt_table = lp8788_dldo1239_vtbl,
  178. .type = REGULATOR_VOLTAGE,
  179. .owner = THIS_MODULE,
  180. .vsel_reg = LP8788_DLDO1_VOUT,
  181. .vsel_mask = LP8788_VOUT_5BIT_M,
  182. .enable_reg = LP8788_EN_LDO_A,
  183. .enable_mask = LP8788_EN_DLDO1_M,
  184. },
  185. {
  186. .name = "dldo2",
  187. .id = DLDO2,
  188. .ops = &lp8788_ldo_voltage_table_ops,
  189. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  190. .volt_table = lp8788_dldo1239_vtbl,
  191. .type = REGULATOR_VOLTAGE,
  192. .owner = THIS_MODULE,
  193. .vsel_reg = LP8788_DLDO2_VOUT,
  194. .vsel_mask = LP8788_VOUT_5BIT_M,
  195. .enable_reg = LP8788_EN_LDO_A,
  196. .enable_mask = LP8788_EN_DLDO2_M,
  197. },
  198. {
  199. .name = "dldo3",
  200. .id = DLDO3,
  201. .ops = &lp8788_ldo_voltage_table_ops,
  202. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  203. .volt_table = lp8788_dldo1239_vtbl,
  204. .type = REGULATOR_VOLTAGE,
  205. .owner = THIS_MODULE,
  206. .vsel_reg = LP8788_DLDO3_VOUT,
  207. .vsel_mask = LP8788_VOUT_5BIT_M,
  208. .enable_reg = LP8788_EN_LDO_A,
  209. .enable_mask = LP8788_EN_DLDO3_M,
  210. },
  211. {
  212. .name = "dldo4",
  213. .id = DLDO4,
  214. .ops = &lp8788_ldo_voltage_table_ops,
  215. .n_voltages = ARRAY_SIZE(lp8788_dldo4_vtbl),
  216. .volt_table = lp8788_dldo4_vtbl,
  217. .type = REGULATOR_VOLTAGE,
  218. .owner = THIS_MODULE,
  219. .vsel_reg = LP8788_DLDO4_VOUT,
  220. .vsel_mask = LP8788_VOUT_1BIT_M,
  221. .enable_reg = LP8788_EN_LDO_A,
  222. .enable_mask = LP8788_EN_DLDO4_M,
  223. },
  224. {
  225. .name = "dldo5",
  226. .id = DLDO5,
  227. .ops = &lp8788_ldo_voltage_table_ops,
  228. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  229. .volt_table = lp8788_dldo578_aldo6_vtbl,
  230. .type = REGULATOR_VOLTAGE,
  231. .owner = THIS_MODULE,
  232. .vsel_reg = LP8788_DLDO5_VOUT,
  233. .vsel_mask = LP8788_VOUT_4BIT_M,
  234. .enable_reg = LP8788_EN_LDO_A,
  235. .enable_mask = LP8788_EN_DLDO5_M,
  236. },
  237. {
  238. .name = "dldo6",
  239. .id = DLDO6,
  240. .ops = &lp8788_ldo_voltage_table_ops,
  241. .n_voltages = ARRAY_SIZE(lp8788_dldo6_vtbl),
  242. .volt_table = lp8788_dldo6_vtbl,
  243. .type = REGULATOR_VOLTAGE,
  244. .owner = THIS_MODULE,
  245. .vsel_reg = LP8788_DLDO6_VOUT,
  246. .vsel_mask = LP8788_VOUT_3BIT_M,
  247. .enable_reg = LP8788_EN_LDO_A,
  248. .enable_mask = LP8788_EN_DLDO6_M,
  249. },
  250. {
  251. .name = "dldo7",
  252. .id = DLDO7,
  253. .ops = &lp8788_ldo_voltage_table_ops,
  254. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  255. .volt_table = lp8788_dldo578_aldo6_vtbl,
  256. .type = REGULATOR_VOLTAGE,
  257. .owner = THIS_MODULE,
  258. .vsel_reg = LP8788_DLDO7_VOUT,
  259. .vsel_mask = LP8788_VOUT_4BIT_M,
  260. .enable_reg = LP8788_EN_LDO_A,
  261. .enable_mask = LP8788_EN_DLDO7_M,
  262. },
  263. {
  264. .name = "dldo8",
  265. .id = DLDO8,
  266. .ops = &lp8788_ldo_voltage_table_ops,
  267. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  268. .volt_table = lp8788_dldo578_aldo6_vtbl,
  269. .type = REGULATOR_VOLTAGE,
  270. .owner = THIS_MODULE,
  271. .vsel_reg = LP8788_DLDO8_VOUT,
  272. .vsel_mask = LP8788_VOUT_4BIT_M,
  273. .enable_reg = LP8788_EN_LDO_A,
  274. .enable_mask = LP8788_EN_DLDO8_M,
  275. },
  276. {
  277. .name = "dldo9",
  278. .id = DLDO9,
  279. .ops = &lp8788_ldo_voltage_table_ops,
  280. .n_voltages = ARRAY_SIZE(lp8788_dldo1239_vtbl),
  281. .volt_table = lp8788_dldo1239_vtbl,
  282. .type = REGULATOR_VOLTAGE,
  283. .owner = THIS_MODULE,
  284. .vsel_reg = LP8788_DLDO9_VOUT,
  285. .vsel_mask = LP8788_VOUT_5BIT_M,
  286. .enable_reg = LP8788_EN_LDO_B,
  287. .enable_mask = LP8788_EN_DLDO9_M,
  288. },
  289. {
  290. .name = "dldo10",
  291. .id = DLDO10,
  292. .ops = &lp8788_ldo_voltage_table_ops,
  293. .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
  294. .volt_table = lp8788_dldo1011_vtbl,
  295. .type = REGULATOR_VOLTAGE,
  296. .owner = THIS_MODULE,
  297. .vsel_reg = LP8788_DLDO10_VOUT,
  298. .vsel_mask = LP8788_VOUT_4BIT_M,
  299. .enable_reg = LP8788_EN_LDO_B,
  300. .enable_mask = LP8788_EN_DLDO10_M,
  301. },
  302. {
  303. .name = "dldo11",
  304. .id = DLDO11,
  305. .ops = &lp8788_ldo_voltage_table_ops,
  306. .n_voltages = ARRAY_SIZE(lp8788_dldo1011_vtbl),
  307. .volt_table = lp8788_dldo1011_vtbl,
  308. .type = REGULATOR_VOLTAGE,
  309. .owner = THIS_MODULE,
  310. .vsel_reg = LP8788_DLDO11_VOUT,
  311. .vsel_mask = LP8788_VOUT_4BIT_M,
  312. .enable_reg = LP8788_EN_LDO_B,
  313. .enable_mask = LP8788_EN_DLDO11_M,
  314. },
  315. {
  316. .name = "dldo12",
  317. .id = DLDO12,
  318. .ops = &lp8788_ldo_voltage_fixed_ops,
  319. .n_voltages = 1,
  320. .type = REGULATOR_VOLTAGE,
  321. .owner = THIS_MODULE,
  322. .enable_reg = LP8788_EN_LDO_B,
  323. .enable_mask = LP8788_EN_DLDO12_M,
  324. .min_uV = 2500000,
  325. },
  326. };
  327. static struct regulator_desc lp8788_aldo_desc[] = {
  328. {
  329. .name = "aldo1",
  330. .id = ALDO1,
  331. .ops = &lp8788_ldo_voltage_table_ops,
  332. .n_voltages = ARRAY_SIZE(lp8788_aldo1_vtbl),
  333. .volt_table = lp8788_aldo1_vtbl,
  334. .type = REGULATOR_VOLTAGE,
  335. .owner = THIS_MODULE,
  336. .vsel_reg = LP8788_ALDO1_VOUT,
  337. .vsel_mask = LP8788_VOUT_1BIT_M,
  338. .enable_reg = LP8788_EN_LDO_B,
  339. .enable_mask = LP8788_EN_ALDO1_M,
  340. },
  341. {
  342. .name = "aldo2",
  343. .id = ALDO2,
  344. .ops = &lp8788_ldo_voltage_fixed_ops,
  345. .n_voltages = 1,
  346. .type = REGULATOR_VOLTAGE,
  347. .owner = THIS_MODULE,
  348. .enable_reg = LP8788_EN_LDO_B,
  349. .enable_mask = LP8788_EN_ALDO2_M,
  350. .min_uV = 2850000,
  351. },
  352. {
  353. .name = "aldo3",
  354. .id = ALDO3,
  355. .ops = &lp8788_ldo_voltage_fixed_ops,
  356. .n_voltages = 1,
  357. .type = REGULATOR_VOLTAGE,
  358. .owner = THIS_MODULE,
  359. .enable_reg = LP8788_EN_LDO_B,
  360. .enable_mask = LP8788_EN_ALDO3_M,
  361. .min_uV = 2850000,
  362. },
  363. {
  364. .name = "aldo4",
  365. .id = ALDO4,
  366. .ops = &lp8788_ldo_voltage_fixed_ops,
  367. .n_voltages = 1,
  368. .type = REGULATOR_VOLTAGE,
  369. .owner = THIS_MODULE,
  370. .enable_reg = LP8788_EN_LDO_B,
  371. .enable_mask = LP8788_EN_ALDO4_M,
  372. .min_uV = 2850000,
  373. },
  374. {
  375. .name = "aldo5",
  376. .id = ALDO5,
  377. .ops = &lp8788_ldo_voltage_fixed_ops,
  378. .n_voltages = 1,
  379. .type = REGULATOR_VOLTAGE,
  380. .owner = THIS_MODULE,
  381. .enable_reg = LP8788_EN_LDO_C,
  382. .enable_mask = LP8788_EN_ALDO5_M,
  383. .min_uV = 2850000,
  384. },
  385. {
  386. .name = "aldo6",
  387. .id = ALDO6,
  388. .ops = &lp8788_ldo_voltage_table_ops,
  389. .n_voltages = ARRAY_SIZE(lp8788_dldo578_aldo6_vtbl),
  390. .volt_table = lp8788_dldo578_aldo6_vtbl,
  391. .type = REGULATOR_VOLTAGE,
  392. .owner = THIS_MODULE,
  393. .vsel_reg = LP8788_ALDO6_VOUT,
  394. .vsel_mask = LP8788_VOUT_4BIT_M,
  395. .enable_reg = LP8788_EN_LDO_C,
  396. .enable_mask = LP8788_EN_ALDO6_M,
  397. },
  398. {
  399. .name = "aldo7",
  400. .id = ALDO7,
  401. .ops = &lp8788_ldo_voltage_table_ops,
  402. .n_voltages = ARRAY_SIZE(lp8788_aldo7_vtbl),
  403. .volt_table = lp8788_aldo7_vtbl,
  404. .type = REGULATOR_VOLTAGE,
  405. .owner = THIS_MODULE,
  406. .vsel_reg = LP8788_ALDO7_VOUT,
  407. .vsel_mask = LP8788_VOUT_3BIT_M,
  408. .enable_reg = LP8788_EN_LDO_C,
  409. .enable_mask = LP8788_EN_ALDO7_M,
  410. },
  411. {
  412. .name = "aldo8",
  413. .id = ALDO8,
  414. .ops = &lp8788_ldo_voltage_fixed_ops,
  415. .n_voltages = 1,
  416. .type = REGULATOR_VOLTAGE,
  417. .owner = THIS_MODULE,
  418. .enable_reg = LP8788_EN_LDO_C,
  419. .enable_mask = LP8788_EN_ALDO8_M,
  420. .min_uV = 2500000,
  421. },
  422. {
  423. .name = "aldo9",
  424. .id = ALDO9,
  425. .ops = &lp8788_ldo_voltage_fixed_ops,
  426. .n_voltages = 1,
  427. .type = REGULATOR_VOLTAGE,
  428. .owner = THIS_MODULE,
  429. .enable_reg = LP8788_EN_LDO_C,
  430. .enable_mask = LP8788_EN_ALDO9_M,
  431. .min_uV = 2500000,
  432. },
  433. {
  434. .name = "aldo10",
  435. .id = ALDO10,
  436. .ops = &lp8788_ldo_voltage_fixed_ops,
  437. .n_voltages = 1,
  438. .type = REGULATOR_VOLTAGE,
  439. .owner = THIS_MODULE,
  440. .enable_reg = LP8788_EN_LDO_C,
  441. .enable_mask = LP8788_EN_ALDO10_M,
  442. .min_uV = 1100000,
  443. },
  444. };
  445. static int lp8788_config_ldo_enable_mode(struct platform_device *pdev,
  446. struct lp8788_ldo *ldo,
  447. enum lp8788_ldo_id id)
  448. {
  449. struct lp8788 *lp = ldo->lp;
  450. struct lp8788_platform_data *pdata = lp->pdata;
  451. enum lp8788_ext_ldo_en_id enable_id;
  452. u8 en_mask[] = {
  453. [EN_ALDO1] = LP8788_EN_SEL_ALDO1_M,
  454. [EN_ALDO234] = LP8788_EN_SEL_ALDO234_M,
  455. [EN_ALDO5] = LP8788_EN_SEL_ALDO5_M,
  456. [EN_ALDO7] = LP8788_EN_SEL_ALDO7_M,
  457. [EN_DLDO7] = LP8788_EN_SEL_DLDO7_M,
  458. [EN_DLDO911] = LP8788_EN_SEL_DLDO911_M,
  459. };
  460. switch (id) {
  461. case DLDO7:
  462. enable_id = EN_DLDO7;
  463. break;
  464. case DLDO9:
  465. case DLDO11:
  466. enable_id = EN_DLDO911;
  467. break;
  468. case ALDO1:
  469. enable_id = EN_ALDO1;
  470. break;
  471. case ALDO2 ... ALDO4:
  472. enable_id = EN_ALDO234;
  473. break;
  474. case ALDO5:
  475. enable_id = EN_ALDO5;
  476. break;
  477. case ALDO7:
  478. enable_id = EN_ALDO7;
  479. break;
  480. default:
  481. return 0;
  482. }
  483. /* if no platform data for ldo pin, then set default enable mode */
  484. if (!pdata || !pdata->ldo_pin || !pdata->ldo_pin[enable_id])
  485. goto set_default_ldo_enable_mode;
  486. ldo->en_pin = pdata->ldo_pin[enable_id];
  487. return 0;
  488. set_default_ldo_enable_mode:
  489. return lp8788_update_bits(lp, LP8788_EN_SEL, en_mask[enable_id], 0);
  490. }
  491. static int lp8788_dldo_probe(struct platform_device *pdev)
  492. {
  493. struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
  494. int id = pdev->id;
  495. struct lp8788_ldo *ldo;
  496. struct regulator_config cfg = { };
  497. struct regulator_dev *rdev;
  498. int ret;
  499. ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
  500. if (!ldo)
  501. return -ENOMEM;
  502. ldo->lp = lp;
  503. ret = lp8788_config_ldo_enable_mode(pdev, ldo, id);
  504. if (ret)
  505. return ret;
  506. if (ldo->en_pin) {
  507. cfg.ena_gpio = ldo->en_pin->gpio;
  508. cfg.ena_gpio_flags = ldo->en_pin->init_state;
  509. }
  510. cfg.dev = pdev->dev.parent;
  511. cfg.init_data = lp->pdata ? lp->pdata->dldo_data[id] : NULL;
  512. cfg.driver_data = ldo;
  513. cfg.regmap = lp->regmap;
  514. rdev = devm_regulator_register(&pdev->dev, &lp8788_dldo_desc[id], &cfg);
  515. if (IS_ERR(rdev)) {
  516. ret = PTR_ERR(rdev);
  517. dev_err(&pdev->dev, "DLDO%d regulator register err = %d\n",
  518. id + 1, ret);
  519. return ret;
  520. }
  521. ldo->regulator = rdev;
  522. platform_set_drvdata(pdev, ldo);
  523. return 0;
  524. }
  525. static struct platform_driver lp8788_dldo_driver = {
  526. .probe = lp8788_dldo_probe,
  527. .driver = {
  528. .name = LP8788_DEV_DLDO,
  529. },
  530. };
  531. static int lp8788_aldo_probe(struct platform_device *pdev)
  532. {
  533. struct lp8788 *lp = dev_get_drvdata(pdev->dev.parent);
  534. int id = pdev->id;
  535. struct lp8788_ldo *ldo;
  536. struct regulator_config cfg = { };
  537. struct regulator_dev *rdev;
  538. int ret;
  539. ldo = devm_kzalloc(&pdev->dev, sizeof(struct lp8788_ldo), GFP_KERNEL);
  540. if (!ldo)
  541. return -ENOMEM;
  542. ldo->lp = lp;
  543. ret = lp8788_config_ldo_enable_mode(pdev, ldo, id + ALDO1);
  544. if (ret)
  545. return ret;
  546. if (ldo->en_pin) {
  547. cfg.ena_gpio = ldo->en_pin->gpio;
  548. cfg.ena_gpio_flags = ldo->en_pin->init_state;
  549. }
  550. cfg.dev = pdev->dev.parent;
  551. cfg.init_data = lp->pdata ? lp->pdata->aldo_data[id] : NULL;
  552. cfg.driver_data = ldo;
  553. cfg.regmap = lp->regmap;
  554. rdev = devm_regulator_register(&pdev->dev, &lp8788_aldo_desc[id], &cfg);
  555. if (IS_ERR(rdev)) {
  556. ret = PTR_ERR(rdev);
  557. dev_err(&pdev->dev, "ALDO%d regulator register err = %d\n",
  558. id + 1, ret);
  559. return ret;
  560. }
  561. ldo->regulator = rdev;
  562. platform_set_drvdata(pdev, ldo);
  563. return 0;
  564. }
  565. static struct platform_driver lp8788_aldo_driver = {
  566. .probe = lp8788_aldo_probe,
  567. .driver = {
  568. .name = LP8788_DEV_ALDO,
  569. },
  570. };
  571. static struct platform_driver * const drivers[] = {
  572. &lp8788_dldo_driver,
  573. &lp8788_aldo_driver,
  574. };
  575. static int __init lp8788_ldo_init(void)
  576. {
  577. return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
  578. }
  579. subsys_initcall(lp8788_ldo_init);
  580. static void __exit lp8788_ldo_exit(void)
  581. {
  582. platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
  583. }
  584. module_exit(lp8788_ldo_exit);
  585. MODULE_DESCRIPTION("TI LP8788 LDO Driver");
  586. MODULE_AUTHOR("Milo Kim");
  587. MODULE_LICENSE("GPL");
  588. MODULE_ALIAS("platform:lp8788-dldo");
  589. MODULE_ALIAS("platform:lp8788-aldo");