intel_punit_ipc.c 8.9 KB

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  1. /*
  2. * Driver for the Intel P-Unit Mailbox IPC mechanism
  3. *
  4. * (C) Copyright 2015 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * The heart of the P-Unit is the Foxton microcontroller and its firmware,
  11. * which provide mailbox interface for power management usage.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/acpi.h>
  15. #include <linux/delay.h>
  16. #include <linux/bitops.h>
  17. #include <linux/device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/platform_device.h>
  20. #include <asm/intel_punit_ipc.h>
  21. /* IPC Mailbox registers */
  22. #define OFFSET_DATA_LOW 0x0
  23. #define OFFSET_DATA_HIGH 0x4
  24. /* bit field of interface register */
  25. #define CMD_RUN BIT(31)
  26. #define CMD_ERRCODE_MASK GENMASK(7, 0)
  27. #define CMD_PARA1_SHIFT 8
  28. #define CMD_PARA2_SHIFT 16
  29. #define CMD_TIMEOUT_SECONDS 1
  30. enum {
  31. BASE_DATA = 0,
  32. BASE_IFACE,
  33. BASE_MAX,
  34. };
  35. typedef struct {
  36. struct device *dev;
  37. struct mutex lock;
  38. int irq;
  39. struct completion cmd_complete;
  40. /* base of interface and data registers */
  41. void __iomem *base[RESERVED_IPC][BASE_MAX];
  42. IPC_TYPE type;
  43. } IPC_DEV;
  44. static IPC_DEV *punit_ipcdev;
  45. static inline u32 ipc_read_status(IPC_DEV *ipcdev, IPC_TYPE type)
  46. {
  47. return readl(ipcdev->base[type][BASE_IFACE]);
  48. }
  49. static inline void ipc_write_cmd(IPC_DEV *ipcdev, IPC_TYPE type, u32 cmd)
  50. {
  51. writel(cmd, ipcdev->base[type][BASE_IFACE]);
  52. }
  53. static inline u32 ipc_read_data_low(IPC_DEV *ipcdev, IPC_TYPE type)
  54. {
  55. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  56. }
  57. static inline u32 ipc_read_data_high(IPC_DEV *ipcdev, IPC_TYPE type)
  58. {
  59. return readl(ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  60. }
  61. static inline void ipc_write_data_low(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  62. {
  63. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_LOW);
  64. }
  65. static inline void ipc_write_data_high(IPC_DEV *ipcdev, IPC_TYPE type, u32 data)
  66. {
  67. writel(data, ipcdev->base[type][BASE_DATA] + OFFSET_DATA_HIGH);
  68. }
  69. static const char *ipc_err_string(int error)
  70. {
  71. if (error == IPC_PUNIT_ERR_SUCCESS)
  72. return "no error";
  73. else if (error == IPC_PUNIT_ERR_INVALID_CMD)
  74. return "invalid command";
  75. else if (error == IPC_PUNIT_ERR_INVALID_PARAMETER)
  76. return "invalid parameter";
  77. else if (error == IPC_PUNIT_ERR_CMD_TIMEOUT)
  78. return "command timeout";
  79. else if (error == IPC_PUNIT_ERR_CMD_LOCKED)
  80. return "command locked";
  81. else if (error == IPC_PUNIT_ERR_INVALID_VR_ID)
  82. return "invalid vr id";
  83. else if (error == IPC_PUNIT_ERR_VR_ERR)
  84. return "vr error";
  85. else
  86. return "unknown error";
  87. }
  88. static int intel_punit_ipc_check_status(IPC_DEV *ipcdev, IPC_TYPE type)
  89. {
  90. int loops = CMD_TIMEOUT_SECONDS * USEC_PER_SEC;
  91. int errcode;
  92. int status;
  93. if (ipcdev->irq) {
  94. if (!wait_for_completion_timeout(&ipcdev->cmd_complete,
  95. CMD_TIMEOUT_SECONDS * HZ)) {
  96. dev_err(ipcdev->dev, "IPC timed out\n");
  97. return -ETIMEDOUT;
  98. }
  99. } else {
  100. while ((ipc_read_status(ipcdev, type) & CMD_RUN) && --loops)
  101. udelay(1);
  102. if (!loops) {
  103. dev_err(ipcdev->dev, "IPC timed out\n");
  104. return -ETIMEDOUT;
  105. }
  106. }
  107. status = ipc_read_status(ipcdev, type);
  108. errcode = status & CMD_ERRCODE_MASK;
  109. if (errcode) {
  110. dev_err(ipcdev->dev, "IPC failed: %s, IPC_STS=0x%x\n",
  111. ipc_err_string(errcode), status);
  112. return -EIO;
  113. }
  114. return 0;
  115. }
  116. /**
  117. * intel_punit_ipc_simple_command() - Simple IPC command
  118. * @cmd: IPC command code.
  119. * @para1: First 8bit parameter, set 0 if not used.
  120. * @para2: Second 8bit parameter, set 0 if not used.
  121. *
  122. * Send a IPC command to P-Unit when there is no data transaction
  123. *
  124. * Return: IPC error code or 0 on success.
  125. */
  126. int intel_punit_ipc_simple_command(int cmd, int para1, int para2)
  127. {
  128. IPC_DEV *ipcdev = punit_ipcdev;
  129. IPC_TYPE type;
  130. u32 val;
  131. int ret;
  132. mutex_lock(&ipcdev->lock);
  133. reinit_completion(&ipcdev->cmd_complete);
  134. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  135. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  136. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  137. ipc_write_cmd(ipcdev, type, val);
  138. ret = intel_punit_ipc_check_status(ipcdev, type);
  139. mutex_unlock(&ipcdev->lock);
  140. return ret;
  141. }
  142. EXPORT_SYMBOL(intel_punit_ipc_simple_command);
  143. /**
  144. * intel_punit_ipc_command() - IPC command with data and pointers
  145. * @cmd: IPC command code.
  146. * @para1: First 8bit parameter, set 0 if not used.
  147. * @para2: Second 8bit parameter, set 0 if not used.
  148. * @in: Input data, 32bit for BIOS cmd, two 32bit for GTD and ISPD.
  149. * @out: Output data.
  150. *
  151. * Send a IPC command to P-Unit with data transaction
  152. *
  153. * Return: IPC error code or 0 on success.
  154. */
  155. int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out)
  156. {
  157. IPC_DEV *ipcdev = punit_ipcdev;
  158. IPC_TYPE type;
  159. u32 val;
  160. int ret;
  161. mutex_lock(&ipcdev->lock);
  162. reinit_completion(&ipcdev->cmd_complete);
  163. type = (cmd & IPC_PUNIT_CMD_TYPE_MASK) >> IPC_TYPE_OFFSET;
  164. if (in) {
  165. ipc_write_data_low(ipcdev, type, *in);
  166. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  167. ipc_write_data_high(ipcdev, type, *++in);
  168. }
  169. val = cmd & ~IPC_PUNIT_CMD_TYPE_MASK;
  170. val |= CMD_RUN | para2 << CMD_PARA2_SHIFT | para1 << CMD_PARA1_SHIFT;
  171. ipc_write_cmd(ipcdev, type, val);
  172. ret = intel_punit_ipc_check_status(ipcdev, type);
  173. if (ret)
  174. goto out;
  175. if (out) {
  176. *out = ipc_read_data_low(ipcdev, type);
  177. if (type == GTDRIVER_IPC || type == ISPDRIVER_IPC)
  178. *++out = ipc_read_data_high(ipcdev, type);
  179. }
  180. out:
  181. mutex_unlock(&ipcdev->lock);
  182. return ret;
  183. }
  184. EXPORT_SYMBOL_GPL(intel_punit_ipc_command);
  185. static irqreturn_t intel_punit_ioc(int irq, void *dev_id)
  186. {
  187. IPC_DEV *ipcdev = dev_id;
  188. complete(&ipcdev->cmd_complete);
  189. return IRQ_HANDLED;
  190. }
  191. static int intel_punit_get_bars(struct platform_device *pdev)
  192. {
  193. struct resource *res;
  194. void __iomem *addr;
  195. /*
  196. * The following resources are required
  197. * - BIOS_IPC BASE_DATA
  198. * - BIOS_IPC BASE_IFACE
  199. */
  200. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  201. addr = devm_ioremap_resource(&pdev->dev, res);
  202. if (IS_ERR(addr))
  203. return PTR_ERR(addr);
  204. punit_ipcdev->base[BIOS_IPC][BASE_DATA] = addr;
  205. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  206. addr = devm_ioremap_resource(&pdev->dev, res);
  207. if (IS_ERR(addr))
  208. return PTR_ERR(addr);
  209. punit_ipcdev->base[BIOS_IPC][BASE_IFACE] = addr;
  210. /*
  211. * The following resources are optional
  212. * - ISPDRIVER_IPC BASE_DATA
  213. * - ISPDRIVER_IPC BASE_IFACE
  214. * - GTDRIVER_IPC BASE_DATA
  215. * - GTDRIVER_IPC BASE_IFACE
  216. */
  217. res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
  218. if (res && resource_size(res) > 1) {
  219. addr = devm_ioremap_resource(&pdev->dev, res);
  220. if (!IS_ERR(addr))
  221. punit_ipcdev->base[ISPDRIVER_IPC][BASE_DATA] = addr;
  222. }
  223. res = platform_get_resource(pdev, IORESOURCE_MEM, 3);
  224. if (res && resource_size(res) > 1) {
  225. addr = devm_ioremap_resource(&pdev->dev, res);
  226. if (!IS_ERR(addr))
  227. punit_ipcdev->base[ISPDRIVER_IPC][BASE_IFACE] = addr;
  228. }
  229. res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
  230. if (res && resource_size(res) > 1) {
  231. addr = devm_ioremap_resource(&pdev->dev, res);
  232. if (!IS_ERR(addr))
  233. punit_ipcdev->base[GTDRIVER_IPC][BASE_DATA] = addr;
  234. }
  235. res = platform_get_resource(pdev, IORESOURCE_MEM, 5);
  236. if (res && resource_size(res) > 1) {
  237. addr = devm_ioremap_resource(&pdev->dev, res);
  238. if (!IS_ERR(addr))
  239. punit_ipcdev->base[GTDRIVER_IPC][BASE_IFACE] = addr;
  240. }
  241. return 0;
  242. }
  243. static int intel_punit_ipc_probe(struct platform_device *pdev)
  244. {
  245. int irq, ret;
  246. punit_ipcdev = devm_kzalloc(&pdev->dev,
  247. sizeof(*punit_ipcdev), GFP_KERNEL);
  248. if (!punit_ipcdev)
  249. return -ENOMEM;
  250. platform_set_drvdata(pdev, punit_ipcdev);
  251. irq = platform_get_irq(pdev, 0);
  252. if (irq < 0) {
  253. punit_ipcdev->irq = 0;
  254. dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n");
  255. } else {
  256. ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc,
  257. IRQF_NO_SUSPEND, "intel_punit_ipc",
  258. &punit_ipcdev);
  259. if (ret) {
  260. dev_err(&pdev->dev, "Failed to request irq: %d\n", irq);
  261. return ret;
  262. }
  263. punit_ipcdev->irq = irq;
  264. }
  265. ret = intel_punit_get_bars(pdev);
  266. if (ret)
  267. goto out;
  268. punit_ipcdev->dev = &pdev->dev;
  269. mutex_init(&punit_ipcdev->lock);
  270. init_completion(&punit_ipcdev->cmd_complete);
  271. out:
  272. return ret;
  273. }
  274. static int intel_punit_ipc_remove(struct platform_device *pdev)
  275. {
  276. return 0;
  277. }
  278. static const struct acpi_device_id punit_ipc_acpi_ids[] = {
  279. { "INT34D4", 0 },
  280. { }
  281. };
  282. static struct platform_driver intel_punit_ipc_driver = {
  283. .probe = intel_punit_ipc_probe,
  284. .remove = intel_punit_ipc_remove,
  285. .driver = {
  286. .name = "intel_punit_ipc",
  287. .acpi_match_table = ACPI_PTR(punit_ipc_acpi_ids),
  288. },
  289. };
  290. static int __init intel_punit_ipc_init(void)
  291. {
  292. return platform_driver_register(&intel_punit_ipc_driver);
  293. }
  294. static void __exit intel_punit_ipc_exit(void)
  295. {
  296. platform_driver_unregister(&intel_punit_ipc_driver);
  297. }
  298. MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
  299. MODULE_DESCRIPTION("Intel P-Unit IPC driver");
  300. MODULE_LICENSE("GPL v2");
  301. /* Some modules are dependent on this, so init earlier */
  302. fs_initcall(intel_punit_ipc_init);
  303. module_exit(intel_punit_ipc_exit);