soc_common.h 5.7 KB

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  1. /*
  2. * linux/drivers/pcmcia/soc_common.h
  3. *
  4. * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
  5. *
  6. * This file contains definitions for the PCMCIA support code common to
  7. * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
  8. */
  9. #ifndef _ASM_ARCH_PCMCIA
  10. #define _ASM_ARCH_PCMCIA
  11. /* include the world */
  12. #include <linux/clk.h>
  13. #include <linux/cpufreq.h>
  14. #include <pcmcia/ss.h>
  15. #include <pcmcia/cistpl.h>
  16. struct device;
  17. struct gpio_desc;
  18. struct pcmcia_low_level;
  19. struct regulator;
  20. struct soc_pcmcia_regulator {
  21. struct regulator *reg;
  22. bool on;
  23. };
  24. /*
  25. * This structure encapsulates per-socket state which we might need to
  26. * use when responding to a Card Services query of some kind.
  27. */
  28. struct soc_pcmcia_socket {
  29. struct pcmcia_socket socket;
  30. /*
  31. * Info from low level handler
  32. */
  33. unsigned int nr;
  34. struct clk *clk;
  35. /*
  36. * Core PCMCIA state
  37. */
  38. const struct pcmcia_low_level *ops;
  39. unsigned int status;
  40. socket_state_t cs_state;
  41. unsigned short spd_io[MAX_IO_WIN];
  42. unsigned short spd_mem[MAX_WIN];
  43. unsigned short spd_attr[MAX_WIN];
  44. struct resource res_skt;
  45. struct resource res_io;
  46. struct resource res_mem;
  47. struct resource res_attr;
  48. void __iomem *virt_io;
  49. struct {
  50. int gpio;
  51. struct gpio_desc *desc;
  52. unsigned int irq;
  53. const char *name;
  54. } stat[6];
  55. #define SOC_STAT_CD 0 /* Card detect */
  56. #define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */
  57. #define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */
  58. #define SOC_STAT_RDY 3 /* Ready / Interrupt */
  59. #define SOC_STAT_VS1 4 /* Voltage sense 1 */
  60. #define SOC_STAT_VS2 5 /* Voltage sense 2 */
  61. struct gpio_desc *gpio_reset;
  62. struct gpio_desc *gpio_bus_enable;
  63. struct soc_pcmcia_regulator vcc;
  64. struct soc_pcmcia_regulator vpp;
  65. unsigned int irq_state;
  66. #ifdef CONFIG_CPU_FREQ
  67. struct notifier_block cpufreq_nb;
  68. #endif
  69. struct timer_list poll_timer;
  70. struct list_head node;
  71. void *driver_data;
  72. };
  73. struct skt_dev_info {
  74. int nskt;
  75. struct soc_pcmcia_socket skt[0];
  76. };
  77. struct pcmcia_state {
  78. unsigned detect: 1,
  79. ready: 1,
  80. bvd1: 1,
  81. bvd2: 1,
  82. wrprot: 1,
  83. vs_3v: 1,
  84. vs_Xv: 1;
  85. };
  86. struct pcmcia_low_level {
  87. struct module *owner;
  88. /* first socket in system */
  89. int first;
  90. /* nr of sockets */
  91. int nr;
  92. int (*hw_init)(struct soc_pcmcia_socket *);
  93. void (*hw_shutdown)(struct soc_pcmcia_socket *);
  94. void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  95. int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  96. /*
  97. * Enable card status IRQs on (re-)initialisation. This can
  98. * be called at initialisation, power management event, or
  99. * pcmcia event.
  100. */
  101. void (*socket_init)(struct soc_pcmcia_socket *);
  102. /*
  103. * Disable card status IRQs and PCMCIA bus on suspend.
  104. */
  105. void (*socket_suspend)(struct soc_pcmcia_socket *);
  106. /*
  107. * Hardware specific timing routines.
  108. * If provided, the get_timing routine overrides the SOC default.
  109. */
  110. unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
  111. int (*set_timing)(struct soc_pcmcia_socket *);
  112. int (*show_timing)(struct soc_pcmcia_socket *, char *);
  113. #ifdef CONFIG_CPU_FREQ
  114. /*
  115. * CPUFREQ support.
  116. */
  117. int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
  118. #endif
  119. };
  120. struct soc_pcmcia_timing {
  121. unsigned short io;
  122. unsigned short mem;
  123. unsigned short attr;
  124. };
  125. extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
  126. void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
  127. const struct pcmcia_low_level *ops, struct device *dev);
  128. void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
  129. int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
  130. int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket *skt);
  131. void soc_common_cf_socket_state(struct soc_pcmcia_socket *skt,
  132. struct pcmcia_state *state);
  133. int soc_pcmcia_regulator_set(struct soc_pcmcia_socket *skt,
  134. struct soc_pcmcia_regulator *r, int v);
  135. #ifdef CONFIG_PCMCIA_DEBUG
  136. extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
  137. int lvl, const char *fmt, ...);
  138. #define debug(skt, lvl, fmt, arg...) \
  139. soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
  140. #else
  141. #define debug(skt, lvl, fmt, arg...) do { } while (0)
  142. #endif
  143. /*
  144. * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
  145. * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
  146. * a minimum value of 165ns, as well. Section 4.7.2 (describing
  147. * common and attribute memory write timing) says that twWE has a
  148. * minimum value of 150ns for a 250ns cycle time (for 5V operation;
  149. * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
  150. * operation, also section 4.7.4). Section 4.7.3 says that taOE
  151. * has a maximum value of 150ns for a 300ns cycle time (for 5V
  152. * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
  153. *
  154. * When configuring memory maps, Card Services appears to adopt the policy
  155. * that a memory access time of "0" means "use the default." The default
  156. * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
  157. * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
  158. * memory command width time is 300ns.
  159. */
  160. #define SOC_PCMCIA_IO_ACCESS (165)
  161. #define SOC_PCMCIA_5V_MEM_ACCESS (150)
  162. #define SOC_PCMCIA_3V_MEM_ACCESS (300)
  163. #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
  164. /*
  165. * The socket driver actually works nicely in interrupt-driven form,
  166. * so the (relatively infrequent) polling is "just to be sure."
  167. */
  168. #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
  169. /* I/O pins replacing memory pins
  170. * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
  171. *
  172. * These signals change meaning when going from memory-only to
  173. * memory-or-I/O interface:
  174. */
  175. #define iostschg bvd1
  176. #define iospkr bvd2
  177. #endif