fm10k_pci.c 65 KB

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  1. /* Intel(R) Ethernet Switch Host Interface Driver
  2. * Copyright(c) 2013 - 2016 Intel Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * The full GNU General Public License is included in this distribution in
  14. * the file called "COPYING".
  15. *
  16. * Contact Information:
  17. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. */
  20. #include <linux/module.h>
  21. #include <linux/aer.h>
  22. #include "fm10k.h"
  23. static const struct fm10k_info *fm10k_info_tbl[] = {
  24. [fm10k_device_pf] = &fm10k_pf_info,
  25. [fm10k_device_vf] = &fm10k_vf_info,
  26. };
  27. /**
  28. * fm10k_pci_tbl - PCI Device ID Table
  29. *
  30. * Wildcard entries (PCI_ANY_ID) should come last
  31. * Last entry must be all 0s
  32. *
  33. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  34. * Class, Class Mask, private data (not used) }
  35. */
  36. static const struct pci_device_id fm10k_pci_tbl[] = {
  37. { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
  38. { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
  39. /* required last entry */
  40. { 0, }
  41. };
  42. MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
  43. u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
  44. {
  45. struct fm10k_intfc *interface = hw->back;
  46. u16 value = 0;
  47. if (FM10K_REMOVED(hw->hw_addr))
  48. return ~value;
  49. pci_read_config_word(interface->pdev, reg, &value);
  50. if (value == 0xFFFF)
  51. fm10k_write_flush(hw);
  52. return value;
  53. }
  54. u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
  55. {
  56. u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr);
  57. u32 value = 0;
  58. if (FM10K_REMOVED(hw_addr))
  59. return ~value;
  60. value = readl(&hw_addr[reg]);
  61. if (!(~value) && (!reg || !(~readl(hw_addr)))) {
  62. struct fm10k_intfc *interface = hw->back;
  63. struct net_device *netdev = interface->netdev;
  64. hw->hw_addr = NULL;
  65. netif_device_detach(netdev);
  66. netdev_err(netdev, "PCIe link lost, device now detached\n");
  67. }
  68. return value;
  69. }
  70. static int fm10k_hw_ready(struct fm10k_intfc *interface)
  71. {
  72. struct fm10k_hw *hw = &interface->hw;
  73. fm10k_write_flush(hw);
  74. return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
  75. }
  76. void fm10k_service_event_schedule(struct fm10k_intfc *interface)
  77. {
  78. if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) &&
  79. !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state))
  80. queue_work(fm10k_workqueue, &interface->service_task);
  81. }
  82. static void fm10k_service_event_complete(struct fm10k_intfc *interface)
  83. {
  84. WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state));
  85. /* flush memory to make sure state is correct before next watchog */
  86. smp_mb__before_atomic();
  87. clear_bit(__FM10K_SERVICE_SCHED, &interface->state);
  88. }
  89. /**
  90. * fm10k_service_timer - Timer Call-back
  91. * @data: pointer to interface cast into an unsigned long
  92. **/
  93. static void fm10k_service_timer(unsigned long data)
  94. {
  95. struct fm10k_intfc *interface = (struct fm10k_intfc *)data;
  96. /* Reset the timer */
  97. mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
  98. fm10k_service_event_schedule(interface);
  99. }
  100. static void fm10k_detach_subtask(struct fm10k_intfc *interface)
  101. {
  102. struct net_device *netdev = interface->netdev;
  103. u32 __iomem *hw_addr;
  104. u32 value;
  105. /* do nothing if device is still present or hw_addr is set */
  106. if (netif_device_present(netdev) || interface->hw.hw_addr)
  107. return;
  108. /* check the real address space to see if we've recovered */
  109. hw_addr = READ_ONCE(interface->uc_addr);
  110. value = readl(hw_addr);
  111. if (~value) {
  112. interface->hw.hw_addr = interface->uc_addr;
  113. netif_device_attach(netdev);
  114. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  115. netdev_warn(netdev, "PCIe link restored, device now attached\n");
  116. return;
  117. }
  118. rtnl_lock();
  119. if (netif_running(netdev))
  120. dev_close(netdev);
  121. rtnl_unlock();
  122. }
  123. static void fm10k_prepare_for_reset(struct fm10k_intfc *interface)
  124. {
  125. struct net_device *netdev = interface->netdev;
  126. WARN_ON(in_interrupt());
  127. /* put off any impending NetWatchDogTimeout */
  128. netif_trans_update(netdev);
  129. while (test_and_set_bit(__FM10K_RESETTING, &interface->state))
  130. usleep_range(1000, 2000);
  131. rtnl_lock();
  132. fm10k_iov_suspend(interface->pdev);
  133. if (netif_running(netdev))
  134. fm10k_close(netdev);
  135. fm10k_mbx_free_irq(interface);
  136. /* free interrupts */
  137. fm10k_clear_queueing_scheme(interface);
  138. /* delay any future reset requests */
  139. interface->last_reset = jiffies + (10 * HZ);
  140. rtnl_unlock();
  141. }
  142. static int fm10k_handle_reset(struct fm10k_intfc *interface)
  143. {
  144. struct net_device *netdev = interface->netdev;
  145. struct fm10k_hw *hw = &interface->hw;
  146. int err;
  147. rtnl_lock();
  148. pci_set_master(interface->pdev);
  149. /* reset and initialize the hardware so it is in a known state */
  150. err = hw->mac.ops.reset_hw(hw);
  151. if (err) {
  152. dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err);
  153. goto reinit_err;
  154. }
  155. err = hw->mac.ops.init_hw(hw);
  156. if (err) {
  157. dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
  158. goto reinit_err;
  159. }
  160. err = fm10k_init_queueing_scheme(interface);
  161. if (err) {
  162. dev_err(&interface->pdev->dev,
  163. "init_queueing_scheme failed: %d\n", err);
  164. goto reinit_err;
  165. }
  166. /* re-associate interrupts */
  167. err = fm10k_mbx_request_irq(interface);
  168. if (err)
  169. goto err_mbx_irq;
  170. err = fm10k_hw_ready(interface);
  171. if (err)
  172. goto err_open;
  173. /* update hardware address for VFs if perm_addr has changed */
  174. if (hw->mac.type == fm10k_mac_vf) {
  175. if (is_valid_ether_addr(hw->mac.perm_addr)) {
  176. ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
  177. ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
  178. ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
  179. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  180. }
  181. if (hw->mac.vlan_override)
  182. netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  183. else
  184. netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  185. }
  186. err = netif_running(netdev) ? fm10k_open(netdev) : 0;
  187. if (err)
  188. goto err_open;
  189. fm10k_iov_resume(interface->pdev);
  190. rtnl_unlock();
  191. clear_bit(__FM10K_RESETTING, &interface->state);
  192. return err;
  193. err_open:
  194. fm10k_mbx_free_irq(interface);
  195. err_mbx_irq:
  196. fm10k_clear_queueing_scheme(interface);
  197. reinit_err:
  198. netif_device_detach(netdev);
  199. rtnl_unlock();
  200. clear_bit(__FM10K_RESETTING, &interface->state);
  201. return err;
  202. }
  203. static void fm10k_reinit(struct fm10k_intfc *interface)
  204. {
  205. int err;
  206. fm10k_prepare_for_reset(interface);
  207. err = fm10k_handle_reset(interface);
  208. if (err)
  209. dev_err(&interface->pdev->dev,
  210. "fm10k_handle_reset failed: %d\n", err);
  211. }
  212. static void fm10k_reset_subtask(struct fm10k_intfc *interface)
  213. {
  214. if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED))
  215. return;
  216. interface->flags &= ~FM10K_FLAG_RESET_REQUESTED;
  217. netdev_err(interface->netdev, "Reset interface\n");
  218. fm10k_reinit(interface);
  219. }
  220. /**
  221. * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping
  222. * @interface: board private structure
  223. *
  224. * Configure the SWPRI to PC mapping for the port.
  225. **/
  226. static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
  227. {
  228. struct net_device *netdev = interface->netdev;
  229. struct fm10k_hw *hw = &interface->hw;
  230. int i;
  231. /* clear flag indicating update is needed */
  232. interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG;
  233. /* these registers are only available on the PF */
  234. if (hw->mac.type != fm10k_mac_pf)
  235. return;
  236. /* configure SWPRI to PC map */
  237. for (i = 0; i < FM10K_SWPRI_MAX; i++)
  238. fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
  239. netdev_get_prio_tc_map(netdev, i));
  240. }
  241. /**
  242. * fm10k_watchdog_update_host_state - Update the link status based on host.
  243. * @interface: board private structure
  244. **/
  245. static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
  246. {
  247. struct fm10k_hw *hw = &interface->hw;
  248. s32 err;
  249. if (test_bit(__FM10K_LINK_DOWN, &interface->state)) {
  250. interface->host_ready = false;
  251. if (time_is_after_jiffies(interface->link_down_event))
  252. return;
  253. clear_bit(__FM10K_LINK_DOWN, &interface->state);
  254. }
  255. if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) {
  256. if (rtnl_trylock()) {
  257. fm10k_configure_swpri_map(interface);
  258. rtnl_unlock();
  259. }
  260. }
  261. /* lock the mailbox for transmit and receive */
  262. fm10k_mbx_lock(interface);
  263. err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
  264. if (err && time_is_before_jiffies(interface->last_reset))
  265. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  266. /* free the lock */
  267. fm10k_mbx_unlock(interface);
  268. }
  269. /**
  270. * fm10k_mbx_subtask - Process upstream and downstream mailboxes
  271. * @interface: board private structure
  272. *
  273. * This function will process both the upstream and downstream mailboxes.
  274. **/
  275. static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
  276. {
  277. /* process upstream mailbox and update device state */
  278. fm10k_watchdog_update_host_state(interface);
  279. /* process downstream mailboxes */
  280. fm10k_iov_mbx(interface);
  281. }
  282. /**
  283. * fm10k_watchdog_host_is_ready - Update netdev status based on host ready
  284. * @interface: board private structure
  285. **/
  286. static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
  287. {
  288. struct net_device *netdev = interface->netdev;
  289. /* only continue if link state is currently down */
  290. if (netif_carrier_ok(netdev))
  291. return;
  292. netif_info(interface, drv, netdev, "NIC Link is up\n");
  293. netif_carrier_on(netdev);
  294. netif_tx_wake_all_queues(netdev);
  295. }
  296. /**
  297. * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready
  298. * @interface: board private structure
  299. **/
  300. static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
  301. {
  302. struct net_device *netdev = interface->netdev;
  303. /* only continue if link state is currently up */
  304. if (!netif_carrier_ok(netdev))
  305. return;
  306. netif_info(interface, drv, netdev, "NIC Link is down\n");
  307. netif_carrier_off(netdev);
  308. netif_tx_stop_all_queues(netdev);
  309. }
  310. /**
  311. * fm10k_update_stats - Update the board statistics counters.
  312. * @interface: board private structure
  313. **/
  314. void fm10k_update_stats(struct fm10k_intfc *interface)
  315. {
  316. struct net_device_stats *net_stats = &interface->netdev->stats;
  317. struct fm10k_hw *hw = &interface->hw;
  318. u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
  319. u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
  320. u64 rx_link_errors = 0;
  321. u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
  322. u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
  323. u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
  324. u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
  325. u64 bytes, pkts;
  326. int i;
  327. /* ensure only one thread updates stats at a time */
  328. if (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
  329. return;
  330. /* do not allow stats update via service task for next second */
  331. interface->next_stats_update = jiffies + HZ;
  332. /* gather some stats to the interface struct that are per queue */
  333. for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
  334. struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]);
  335. if (!tx_ring)
  336. continue;
  337. restart_queue += tx_ring->tx_stats.restart_queue;
  338. tx_busy += tx_ring->tx_stats.tx_busy;
  339. tx_csum_errors += tx_ring->tx_stats.csum_err;
  340. bytes += tx_ring->stats.bytes;
  341. pkts += tx_ring->stats.packets;
  342. hw_csum_tx_good += tx_ring->tx_stats.csum_good;
  343. }
  344. interface->restart_queue = restart_queue;
  345. interface->tx_busy = tx_busy;
  346. net_stats->tx_bytes = bytes;
  347. net_stats->tx_packets = pkts;
  348. interface->tx_csum_errors = tx_csum_errors;
  349. interface->hw_csum_tx_good = hw_csum_tx_good;
  350. /* gather some stats to the interface struct that are per queue */
  351. for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
  352. struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]);
  353. if (!rx_ring)
  354. continue;
  355. bytes += rx_ring->stats.bytes;
  356. pkts += rx_ring->stats.packets;
  357. alloc_failed += rx_ring->rx_stats.alloc_failed;
  358. rx_csum_errors += rx_ring->rx_stats.csum_err;
  359. rx_errors += rx_ring->rx_stats.errors;
  360. hw_csum_rx_good += rx_ring->rx_stats.csum_good;
  361. rx_switch_errors += rx_ring->rx_stats.switch_errors;
  362. rx_drops += rx_ring->rx_stats.drops;
  363. rx_pp_errors += rx_ring->rx_stats.pp_errors;
  364. rx_link_errors += rx_ring->rx_stats.link_errors;
  365. rx_length_errors += rx_ring->rx_stats.length_errors;
  366. }
  367. net_stats->rx_bytes = bytes;
  368. net_stats->rx_packets = pkts;
  369. interface->alloc_failed = alloc_failed;
  370. interface->rx_csum_errors = rx_csum_errors;
  371. interface->hw_csum_rx_good = hw_csum_rx_good;
  372. interface->rx_switch_errors = rx_switch_errors;
  373. interface->rx_drops = rx_drops;
  374. interface->rx_pp_errors = rx_pp_errors;
  375. interface->rx_link_errors = rx_link_errors;
  376. interface->rx_length_errors = rx_length_errors;
  377. hw->mac.ops.update_hw_stats(hw, &interface->stats);
  378. for (i = 0; i < hw->mac.max_queues; i++) {
  379. struct fm10k_hw_stats_q *q = &interface->stats.q[i];
  380. tx_bytes_nic += q->tx_bytes.count;
  381. tx_pkts_nic += q->tx_packets.count;
  382. rx_bytes_nic += q->rx_bytes.count;
  383. rx_pkts_nic += q->rx_packets.count;
  384. rx_drops_nic += q->rx_drops.count;
  385. }
  386. interface->tx_bytes_nic = tx_bytes_nic;
  387. interface->tx_packets_nic = tx_pkts_nic;
  388. interface->rx_bytes_nic = rx_bytes_nic;
  389. interface->rx_packets_nic = rx_pkts_nic;
  390. interface->rx_drops_nic = rx_drops_nic;
  391. /* Fill out the OS statistics structure */
  392. net_stats->rx_errors = rx_errors;
  393. net_stats->rx_dropped = interface->stats.nodesc_drop.count;
  394. clear_bit(__FM10K_UPDATING_STATS, &interface->state);
  395. }
  396. /**
  397. * fm10k_watchdog_flush_tx - flush queues on host not ready
  398. * @interface - pointer to the device interface structure
  399. **/
  400. static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
  401. {
  402. int some_tx_pending = 0;
  403. int i;
  404. /* nothing to do if carrier is up */
  405. if (netif_carrier_ok(interface->netdev))
  406. return;
  407. for (i = 0; i < interface->num_tx_queues; i++) {
  408. struct fm10k_ring *tx_ring = interface->tx_ring[i];
  409. if (tx_ring->next_to_use != tx_ring->next_to_clean) {
  410. some_tx_pending = 1;
  411. break;
  412. }
  413. }
  414. /* We've lost link, so the controller stops DMA, but we've got
  415. * queued Tx work that's never going to get done, so reset
  416. * controller to flush Tx.
  417. */
  418. if (some_tx_pending)
  419. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  420. }
  421. /**
  422. * fm10k_watchdog_subtask - check and bring link up
  423. * @interface - pointer to the device interface structure
  424. **/
  425. static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
  426. {
  427. /* if interface is down do nothing */
  428. if (test_bit(__FM10K_DOWN, &interface->state) ||
  429. test_bit(__FM10K_RESETTING, &interface->state))
  430. return;
  431. if (interface->host_ready)
  432. fm10k_watchdog_host_is_ready(interface);
  433. else
  434. fm10k_watchdog_host_not_ready(interface);
  435. /* update stats only once every second */
  436. if (time_is_before_jiffies(interface->next_stats_update))
  437. fm10k_update_stats(interface);
  438. /* flush any uncompleted work */
  439. fm10k_watchdog_flush_tx(interface);
  440. }
  441. /**
  442. * fm10k_check_hang_subtask - check for hung queues and dropped interrupts
  443. * @interface - pointer to the device interface structure
  444. *
  445. * This function serves two purposes. First it strobes the interrupt lines
  446. * in order to make certain interrupts are occurring. Secondly it sets the
  447. * bits needed to check for TX hangs. As a result we should immediately
  448. * determine if a hang has occurred.
  449. */
  450. static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
  451. {
  452. int i;
  453. /* If we're down or resetting, just bail */
  454. if (test_bit(__FM10K_DOWN, &interface->state) ||
  455. test_bit(__FM10K_RESETTING, &interface->state))
  456. return;
  457. /* rate limit tx hang checks to only once every 2 seconds */
  458. if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
  459. return;
  460. interface->next_tx_hang_check = jiffies + (2 * HZ);
  461. if (netif_carrier_ok(interface->netdev)) {
  462. /* Force detection of hung controller */
  463. for (i = 0; i < interface->num_tx_queues; i++)
  464. set_check_for_tx_hang(interface->tx_ring[i]);
  465. /* Rearm all in-use q_vectors for immediate firing */
  466. for (i = 0; i < interface->num_q_vectors; i++) {
  467. struct fm10k_q_vector *qv = interface->q_vector[i];
  468. if (!qv->tx.count && !qv->rx.count)
  469. continue;
  470. writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
  471. }
  472. }
  473. }
  474. /**
  475. * fm10k_service_task - manages and runs subtasks
  476. * @work: pointer to work_struct containing our data
  477. **/
  478. static void fm10k_service_task(struct work_struct *work)
  479. {
  480. struct fm10k_intfc *interface;
  481. interface = container_of(work, struct fm10k_intfc, service_task);
  482. /* tasks run even when interface is down */
  483. fm10k_mbx_subtask(interface);
  484. fm10k_detach_subtask(interface);
  485. fm10k_reset_subtask(interface);
  486. /* tasks only run when interface is up */
  487. fm10k_watchdog_subtask(interface);
  488. fm10k_check_hang_subtask(interface);
  489. /* release lock on service events to allow scheduling next event */
  490. fm10k_service_event_complete(interface);
  491. }
  492. /**
  493. * fm10k_configure_tx_ring - Configure Tx ring after Reset
  494. * @interface: board private structure
  495. * @ring: structure containing ring specific data
  496. *
  497. * Configure the Tx descriptor ring after a reset.
  498. **/
  499. static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
  500. struct fm10k_ring *ring)
  501. {
  502. struct fm10k_hw *hw = &interface->hw;
  503. u64 tdba = ring->dma;
  504. u32 size = ring->count * sizeof(struct fm10k_tx_desc);
  505. u32 txint = FM10K_INT_MAP_DISABLE;
  506. u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE;
  507. u8 reg_idx = ring->reg_idx;
  508. /* disable queue to avoid issues while updating state */
  509. fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
  510. fm10k_write_flush(hw);
  511. /* possible poll here to verify ring resources have been cleaned */
  512. /* set location and size for descriptor ring */
  513. fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
  514. fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
  515. fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
  516. /* reset head and tail pointers */
  517. fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
  518. fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
  519. /* store tail pointer */
  520. ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
  521. /* reset ntu and ntc to place SW in sync with hardware */
  522. ring->next_to_clean = 0;
  523. ring->next_to_use = 0;
  524. /* Map interrupt */
  525. if (ring->q_vector) {
  526. txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
  527. txint |= FM10K_INT_MAP_TIMER0;
  528. }
  529. fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
  530. /* enable use of FTAG bit in Tx descriptor, register is RO for VF */
  531. fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
  532. FM10K_PFVTCTL_FTAG_DESC_ENABLE);
  533. /* Initialize XPS */
  534. if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) &&
  535. ring->q_vector)
  536. netif_set_xps_queue(ring->netdev,
  537. &ring->q_vector->affinity_mask,
  538. ring->queue_index);
  539. /* enable queue */
  540. fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
  541. }
  542. /**
  543. * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration
  544. * @interface: board private structure
  545. * @ring: structure containing ring specific data
  546. *
  547. * Verify the Tx descriptor ring is ready for transmit.
  548. **/
  549. static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
  550. struct fm10k_ring *ring)
  551. {
  552. struct fm10k_hw *hw = &interface->hw;
  553. int wait_loop = 10;
  554. u32 txdctl;
  555. u8 reg_idx = ring->reg_idx;
  556. /* if we are already enabled just exit */
  557. if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
  558. return;
  559. /* poll to verify queue is enabled */
  560. do {
  561. usleep_range(1000, 2000);
  562. txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
  563. } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
  564. if (!wait_loop)
  565. netif_err(interface, drv, interface->netdev,
  566. "Could not enable Tx Queue %d\n", reg_idx);
  567. }
  568. /**
  569. * fm10k_configure_tx - Configure Transmit Unit after Reset
  570. * @interface: board private structure
  571. *
  572. * Configure the Tx unit of the MAC after a reset.
  573. **/
  574. static void fm10k_configure_tx(struct fm10k_intfc *interface)
  575. {
  576. int i;
  577. /* Setup the HW Tx Head and Tail descriptor pointers */
  578. for (i = 0; i < interface->num_tx_queues; i++)
  579. fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
  580. /* poll here to verify that Tx rings are now enabled */
  581. for (i = 0; i < interface->num_tx_queues; i++)
  582. fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
  583. }
  584. /**
  585. * fm10k_configure_rx_ring - Configure Rx ring after Reset
  586. * @interface: board private structure
  587. * @ring: structure containing ring specific data
  588. *
  589. * Configure the Rx descriptor ring after a reset.
  590. **/
  591. static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
  592. struct fm10k_ring *ring)
  593. {
  594. u64 rdba = ring->dma;
  595. struct fm10k_hw *hw = &interface->hw;
  596. u32 size = ring->count * sizeof(union fm10k_rx_desc);
  597. u32 rxqctl, rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
  598. u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
  599. u32 rxint = FM10K_INT_MAP_DISABLE;
  600. u8 rx_pause = interface->rx_pause;
  601. u8 reg_idx = ring->reg_idx;
  602. /* disable queue to avoid issues while updating state */
  603. rxqctl = fm10k_read_reg(hw, FM10K_RXQCTL(reg_idx));
  604. rxqctl &= ~FM10K_RXQCTL_ENABLE;
  605. fm10k_write_flush(hw);
  606. /* possible poll here to verify ring resources have been cleaned */
  607. /* set location and size for descriptor ring */
  608. fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
  609. fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
  610. fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
  611. /* reset head and tail pointers */
  612. fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
  613. fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
  614. /* store tail pointer */
  615. ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
  616. /* reset ntu and ntc to place SW in sync with hardware */
  617. ring->next_to_clean = 0;
  618. ring->next_to_use = 0;
  619. ring->next_to_alloc = 0;
  620. /* Configure the Rx buffer size for one buff without split */
  621. srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
  622. /* Configure the Rx ring to suppress loopback packets */
  623. srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
  624. fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
  625. /* Enable drop on empty */
  626. #ifdef CONFIG_DCB
  627. if (interface->pfc_en)
  628. rx_pause = interface->pfc_en;
  629. #endif
  630. if (!(rx_pause & BIT(ring->qos_pc)))
  631. rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
  632. fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
  633. /* assign default VLAN to queue */
  634. ring->vid = hw->mac.default_vid;
  635. /* if we have an active VLAN, disable default VLAN ID */
  636. if (test_bit(hw->mac.default_vid, interface->active_vlans))
  637. ring->vid |= FM10K_VLAN_CLEAR;
  638. /* Map interrupt */
  639. if (ring->q_vector) {
  640. rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
  641. rxint |= FM10K_INT_MAP_TIMER1;
  642. }
  643. fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
  644. /* enable queue */
  645. rxqctl = fm10k_read_reg(hw, FM10K_RXQCTL(reg_idx));
  646. rxqctl |= FM10K_RXQCTL_ENABLE;
  647. fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
  648. /* place buffers on ring for receive data */
  649. fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
  650. }
  651. /**
  652. * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings
  653. * @interface: board private structure
  654. *
  655. * Configure the drop enable bits for the Rx rings.
  656. **/
  657. void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
  658. {
  659. struct fm10k_hw *hw = &interface->hw;
  660. u8 rx_pause = interface->rx_pause;
  661. int i;
  662. #ifdef CONFIG_DCB
  663. if (interface->pfc_en)
  664. rx_pause = interface->pfc_en;
  665. #endif
  666. for (i = 0; i < interface->num_rx_queues; i++) {
  667. struct fm10k_ring *ring = interface->rx_ring[i];
  668. u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
  669. u8 reg_idx = ring->reg_idx;
  670. if (!(rx_pause & BIT(ring->qos_pc)))
  671. rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
  672. fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
  673. }
  674. }
  675. /**
  676. * fm10k_configure_dglort - Configure Receive DGLORT after reset
  677. * @interface: board private structure
  678. *
  679. * Configure the DGLORT description and RSS tables.
  680. **/
  681. static void fm10k_configure_dglort(struct fm10k_intfc *interface)
  682. {
  683. struct fm10k_dglort_cfg dglort = { 0 };
  684. struct fm10k_hw *hw = &interface->hw;
  685. int i;
  686. u32 mrqc;
  687. /* Fill out hash function seeds */
  688. for (i = 0; i < FM10K_RSSRK_SIZE; i++)
  689. fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
  690. /* Write RETA table to hardware */
  691. for (i = 0; i < FM10K_RETA_SIZE; i++)
  692. fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
  693. /* Generate RSS hash based on packet types, TCP/UDP
  694. * port numbers and/or IPv4/v6 src and dst addresses
  695. */
  696. mrqc = FM10K_MRQC_IPV4 |
  697. FM10K_MRQC_TCP_IPV4 |
  698. FM10K_MRQC_IPV6 |
  699. FM10K_MRQC_TCP_IPV6;
  700. if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP)
  701. mrqc |= FM10K_MRQC_UDP_IPV4;
  702. if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP)
  703. mrqc |= FM10K_MRQC_UDP_IPV6;
  704. fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
  705. /* configure default DGLORT mapping for RSS/DCB */
  706. dglort.inner_rss = 1;
  707. dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
  708. dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
  709. hw->mac.ops.configure_dglort_map(hw, &dglort);
  710. /* assign GLORT per queue for queue mapped testing */
  711. if (interface->glort_count > 64) {
  712. memset(&dglort, 0, sizeof(dglort));
  713. dglort.inner_rss = 1;
  714. dglort.glort = interface->glort + 64;
  715. dglort.idx = fm10k_dglort_pf_queue;
  716. dglort.queue_l = fls(interface->num_rx_queues - 1);
  717. hw->mac.ops.configure_dglort_map(hw, &dglort);
  718. }
  719. /* assign glort value for RSS/DCB specific to this interface */
  720. memset(&dglort, 0, sizeof(dglort));
  721. dglort.inner_rss = 1;
  722. dglort.glort = interface->glort;
  723. dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
  724. dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
  725. /* configure DGLORT mapping for RSS/DCB */
  726. dglort.idx = fm10k_dglort_pf_rss;
  727. if (interface->l2_accel)
  728. dglort.shared_l = fls(interface->l2_accel->size);
  729. hw->mac.ops.configure_dglort_map(hw, &dglort);
  730. }
  731. /**
  732. * fm10k_configure_rx - Configure Receive Unit after Reset
  733. * @interface: board private structure
  734. *
  735. * Configure the Rx unit of the MAC after a reset.
  736. **/
  737. static void fm10k_configure_rx(struct fm10k_intfc *interface)
  738. {
  739. int i;
  740. /* Configure SWPRI to PC map */
  741. fm10k_configure_swpri_map(interface);
  742. /* Configure RSS and DGLORT map */
  743. fm10k_configure_dglort(interface);
  744. /* Setup the HW Rx Head and Tail descriptor pointers */
  745. for (i = 0; i < interface->num_rx_queues; i++)
  746. fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
  747. /* possible poll here to verify that Rx rings are now enabled */
  748. }
  749. static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
  750. {
  751. struct fm10k_q_vector *q_vector;
  752. int q_idx;
  753. for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
  754. q_vector = interface->q_vector[q_idx];
  755. napi_enable(&q_vector->napi);
  756. }
  757. }
  758. static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
  759. {
  760. struct fm10k_q_vector *q_vector = data;
  761. if (q_vector->rx.count || q_vector->tx.count)
  762. napi_schedule_irqoff(&q_vector->napi);
  763. return IRQ_HANDLED;
  764. }
  765. static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
  766. {
  767. struct fm10k_intfc *interface = data;
  768. struct fm10k_hw *hw = &interface->hw;
  769. struct fm10k_mbx_info *mbx = &hw->mbx;
  770. /* re-enable mailbox interrupt and indicate 20us delay */
  771. fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
  772. (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
  773. FM10K_ITR_ENABLE);
  774. /* service upstream mailbox */
  775. if (fm10k_mbx_trylock(interface)) {
  776. mbx->ops.process(hw, mbx);
  777. fm10k_mbx_unlock(interface);
  778. }
  779. hw->mac.get_host_state = true;
  780. fm10k_service_event_schedule(interface);
  781. return IRQ_HANDLED;
  782. }
  783. #ifdef CONFIG_NET_POLL_CONTROLLER
  784. /**
  785. * fm10k_netpoll - A Polling 'interrupt' handler
  786. * @netdev: network interface device structure
  787. *
  788. * This is used by netconsole to send skbs without having to re-enable
  789. * interrupts. It's not called while the normal interrupt routine is executing.
  790. **/
  791. void fm10k_netpoll(struct net_device *netdev)
  792. {
  793. struct fm10k_intfc *interface = netdev_priv(netdev);
  794. int i;
  795. /* if interface is down do nothing */
  796. if (test_bit(__FM10K_DOWN, &interface->state))
  797. return;
  798. for (i = 0; i < interface->num_q_vectors; i++)
  799. fm10k_msix_clean_rings(0, interface->q_vector[i]);
  800. }
  801. #endif
  802. #define FM10K_ERR_MSG(type) case (type): error = #type; break
  803. static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
  804. struct fm10k_fault *fault)
  805. {
  806. struct pci_dev *pdev = interface->pdev;
  807. struct fm10k_hw *hw = &interface->hw;
  808. struct fm10k_iov_data *iov_data = interface->iov_data;
  809. char *error;
  810. switch (type) {
  811. case FM10K_PCA_FAULT:
  812. switch (fault->type) {
  813. default:
  814. error = "Unknown PCA error";
  815. break;
  816. FM10K_ERR_MSG(PCA_NO_FAULT);
  817. FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
  818. FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
  819. FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
  820. FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
  821. FM10K_ERR_MSG(PCA_POISONED_TLP);
  822. FM10K_ERR_MSG(PCA_TLP_ABORT);
  823. }
  824. break;
  825. case FM10K_THI_FAULT:
  826. switch (fault->type) {
  827. default:
  828. error = "Unknown THI error";
  829. break;
  830. FM10K_ERR_MSG(THI_NO_FAULT);
  831. FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
  832. }
  833. break;
  834. case FM10K_FUM_FAULT:
  835. switch (fault->type) {
  836. default:
  837. error = "Unknown FUM error";
  838. break;
  839. FM10K_ERR_MSG(FUM_NO_FAULT);
  840. FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
  841. FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
  842. FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
  843. FM10K_ERR_MSG(FUM_RO_ERROR);
  844. FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
  845. FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
  846. FM10K_ERR_MSG(FUM_INVALID_TYPE);
  847. FM10K_ERR_MSG(FUM_INVALID_LENGTH);
  848. FM10K_ERR_MSG(FUM_INVALID_BE);
  849. FM10K_ERR_MSG(FUM_INVALID_ALIGN);
  850. }
  851. break;
  852. default:
  853. error = "Undocumented fault";
  854. break;
  855. }
  856. dev_warn(&pdev->dev,
  857. "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
  858. error, fault->address, fault->specinfo,
  859. PCI_SLOT(fault->func), PCI_FUNC(fault->func));
  860. /* For VF faults, clear out the respective LPORT, reset the queue
  861. * resources, and then reconnect to the mailbox. This allows the
  862. * VF in question to resume behavior. For transient faults that are
  863. * the result of non-malicious behavior this will log the fault and
  864. * allow the VF to resume functionality. Obviously for malicious VFs
  865. * they will be able to attempt malicious behavior again. In this
  866. * case, the system administrator will need to step in and manually
  867. * remove or disable the VF in question.
  868. */
  869. if (fault->func && iov_data) {
  870. int vf = fault->func - 1;
  871. struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
  872. hw->iov.ops.reset_lport(hw, vf_info);
  873. hw->iov.ops.reset_resources(hw, vf_info);
  874. /* reset_lport disables the VF, so re-enable it */
  875. hw->iov.ops.set_lport(hw, vf_info, vf,
  876. FM10K_VF_FLAG_MULTI_CAPABLE);
  877. /* reset_resources will disconnect from the mbx */
  878. vf_info->mbx.ops.connect(hw, &vf_info->mbx);
  879. }
  880. }
  881. static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
  882. {
  883. struct fm10k_hw *hw = &interface->hw;
  884. struct fm10k_fault fault = { 0 };
  885. int type, err;
  886. for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
  887. eicr;
  888. eicr >>= 1, type += FM10K_FAULT_SIZE) {
  889. /* only check if there is an error reported */
  890. if (!(eicr & 0x1))
  891. continue;
  892. /* retrieve fault info */
  893. err = hw->mac.ops.get_fault(hw, type, &fault);
  894. if (err) {
  895. dev_err(&interface->pdev->dev,
  896. "error reading fault\n");
  897. continue;
  898. }
  899. fm10k_handle_fault(interface, type, &fault);
  900. }
  901. }
  902. static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
  903. {
  904. struct fm10k_hw *hw = &interface->hw;
  905. const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
  906. u32 maxholdq;
  907. int q;
  908. if (!(eicr & FM10K_EICR_MAXHOLDTIME))
  909. return;
  910. maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
  911. if (maxholdq)
  912. fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
  913. for (q = 255;;) {
  914. if (maxholdq & BIT(31)) {
  915. if (q < FM10K_MAX_QUEUES_PF) {
  916. interface->rx_overrun_pf++;
  917. fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
  918. } else {
  919. interface->rx_overrun_vf++;
  920. }
  921. }
  922. maxholdq *= 2;
  923. if (!maxholdq)
  924. q &= ~(32 - 1);
  925. if (!q)
  926. break;
  927. if (q-- % 32)
  928. continue;
  929. maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
  930. if (maxholdq)
  931. fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
  932. }
  933. }
  934. static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
  935. {
  936. struct fm10k_intfc *interface = data;
  937. struct fm10k_hw *hw = &interface->hw;
  938. struct fm10k_mbx_info *mbx = &hw->mbx;
  939. u32 eicr;
  940. s32 err = 0;
  941. /* unmask any set bits related to this interrupt */
  942. eicr = fm10k_read_reg(hw, FM10K_EICR);
  943. fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
  944. FM10K_EICR_SWITCHREADY |
  945. FM10K_EICR_SWITCHNOTREADY));
  946. /* report any faults found to the message log */
  947. fm10k_report_fault(interface, eicr);
  948. /* reset any queues disabled due to receiver overrun */
  949. fm10k_reset_drop_on_empty(interface, eicr);
  950. /* service mailboxes */
  951. if (fm10k_mbx_trylock(interface)) {
  952. err = mbx->ops.process(hw, mbx);
  953. /* handle VFLRE events */
  954. fm10k_iov_event(interface);
  955. fm10k_mbx_unlock(interface);
  956. }
  957. if (err == FM10K_ERR_RESET_REQUESTED)
  958. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  959. /* if switch toggled state we should reset GLORTs */
  960. if (eicr & FM10K_EICR_SWITCHNOTREADY) {
  961. /* force link down for at least 4 seconds */
  962. interface->link_down_event = jiffies + (4 * HZ);
  963. set_bit(__FM10K_LINK_DOWN, &interface->state);
  964. /* reset dglort_map back to no config */
  965. hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
  966. }
  967. /* we should validate host state after interrupt event */
  968. hw->mac.get_host_state = true;
  969. /* validate host state, and handle VF mailboxes in the service task */
  970. fm10k_service_event_schedule(interface);
  971. /* re-enable mailbox interrupt and indicate 20us delay */
  972. fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
  973. (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
  974. FM10K_ITR_ENABLE);
  975. return IRQ_HANDLED;
  976. }
  977. void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
  978. {
  979. struct fm10k_hw *hw = &interface->hw;
  980. struct msix_entry *entry;
  981. int itr_reg;
  982. /* no mailbox IRQ to free if MSI-X is not enabled */
  983. if (!interface->msix_entries)
  984. return;
  985. entry = &interface->msix_entries[FM10K_MBX_VECTOR];
  986. /* disconnect the mailbox */
  987. hw->mbx.ops.disconnect(hw, &hw->mbx);
  988. /* disable Mailbox cause */
  989. if (hw->mac.type == fm10k_mac_pf) {
  990. fm10k_write_reg(hw, FM10K_EIMR,
  991. FM10K_EIMR_DISABLE(PCA_FAULT) |
  992. FM10K_EIMR_DISABLE(FUM_FAULT) |
  993. FM10K_EIMR_DISABLE(MAILBOX) |
  994. FM10K_EIMR_DISABLE(SWITCHREADY) |
  995. FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
  996. FM10K_EIMR_DISABLE(SRAMERROR) |
  997. FM10K_EIMR_DISABLE(VFLR) |
  998. FM10K_EIMR_DISABLE(MAXHOLDTIME));
  999. itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
  1000. } else {
  1001. itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
  1002. }
  1003. fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
  1004. free_irq(entry->vector, interface);
  1005. }
  1006. static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
  1007. struct fm10k_mbx_info *mbx)
  1008. {
  1009. bool vlan_override = hw->mac.vlan_override;
  1010. u16 default_vid = hw->mac.default_vid;
  1011. struct fm10k_intfc *interface;
  1012. s32 err;
  1013. err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
  1014. if (err)
  1015. return err;
  1016. interface = container_of(hw, struct fm10k_intfc, hw);
  1017. /* MAC was changed so we need reset */
  1018. if (is_valid_ether_addr(hw->mac.perm_addr) &&
  1019. !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr))
  1020. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1021. /* VLAN override was changed, or default VLAN changed */
  1022. if ((vlan_override != hw->mac.vlan_override) ||
  1023. (default_vid != hw->mac.default_vid))
  1024. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1025. return 0;
  1026. }
  1027. /* generic error handler for mailbox issues */
  1028. static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
  1029. struct fm10k_mbx_info __always_unused *mbx)
  1030. {
  1031. struct fm10k_intfc *interface;
  1032. struct pci_dev *pdev;
  1033. interface = container_of(hw, struct fm10k_intfc, hw);
  1034. pdev = interface->pdev;
  1035. dev_err(&pdev->dev, "Unknown message ID %u\n",
  1036. **results & FM10K_TLV_ID_MASK);
  1037. return 0;
  1038. }
  1039. static const struct fm10k_msg_data vf_mbx_data[] = {
  1040. FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
  1041. FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
  1042. FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
  1043. FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
  1044. };
  1045. static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
  1046. {
  1047. struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
  1048. struct net_device *dev = interface->netdev;
  1049. struct fm10k_hw *hw = &interface->hw;
  1050. int err;
  1051. /* Use timer0 for interrupt moderation on the mailbox */
  1052. u32 itr = entry->entry | FM10K_INT_MAP_TIMER0;
  1053. /* register mailbox handlers */
  1054. err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
  1055. if (err)
  1056. return err;
  1057. /* request the IRQ */
  1058. err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
  1059. dev->name, interface);
  1060. if (err) {
  1061. netif_err(interface, probe, dev,
  1062. "request_irq for msix_mbx failed: %d\n", err);
  1063. return err;
  1064. }
  1065. /* map all of the interrupt sources */
  1066. fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
  1067. /* enable interrupt */
  1068. fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
  1069. return 0;
  1070. }
  1071. static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
  1072. struct fm10k_mbx_info *mbx)
  1073. {
  1074. struct fm10k_intfc *interface;
  1075. u32 dglort_map = hw->mac.dglort_map;
  1076. s32 err;
  1077. interface = container_of(hw, struct fm10k_intfc, hw);
  1078. err = fm10k_msg_err_pf(hw, results, mbx);
  1079. if (!err && hw->swapi.status) {
  1080. /* force link down for a reasonable delay */
  1081. interface->link_down_event = jiffies + (2 * HZ);
  1082. set_bit(__FM10K_LINK_DOWN, &interface->state);
  1083. /* reset dglort_map back to no config */
  1084. hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
  1085. fm10k_service_event_schedule(interface);
  1086. /* prevent overloading kernel message buffer */
  1087. if (interface->lport_map_failed)
  1088. return 0;
  1089. interface->lport_map_failed = true;
  1090. if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED)
  1091. dev_warn(&interface->pdev->dev,
  1092. "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n");
  1093. dev_warn(&interface->pdev->dev,
  1094. "request logical port map failed: %d\n",
  1095. hw->swapi.status);
  1096. return 0;
  1097. }
  1098. err = fm10k_msg_lport_map_pf(hw, results, mbx);
  1099. if (err)
  1100. return err;
  1101. interface->lport_map_failed = false;
  1102. /* we need to reset if port count was just updated */
  1103. if (dglort_map != hw->mac.dglort_map)
  1104. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1105. return 0;
  1106. }
  1107. static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
  1108. struct fm10k_mbx_info __always_unused *mbx)
  1109. {
  1110. struct fm10k_intfc *interface;
  1111. u16 glort, pvid;
  1112. u32 pvid_update;
  1113. s32 err;
  1114. err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
  1115. &pvid_update);
  1116. if (err)
  1117. return err;
  1118. /* extract values from the pvid update */
  1119. glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
  1120. pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
  1121. /* if glort is not valid return error */
  1122. if (!fm10k_glort_valid_pf(hw, glort))
  1123. return FM10K_ERR_PARAM;
  1124. /* verify VLAN ID is valid */
  1125. if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
  1126. return FM10K_ERR_PARAM;
  1127. interface = container_of(hw, struct fm10k_intfc, hw);
  1128. /* check to see if this belongs to one of the VFs */
  1129. err = fm10k_iov_update_pvid(interface, glort, pvid);
  1130. if (!err)
  1131. return 0;
  1132. /* we need to reset if default VLAN was just updated */
  1133. if (pvid != hw->mac.default_vid)
  1134. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1135. hw->mac.default_vid = pvid;
  1136. return 0;
  1137. }
  1138. static const struct fm10k_msg_data pf_mbx_data[] = {
  1139. FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
  1140. FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
  1141. FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
  1142. FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
  1143. FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
  1144. FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
  1145. FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
  1146. };
  1147. static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
  1148. {
  1149. struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
  1150. struct net_device *dev = interface->netdev;
  1151. struct fm10k_hw *hw = &interface->hw;
  1152. int err;
  1153. /* Use timer0 for interrupt moderation on the mailbox */
  1154. u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0;
  1155. u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE;
  1156. /* register mailbox handlers */
  1157. err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
  1158. if (err)
  1159. return err;
  1160. /* request the IRQ */
  1161. err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
  1162. dev->name, interface);
  1163. if (err) {
  1164. netif_err(interface, probe, dev,
  1165. "request_irq for msix_mbx failed: %d\n", err);
  1166. return err;
  1167. }
  1168. /* Enable interrupts w/ no moderation for "other" interrupts */
  1169. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr);
  1170. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr);
  1171. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr);
  1172. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr);
  1173. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr);
  1174. /* Enable interrupts w/ moderation for mailbox */
  1175. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr);
  1176. /* Enable individual interrupt causes */
  1177. fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
  1178. FM10K_EIMR_ENABLE(FUM_FAULT) |
  1179. FM10K_EIMR_ENABLE(MAILBOX) |
  1180. FM10K_EIMR_ENABLE(SWITCHREADY) |
  1181. FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
  1182. FM10K_EIMR_ENABLE(SRAMERROR) |
  1183. FM10K_EIMR_ENABLE(VFLR) |
  1184. FM10K_EIMR_ENABLE(MAXHOLDTIME));
  1185. /* enable interrupt */
  1186. fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
  1187. return 0;
  1188. }
  1189. int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
  1190. {
  1191. struct fm10k_hw *hw = &interface->hw;
  1192. int err;
  1193. /* enable Mailbox cause */
  1194. if (hw->mac.type == fm10k_mac_pf)
  1195. err = fm10k_mbx_request_irq_pf(interface);
  1196. else
  1197. err = fm10k_mbx_request_irq_vf(interface);
  1198. if (err)
  1199. return err;
  1200. /* connect mailbox */
  1201. err = hw->mbx.ops.connect(hw, &hw->mbx);
  1202. /* if the mailbox failed to connect, then free IRQ */
  1203. if (err)
  1204. fm10k_mbx_free_irq(interface);
  1205. return err;
  1206. }
  1207. /**
  1208. * fm10k_qv_free_irq - release interrupts associated with queue vectors
  1209. * @interface: board private structure
  1210. *
  1211. * Release all interrupts associated with this interface
  1212. **/
  1213. void fm10k_qv_free_irq(struct fm10k_intfc *interface)
  1214. {
  1215. int vector = interface->num_q_vectors;
  1216. struct fm10k_hw *hw = &interface->hw;
  1217. struct msix_entry *entry;
  1218. entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
  1219. while (vector) {
  1220. struct fm10k_q_vector *q_vector;
  1221. vector--;
  1222. entry--;
  1223. q_vector = interface->q_vector[vector];
  1224. if (!q_vector->tx.count && !q_vector->rx.count)
  1225. continue;
  1226. /* clear the affinity_mask in the IRQ descriptor */
  1227. irq_set_affinity_hint(entry->vector, NULL);
  1228. /* disable interrupts */
  1229. writel(FM10K_ITR_MASK_SET, q_vector->itr);
  1230. free_irq(entry->vector, q_vector);
  1231. }
  1232. }
  1233. /**
  1234. * fm10k_qv_request_irq - initialize interrupts for queue vectors
  1235. * @interface: board private structure
  1236. *
  1237. * Attempts to configure interrupts using the best available
  1238. * capabilities of the hardware and kernel.
  1239. **/
  1240. int fm10k_qv_request_irq(struct fm10k_intfc *interface)
  1241. {
  1242. struct net_device *dev = interface->netdev;
  1243. struct fm10k_hw *hw = &interface->hw;
  1244. struct msix_entry *entry;
  1245. int ri = 0, ti = 0;
  1246. int vector, err;
  1247. entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
  1248. for (vector = 0; vector < interface->num_q_vectors; vector++) {
  1249. struct fm10k_q_vector *q_vector = interface->q_vector[vector];
  1250. /* name the vector */
  1251. if (q_vector->tx.count && q_vector->rx.count) {
  1252. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1253. "%s-TxRx-%d", dev->name, ri++);
  1254. ti++;
  1255. } else if (q_vector->rx.count) {
  1256. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1257. "%s-rx-%d", dev->name, ri++);
  1258. } else if (q_vector->tx.count) {
  1259. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1260. "%s-tx-%d", dev->name, ti++);
  1261. } else {
  1262. /* skip this unused q_vector */
  1263. continue;
  1264. }
  1265. /* Assign ITR register to q_vector */
  1266. q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
  1267. &interface->uc_addr[FM10K_ITR(entry->entry)] :
  1268. &interface->uc_addr[FM10K_VFITR(entry->entry)];
  1269. /* request the IRQ */
  1270. err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
  1271. q_vector->name, q_vector);
  1272. if (err) {
  1273. netif_err(interface, probe, dev,
  1274. "request_irq failed for MSIX interrupt Error: %d\n",
  1275. err);
  1276. goto err_out;
  1277. }
  1278. /* assign the mask for this irq */
  1279. irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask);
  1280. /* Enable q_vector */
  1281. writel(FM10K_ITR_ENABLE, q_vector->itr);
  1282. entry++;
  1283. }
  1284. return 0;
  1285. err_out:
  1286. /* wind through the ring freeing all entries and vectors */
  1287. while (vector) {
  1288. struct fm10k_q_vector *q_vector;
  1289. entry--;
  1290. vector--;
  1291. q_vector = interface->q_vector[vector];
  1292. if (!q_vector->tx.count && !q_vector->rx.count)
  1293. continue;
  1294. /* clear the affinity_mask in the IRQ descriptor */
  1295. irq_set_affinity_hint(entry->vector, NULL);
  1296. /* disable interrupts */
  1297. writel(FM10K_ITR_MASK_SET, q_vector->itr);
  1298. free_irq(entry->vector, q_vector);
  1299. }
  1300. return err;
  1301. }
  1302. void fm10k_up(struct fm10k_intfc *interface)
  1303. {
  1304. struct fm10k_hw *hw = &interface->hw;
  1305. /* Enable Tx/Rx DMA */
  1306. hw->mac.ops.start_hw(hw);
  1307. /* configure Tx descriptor rings */
  1308. fm10k_configure_tx(interface);
  1309. /* configure Rx descriptor rings */
  1310. fm10k_configure_rx(interface);
  1311. /* configure interrupts */
  1312. hw->mac.ops.update_int_moderator(hw);
  1313. /* enable statistics capture again */
  1314. clear_bit(__FM10K_UPDATING_STATS, &interface->state);
  1315. /* clear down bit to indicate we are ready to go */
  1316. clear_bit(__FM10K_DOWN, &interface->state);
  1317. /* enable polling cleanups */
  1318. fm10k_napi_enable_all(interface);
  1319. /* re-establish Rx filters */
  1320. fm10k_restore_rx_state(interface);
  1321. /* enable transmits */
  1322. netif_tx_start_all_queues(interface->netdev);
  1323. /* kick off the service timer now */
  1324. hw->mac.get_host_state = true;
  1325. mod_timer(&interface->service_timer, jiffies);
  1326. }
  1327. static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
  1328. {
  1329. struct fm10k_q_vector *q_vector;
  1330. int q_idx;
  1331. for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
  1332. q_vector = interface->q_vector[q_idx];
  1333. napi_disable(&q_vector->napi);
  1334. }
  1335. }
  1336. void fm10k_down(struct fm10k_intfc *interface)
  1337. {
  1338. struct net_device *netdev = interface->netdev;
  1339. struct fm10k_hw *hw = &interface->hw;
  1340. int err, i = 0, count = 0;
  1341. /* signal that we are down to the interrupt handler and service task */
  1342. if (test_and_set_bit(__FM10K_DOWN, &interface->state))
  1343. return;
  1344. /* call carrier off first to avoid false dev_watchdog timeouts */
  1345. netif_carrier_off(netdev);
  1346. /* disable transmits */
  1347. netif_tx_stop_all_queues(netdev);
  1348. netif_tx_disable(netdev);
  1349. /* reset Rx filters */
  1350. fm10k_reset_rx_state(interface);
  1351. /* disable polling routines */
  1352. fm10k_napi_disable_all(interface);
  1353. /* capture stats one last time before stopping interface */
  1354. fm10k_update_stats(interface);
  1355. /* prevent updating statistics while we're down */
  1356. while (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
  1357. usleep_range(1000, 2000);
  1358. /* skip waiting for TX DMA if we lost PCIe link */
  1359. if (FM10K_REMOVED(hw->hw_addr))
  1360. goto skip_tx_dma_drain;
  1361. /* In some rare circumstances it can take a while for Tx queues to
  1362. * quiesce and be fully disabled. Attempt to .stop_hw() first, and
  1363. * then if we get ERR_REQUESTS_PENDING, go ahead and wait in a loop
  1364. * until the Tx queues have emptied, or until a number of retries. If
  1365. * we fail to clear within the retry loop, we will issue a warning
  1366. * indicating that Tx DMA is probably hung. Note this means we call
  1367. * .stop_hw() twice but this shouldn't cause any problems.
  1368. */
  1369. err = hw->mac.ops.stop_hw(hw);
  1370. if (err != FM10K_ERR_REQUESTS_PENDING)
  1371. goto skip_tx_dma_drain;
  1372. #define TX_DMA_DRAIN_RETRIES 25
  1373. for (count = 0; count < TX_DMA_DRAIN_RETRIES; count++) {
  1374. usleep_range(10000, 20000);
  1375. /* start checking at the last ring to have pending Tx */
  1376. for (; i < interface->num_tx_queues; i++)
  1377. if (fm10k_get_tx_pending(interface->tx_ring[i], false))
  1378. break;
  1379. /* if all the queues are drained, we can break now */
  1380. if (i == interface->num_tx_queues)
  1381. break;
  1382. }
  1383. if (count >= TX_DMA_DRAIN_RETRIES)
  1384. dev_err(&interface->pdev->dev,
  1385. "Tx queues failed to drain after %d tries. Tx DMA is probably hung.\n",
  1386. count);
  1387. skip_tx_dma_drain:
  1388. /* Disable DMA engine for Tx/Rx */
  1389. err = hw->mac.ops.stop_hw(hw);
  1390. if (err == FM10K_ERR_REQUESTS_PENDING)
  1391. dev_err(&interface->pdev->dev,
  1392. "due to pending requests hw was not shut down gracefully\n");
  1393. else if (err)
  1394. dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err);
  1395. /* free any buffers still on the rings */
  1396. fm10k_clean_all_tx_rings(interface);
  1397. fm10k_clean_all_rx_rings(interface);
  1398. }
  1399. /**
  1400. * fm10k_sw_init - Initialize general software structures
  1401. * @interface: host interface private structure to initialize
  1402. *
  1403. * fm10k_sw_init initializes the interface private data structure.
  1404. * Fields are initialized based on PCI device information and
  1405. * OS network device settings (MTU size).
  1406. **/
  1407. static int fm10k_sw_init(struct fm10k_intfc *interface,
  1408. const struct pci_device_id *ent)
  1409. {
  1410. const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
  1411. struct fm10k_hw *hw = &interface->hw;
  1412. struct pci_dev *pdev = interface->pdev;
  1413. struct net_device *netdev = interface->netdev;
  1414. u32 rss_key[FM10K_RSSRK_SIZE];
  1415. unsigned int rss;
  1416. int err;
  1417. /* initialize back pointer */
  1418. hw->back = interface;
  1419. hw->hw_addr = interface->uc_addr;
  1420. /* PCI config space info */
  1421. hw->vendor_id = pdev->vendor;
  1422. hw->device_id = pdev->device;
  1423. hw->revision_id = pdev->revision;
  1424. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  1425. hw->subsystem_device_id = pdev->subsystem_device;
  1426. /* Setup hw api */
  1427. memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
  1428. hw->mac.type = fi->mac;
  1429. /* Setup IOV handlers */
  1430. if (fi->iov_ops)
  1431. memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
  1432. /* Set common capability flags and settings */
  1433. rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
  1434. interface->ring_feature[RING_F_RSS].limit = rss;
  1435. fi->get_invariants(hw);
  1436. /* pick up the PCIe bus settings for reporting later */
  1437. if (hw->mac.ops.get_bus_info)
  1438. hw->mac.ops.get_bus_info(hw);
  1439. /* limit the usable DMA range */
  1440. if (hw->mac.ops.set_dma_mask)
  1441. hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
  1442. /* update netdev with DMA restrictions */
  1443. if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
  1444. netdev->features |= NETIF_F_HIGHDMA;
  1445. netdev->vlan_features |= NETIF_F_HIGHDMA;
  1446. }
  1447. /* delay any future reset requests */
  1448. interface->last_reset = jiffies + (10 * HZ);
  1449. /* reset and initialize the hardware so it is in a known state */
  1450. err = hw->mac.ops.reset_hw(hw);
  1451. if (err) {
  1452. dev_err(&pdev->dev, "reset_hw failed: %d\n", err);
  1453. return err;
  1454. }
  1455. err = hw->mac.ops.init_hw(hw);
  1456. if (err) {
  1457. dev_err(&pdev->dev, "init_hw failed: %d\n", err);
  1458. return err;
  1459. }
  1460. /* initialize hardware statistics */
  1461. hw->mac.ops.update_hw_stats(hw, &interface->stats);
  1462. /* Set upper limit on IOV VFs that can be allocated */
  1463. pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
  1464. /* Start with random Ethernet address */
  1465. eth_random_addr(hw->mac.addr);
  1466. /* Initialize MAC address from hardware */
  1467. err = hw->mac.ops.read_mac_addr(hw);
  1468. if (err) {
  1469. dev_warn(&pdev->dev,
  1470. "Failed to obtain MAC address defaulting to random\n");
  1471. /* tag address assignment as random */
  1472. netdev->addr_assign_type |= NET_ADDR_RANDOM;
  1473. }
  1474. ether_addr_copy(netdev->dev_addr, hw->mac.addr);
  1475. ether_addr_copy(netdev->perm_addr, hw->mac.addr);
  1476. if (!is_valid_ether_addr(netdev->perm_addr)) {
  1477. dev_err(&pdev->dev, "Invalid MAC Address\n");
  1478. return -EIO;
  1479. }
  1480. /* initialize DCBNL interface */
  1481. fm10k_dcbnl_set_ops(netdev);
  1482. /* set default ring sizes */
  1483. interface->tx_ring_count = FM10K_DEFAULT_TXD;
  1484. interface->rx_ring_count = FM10K_DEFAULT_RXD;
  1485. /* set default interrupt moderation */
  1486. interface->tx_itr = FM10K_TX_ITR_DEFAULT;
  1487. interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT;
  1488. /* initialize udp port lists */
  1489. INIT_LIST_HEAD(&interface->vxlan_port);
  1490. INIT_LIST_HEAD(&interface->geneve_port);
  1491. netdev_rss_key_fill(rss_key, sizeof(rss_key));
  1492. memcpy(interface->rssrk, rss_key, sizeof(rss_key));
  1493. /* Start off interface as being down */
  1494. set_bit(__FM10K_DOWN, &interface->state);
  1495. set_bit(__FM10K_UPDATING_STATS, &interface->state);
  1496. return 0;
  1497. }
  1498. static void fm10k_slot_warn(struct fm10k_intfc *interface)
  1499. {
  1500. enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
  1501. enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
  1502. struct fm10k_hw *hw = &interface->hw;
  1503. int max_gts = 0, expected_gts = 0;
  1504. if (pcie_get_minimum_link(interface->pdev, &speed, &width) ||
  1505. speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
  1506. dev_warn(&interface->pdev->dev,
  1507. "Unable to determine PCI Express bandwidth.\n");
  1508. return;
  1509. }
  1510. switch (speed) {
  1511. case PCIE_SPEED_2_5GT:
  1512. /* 8b/10b encoding reduces max throughput by 20% */
  1513. max_gts = 2 * width;
  1514. break;
  1515. case PCIE_SPEED_5_0GT:
  1516. /* 8b/10b encoding reduces max throughput by 20% */
  1517. max_gts = 4 * width;
  1518. break;
  1519. case PCIE_SPEED_8_0GT:
  1520. /* 128b/130b encoding has less than 2% impact on throughput */
  1521. max_gts = 8 * width;
  1522. break;
  1523. default:
  1524. dev_warn(&interface->pdev->dev,
  1525. "Unable to determine PCI Express bandwidth.\n");
  1526. return;
  1527. }
  1528. dev_info(&interface->pdev->dev,
  1529. "PCI Express bandwidth of %dGT/s available\n",
  1530. max_gts);
  1531. dev_info(&interface->pdev->dev,
  1532. "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n",
  1533. (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
  1534. speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
  1535. speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
  1536. "Unknown"),
  1537. hw->bus.width,
  1538. (speed == PCIE_SPEED_2_5GT ? "20%" :
  1539. speed == PCIE_SPEED_5_0GT ? "20%" :
  1540. speed == PCIE_SPEED_8_0GT ? "<2%" :
  1541. "Unknown"),
  1542. (hw->bus.payload == fm10k_bus_payload_128 ? "128B" :
  1543. hw->bus.payload == fm10k_bus_payload_256 ? "256B" :
  1544. hw->bus.payload == fm10k_bus_payload_512 ? "512B" :
  1545. "Unknown"));
  1546. switch (hw->bus_caps.speed) {
  1547. case fm10k_bus_speed_2500:
  1548. /* 8b/10b encoding reduces max throughput by 20% */
  1549. expected_gts = 2 * hw->bus_caps.width;
  1550. break;
  1551. case fm10k_bus_speed_5000:
  1552. /* 8b/10b encoding reduces max throughput by 20% */
  1553. expected_gts = 4 * hw->bus_caps.width;
  1554. break;
  1555. case fm10k_bus_speed_8000:
  1556. /* 128b/130b encoding has less than 2% impact on throughput */
  1557. expected_gts = 8 * hw->bus_caps.width;
  1558. break;
  1559. default:
  1560. dev_warn(&interface->pdev->dev,
  1561. "Unable to determine expected PCI Express bandwidth.\n");
  1562. return;
  1563. }
  1564. if (max_gts >= expected_gts)
  1565. return;
  1566. dev_warn(&interface->pdev->dev,
  1567. "This device requires %dGT/s of bandwidth for optimal performance.\n",
  1568. expected_gts);
  1569. dev_warn(&interface->pdev->dev,
  1570. "A %sslot with x%d lanes is suggested.\n",
  1571. (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " :
  1572. hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " :
  1573. hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""),
  1574. hw->bus_caps.width);
  1575. }
  1576. /**
  1577. * fm10k_probe - Device Initialization Routine
  1578. * @pdev: PCI device information struct
  1579. * @ent: entry in fm10k_pci_tbl
  1580. *
  1581. * Returns 0 on success, negative on failure
  1582. *
  1583. * fm10k_probe initializes an interface identified by a pci_dev structure.
  1584. * The OS initialization, configuring of the interface private structure,
  1585. * and a hardware reset occur.
  1586. **/
  1587. static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1588. {
  1589. struct net_device *netdev;
  1590. struct fm10k_intfc *interface;
  1591. int err;
  1592. if (pdev->error_state != pci_channel_io_normal) {
  1593. dev_err(&pdev->dev,
  1594. "PCI device still in an error state. Unable to load...\n");
  1595. return -EIO;
  1596. }
  1597. err = pci_enable_device_mem(pdev);
  1598. if (err) {
  1599. dev_err(&pdev->dev,
  1600. "PCI enable device failed: %d\n", err);
  1601. return err;
  1602. }
  1603. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
  1604. if (err)
  1605. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  1606. if (err) {
  1607. dev_err(&pdev->dev,
  1608. "DMA configuration failed: %d\n", err);
  1609. goto err_dma;
  1610. }
  1611. err = pci_request_mem_regions(pdev, fm10k_driver_name);
  1612. if (err) {
  1613. dev_err(&pdev->dev,
  1614. "pci_request_selected_regions failed: %d\n", err);
  1615. goto err_pci_reg;
  1616. }
  1617. pci_enable_pcie_error_reporting(pdev);
  1618. pci_set_master(pdev);
  1619. pci_save_state(pdev);
  1620. netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]);
  1621. if (!netdev) {
  1622. err = -ENOMEM;
  1623. goto err_alloc_netdev;
  1624. }
  1625. SET_NETDEV_DEV(netdev, &pdev->dev);
  1626. interface = netdev_priv(netdev);
  1627. pci_set_drvdata(pdev, interface);
  1628. interface->netdev = netdev;
  1629. interface->pdev = pdev;
  1630. interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
  1631. FM10K_UC_ADDR_SIZE);
  1632. if (!interface->uc_addr) {
  1633. err = -EIO;
  1634. goto err_ioremap;
  1635. }
  1636. err = fm10k_sw_init(interface, ent);
  1637. if (err)
  1638. goto err_sw_init;
  1639. /* enable debugfs support */
  1640. fm10k_dbg_intfc_init(interface);
  1641. err = fm10k_init_queueing_scheme(interface);
  1642. if (err)
  1643. goto err_sw_init;
  1644. /* the mbx interrupt might attempt to schedule the service task, so we
  1645. * must ensure it is disabled since we haven't yet requested the timer
  1646. * or work item.
  1647. */
  1648. set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1649. err = fm10k_mbx_request_irq(interface);
  1650. if (err)
  1651. goto err_mbx_interrupt;
  1652. /* final check of hardware state before registering the interface */
  1653. err = fm10k_hw_ready(interface);
  1654. if (err)
  1655. goto err_register;
  1656. err = register_netdev(netdev);
  1657. if (err)
  1658. goto err_register;
  1659. /* carrier off reporting is important to ethtool even BEFORE open */
  1660. netif_carrier_off(netdev);
  1661. /* stop all the transmit queues from transmitting until link is up */
  1662. netif_tx_stop_all_queues(netdev);
  1663. /* Initialize service timer and service task late in order to avoid
  1664. * cleanup issues.
  1665. */
  1666. setup_timer(&interface->service_timer, &fm10k_service_timer,
  1667. (unsigned long)interface);
  1668. INIT_WORK(&interface->service_task, fm10k_service_task);
  1669. /* kick off service timer now, even when interface is down */
  1670. mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
  1671. /* print warning for non-optimal configurations */
  1672. fm10k_slot_warn(interface);
  1673. /* report MAC address for logging */
  1674. dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
  1675. /* enable SR-IOV after registering netdev to enforce PF/VF ordering */
  1676. fm10k_iov_configure(pdev, 0);
  1677. /* clear the service task disable bit to allow service task to start */
  1678. clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1679. return 0;
  1680. err_register:
  1681. fm10k_mbx_free_irq(interface);
  1682. err_mbx_interrupt:
  1683. fm10k_clear_queueing_scheme(interface);
  1684. err_sw_init:
  1685. if (interface->sw_addr)
  1686. iounmap(interface->sw_addr);
  1687. iounmap(interface->uc_addr);
  1688. err_ioremap:
  1689. free_netdev(netdev);
  1690. err_alloc_netdev:
  1691. pci_release_mem_regions(pdev);
  1692. err_pci_reg:
  1693. err_dma:
  1694. pci_disable_device(pdev);
  1695. return err;
  1696. }
  1697. /**
  1698. * fm10k_remove - Device Removal Routine
  1699. * @pdev: PCI device information struct
  1700. *
  1701. * fm10k_remove is called by the PCI subsystem to alert the driver
  1702. * that it should release a PCI device. The could be caused by a
  1703. * Hot-Plug event, or because the driver is going to be removed from
  1704. * memory.
  1705. **/
  1706. static void fm10k_remove(struct pci_dev *pdev)
  1707. {
  1708. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1709. struct net_device *netdev = interface->netdev;
  1710. del_timer_sync(&interface->service_timer);
  1711. set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1712. cancel_work_sync(&interface->service_task);
  1713. /* free netdev, this may bounce the interrupts due to setup_tc */
  1714. if (netdev->reg_state == NETREG_REGISTERED)
  1715. unregister_netdev(netdev);
  1716. /* release VFs */
  1717. fm10k_iov_disable(pdev);
  1718. /* disable mailbox interrupt */
  1719. fm10k_mbx_free_irq(interface);
  1720. /* free interrupts */
  1721. fm10k_clear_queueing_scheme(interface);
  1722. /* remove any debugfs interfaces */
  1723. fm10k_dbg_intfc_exit(interface);
  1724. if (interface->sw_addr)
  1725. iounmap(interface->sw_addr);
  1726. iounmap(interface->uc_addr);
  1727. free_netdev(netdev);
  1728. pci_release_mem_regions(pdev);
  1729. pci_disable_pcie_error_reporting(pdev);
  1730. pci_disable_device(pdev);
  1731. }
  1732. static void fm10k_prepare_suspend(struct fm10k_intfc *interface)
  1733. {
  1734. /* the watchdog task reads from registers, which might appear like
  1735. * a surprise remove if the PCIe device is disabled while we're
  1736. * stopped. We stop the watchdog task until after we resume software
  1737. * activity.
  1738. */
  1739. set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1740. cancel_work_sync(&interface->service_task);
  1741. fm10k_prepare_for_reset(interface);
  1742. }
  1743. static int fm10k_handle_resume(struct fm10k_intfc *interface)
  1744. {
  1745. struct fm10k_hw *hw = &interface->hw;
  1746. int err;
  1747. /* reset statistics starting values */
  1748. hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
  1749. err = fm10k_handle_reset(interface);
  1750. if (err)
  1751. return err;
  1752. /* assume host is not ready, to prevent race with watchdog in case we
  1753. * actually don't have connection to the switch
  1754. */
  1755. interface->host_ready = false;
  1756. fm10k_watchdog_host_not_ready(interface);
  1757. /* force link to stay down for a second to prevent link flutter */
  1758. interface->link_down_event = jiffies + (HZ);
  1759. set_bit(__FM10K_LINK_DOWN, &interface->state);
  1760. /* clear the service task disable bit to allow service task to start */
  1761. clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1762. fm10k_service_event_schedule(interface);
  1763. return err;
  1764. }
  1765. #ifdef CONFIG_PM
  1766. /**
  1767. * fm10k_resume - Restore device to pre-sleep state
  1768. * @pdev: PCI device information struct
  1769. *
  1770. * fm10k_resume is called after the system has powered back up from a sleep
  1771. * state and is ready to resume operation. This function is meant to restore
  1772. * the device back to its pre-sleep state.
  1773. **/
  1774. static int fm10k_resume(struct pci_dev *pdev)
  1775. {
  1776. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1777. struct net_device *netdev = interface->netdev;
  1778. struct fm10k_hw *hw = &interface->hw;
  1779. u32 err;
  1780. pci_set_power_state(pdev, PCI_D0);
  1781. pci_restore_state(pdev);
  1782. /* pci_restore_state clears dev->state_saved so call
  1783. * pci_save_state to restore it.
  1784. */
  1785. pci_save_state(pdev);
  1786. err = pci_enable_device_mem(pdev);
  1787. if (err) {
  1788. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  1789. return err;
  1790. }
  1791. pci_set_master(pdev);
  1792. pci_wake_from_d3(pdev, false);
  1793. /* refresh hw_addr in case it was dropped */
  1794. hw->hw_addr = interface->uc_addr;
  1795. err = fm10k_handle_resume(interface);
  1796. if (err)
  1797. return err;
  1798. netif_device_attach(netdev);
  1799. return 0;
  1800. }
  1801. /**
  1802. * fm10k_suspend - Prepare the device for a system sleep state
  1803. * @pdev: PCI device information struct
  1804. *
  1805. * fm10k_suspend is meant to shutdown the device prior to the system entering
  1806. * a sleep state. The fm10k hardware does not support wake on lan so the
  1807. * driver simply needs to shut down the device so it is in a low power state.
  1808. **/
  1809. static int fm10k_suspend(struct pci_dev *pdev,
  1810. pm_message_t __always_unused state)
  1811. {
  1812. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1813. struct net_device *netdev = interface->netdev;
  1814. int err = 0;
  1815. netif_device_detach(netdev);
  1816. fm10k_prepare_suspend(interface);
  1817. err = pci_save_state(pdev);
  1818. if (err)
  1819. return err;
  1820. pci_disable_device(pdev);
  1821. pci_wake_from_d3(pdev, false);
  1822. pci_set_power_state(pdev, PCI_D3hot);
  1823. return 0;
  1824. }
  1825. #endif /* CONFIG_PM */
  1826. /**
  1827. * fm10k_io_error_detected - called when PCI error is detected
  1828. * @pdev: Pointer to PCI device
  1829. * @state: The current pci connection state
  1830. *
  1831. * This function is called after a PCI bus error affecting
  1832. * this device has been detected.
  1833. */
  1834. static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
  1835. pci_channel_state_t state)
  1836. {
  1837. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1838. struct net_device *netdev = interface->netdev;
  1839. netif_device_detach(netdev);
  1840. if (state == pci_channel_io_perm_failure)
  1841. return PCI_ERS_RESULT_DISCONNECT;
  1842. fm10k_prepare_suspend(interface);
  1843. /* Request a slot reset. */
  1844. return PCI_ERS_RESULT_NEED_RESET;
  1845. }
  1846. /**
  1847. * fm10k_io_slot_reset - called after the pci bus has been reset.
  1848. * @pdev: Pointer to PCI device
  1849. *
  1850. * Restart the card from scratch, as if from a cold-boot.
  1851. */
  1852. static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
  1853. {
  1854. pci_ers_result_t result;
  1855. if (pci_reenable_device(pdev)) {
  1856. dev_err(&pdev->dev,
  1857. "Cannot re-enable PCI device after reset.\n");
  1858. result = PCI_ERS_RESULT_DISCONNECT;
  1859. } else {
  1860. pci_set_master(pdev);
  1861. pci_restore_state(pdev);
  1862. /* After second error pci->state_saved is false, this
  1863. * resets it so EEH doesn't break.
  1864. */
  1865. pci_save_state(pdev);
  1866. pci_wake_from_d3(pdev, false);
  1867. result = PCI_ERS_RESULT_RECOVERED;
  1868. }
  1869. pci_cleanup_aer_uncorrect_error_status(pdev);
  1870. return result;
  1871. }
  1872. /**
  1873. * fm10k_io_resume - called when traffic can start flowing again.
  1874. * @pdev: Pointer to PCI device
  1875. *
  1876. * This callback is called when the error recovery driver tells us that
  1877. * its OK to resume normal operation.
  1878. */
  1879. static void fm10k_io_resume(struct pci_dev *pdev)
  1880. {
  1881. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1882. struct net_device *netdev = interface->netdev;
  1883. int err;
  1884. err = fm10k_handle_resume(interface);
  1885. if (err)
  1886. dev_warn(&pdev->dev,
  1887. "fm10k_io_resume failed: %d\n", err);
  1888. else
  1889. netif_device_attach(netdev);
  1890. }
  1891. /**
  1892. * fm10k_io_reset_notify - called when PCI function is reset
  1893. * @pdev: Pointer to PCI device
  1894. *
  1895. * This callback is called when the PCI function is reset such as from
  1896. * /sys/class/net/<enpX>/device/reset or similar. When prepare is true, it
  1897. * means we should prepare for a function reset. If prepare is false, it means
  1898. * the function reset just occurred.
  1899. */
  1900. static void fm10k_io_reset_notify(struct pci_dev *pdev, bool prepare)
  1901. {
  1902. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1903. int err = 0;
  1904. if (prepare) {
  1905. /* warn incase we have any active VF devices */
  1906. if (pci_num_vf(pdev))
  1907. dev_warn(&pdev->dev,
  1908. "PCIe FLR may cause issues for any active VF devices\n");
  1909. fm10k_prepare_suspend(interface);
  1910. } else {
  1911. err = fm10k_handle_resume(interface);
  1912. }
  1913. if (err) {
  1914. dev_warn(&pdev->dev,
  1915. "fm10k_io_reset_notify failed: %d\n", err);
  1916. netif_device_detach(interface->netdev);
  1917. }
  1918. }
  1919. static const struct pci_error_handlers fm10k_err_handler = {
  1920. .error_detected = fm10k_io_error_detected,
  1921. .slot_reset = fm10k_io_slot_reset,
  1922. .resume = fm10k_io_resume,
  1923. .reset_notify = fm10k_io_reset_notify,
  1924. };
  1925. static struct pci_driver fm10k_driver = {
  1926. .name = fm10k_driver_name,
  1927. .id_table = fm10k_pci_tbl,
  1928. .probe = fm10k_probe,
  1929. .remove = fm10k_remove,
  1930. #ifdef CONFIG_PM
  1931. .suspend = fm10k_suspend,
  1932. .resume = fm10k_resume,
  1933. #endif
  1934. .sriov_configure = fm10k_iov_configure,
  1935. .err_handler = &fm10k_err_handler
  1936. };
  1937. /**
  1938. * fm10k_register_pci_driver - register driver interface
  1939. *
  1940. * This function is called on module load in order to register the driver.
  1941. **/
  1942. int fm10k_register_pci_driver(void)
  1943. {
  1944. return pci_register_driver(&fm10k_driver);
  1945. }
  1946. /**
  1947. * fm10k_unregister_pci_driver - unregister driver interface
  1948. *
  1949. * This function is called on module unload in order to remove the driver.
  1950. **/
  1951. void fm10k_unregister_pci_driver(void)
  1952. {
  1953. pci_unregister_driver(&fm10k_driver);
  1954. }