kvaser_pci.c 9.9 KB

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  1. /*
  2. * Copyright (C) 2008 Per Dalen <per.dalen@cnw.se>
  3. *
  4. * Parts of this software are based on (derived) the following:
  5. *
  6. * - Kvaser linux driver, version 4.72 BETA
  7. * Copyright (C) 2002-2007 KVASER AB
  8. *
  9. * - Lincan driver, version 0.3.3, OCERA project
  10. * Copyright (C) 2004 Pavel Pisa
  11. * Copyright (C) 2001 Arnaud Westenberg
  12. *
  13. * - Socketcan SJA1000 drivers
  14. * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
  15. * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
  16. * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,
  17. * 38106 Braunschweig, GERMANY
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the version 2 of the GNU General Public License
  21. * as published by the Free Software Foundation
  22. *
  23. * This program is distributed in the hope that it will be useful, but
  24. * WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  26. * General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  30. */
  31. #include <linux/kernel.h>
  32. #include <linux/module.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/delay.h>
  36. #include <linux/pci.h>
  37. #include <linux/can/dev.h>
  38. #include <linux/io.h>
  39. #include "sja1000.h"
  40. #define DRV_NAME "kvaser_pci"
  41. MODULE_AUTHOR("Per Dalen <per.dalen@cnw.se>");
  42. MODULE_DESCRIPTION("Socket-CAN driver for KVASER PCAN PCI cards");
  43. MODULE_SUPPORTED_DEVICE("KVASER PCAN PCI CAN card");
  44. MODULE_LICENSE("GPL v2");
  45. #define MAX_NO_OF_CHANNELS 4 /* max no of channels on a single card */
  46. struct kvaser_pci {
  47. int channel;
  48. struct pci_dev *pci_dev;
  49. struct net_device *slave_dev[MAX_NO_OF_CHANNELS-1];
  50. void __iomem *conf_addr;
  51. void __iomem *res_addr;
  52. int no_channels;
  53. u8 xilinx_ver;
  54. };
  55. #define KVASER_PCI_CAN_CLOCK (16000000 / 2)
  56. /*
  57. * The board configuration is probably following:
  58. * RX1 is connected to ground.
  59. * TX1 is not connected.
  60. * CLKO is not connected.
  61. * Setting the OCR register to 0xDA is a good idea.
  62. * This means normal output mode , push-pull and the correct polarity.
  63. */
  64. #define KVASER_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
  65. /*
  66. * In the CDR register, you should set CBP to 1.
  67. * You will probably also want to set the clock divider value to 0
  68. * (meaning divide-by-2), the Pelican bit, and the clock-off bit
  69. * (you will have no need for CLKOUT anyway).
  70. */
  71. #define KVASER_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
  72. /*
  73. * These register values are valid for revision 14 of the Xilinx logic.
  74. */
  75. #define XILINX_VERINT 7 /* Lower nibble simulate interrupts,
  76. high nibble version number. */
  77. #define XILINX_PRESUMED_VERSION 14
  78. /*
  79. * Important S5920 registers
  80. */
  81. #define S5920_INTCSR 0x38
  82. #define S5920_PTCR 0x60
  83. #define INTCSR_ADDON_INTENABLE_M 0x2000
  84. #define KVASER_PCI_PORT_BYTES 0x20
  85. #define PCI_CONFIG_PORT_SIZE 0x80 /* size of the config io-memory */
  86. #define PCI_PORT_SIZE 0x80 /* size of a channel io-memory */
  87. #define PCI_PORT_XILINX_SIZE 0x08 /* size of a xilinx io-memory */
  88. #define KVASER_PCI_VENDOR_ID1 0x10e8 /* the PCI device and vendor IDs */
  89. #define KVASER_PCI_DEVICE_ID1 0x8406
  90. #define KVASER_PCI_VENDOR_ID2 0x1a07 /* the PCI device and vendor IDs */
  91. #define KVASER_PCI_DEVICE_ID2 0x0008
  92. static const struct pci_device_id kvaser_pci_tbl[] = {
  93. {KVASER_PCI_VENDOR_ID1, KVASER_PCI_DEVICE_ID1, PCI_ANY_ID, PCI_ANY_ID,},
  94. {KVASER_PCI_VENDOR_ID2, KVASER_PCI_DEVICE_ID2, PCI_ANY_ID, PCI_ANY_ID,},
  95. { 0,}
  96. };
  97. MODULE_DEVICE_TABLE(pci, kvaser_pci_tbl);
  98. static u8 kvaser_pci_read_reg(const struct sja1000_priv *priv, int port)
  99. {
  100. return ioread8(priv->reg_base + port);
  101. }
  102. static void kvaser_pci_write_reg(const struct sja1000_priv *priv,
  103. int port, u8 val)
  104. {
  105. iowrite8(val, priv->reg_base + port);
  106. }
  107. static void kvaser_pci_disable_irq(struct net_device *dev)
  108. {
  109. struct sja1000_priv *priv = netdev_priv(dev);
  110. struct kvaser_pci *board = priv->priv;
  111. u32 intcsr;
  112. /* Disable interrupts from card */
  113. intcsr = ioread32(board->conf_addr + S5920_INTCSR);
  114. intcsr &= ~INTCSR_ADDON_INTENABLE_M;
  115. iowrite32(intcsr, board->conf_addr + S5920_INTCSR);
  116. }
  117. static void kvaser_pci_enable_irq(struct net_device *dev)
  118. {
  119. struct sja1000_priv *priv = netdev_priv(dev);
  120. struct kvaser_pci *board = priv->priv;
  121. u32 tmp_en_io;
  122. /* Enable interrupts from card */
  123. tmp_en_io = ioread32(board->conf_addr + S5920_INTCSR);
  124. tmp_en_io |= INTCSR_ADDON_INTENABLE_M;
  125. iowrite32(tmp_en_io, board->conf_addr + S5920_INTCSR);
  126. }
  127. static int number_of_sja1000_chip(void __iomem *base_addr)
  128. {
  129. u8 status;
  130. int i;
  131. for (i = 0; i < MAX_NO_OF_CHANNELS; i++) {
  132. /* reset chip */
  133. iowrite8(MOD_RM, base_addr +
  134. (i * KVASER_PCI_PORT_BYTES) + SJA1000_MOD);
  135. status = ioread8(base_addr +
  136. (i * KVASER_PCI_PORT_BYTES) + SJA1000_MOD);
  137. /* check reset bit */
  138. if (!(status & MOD_RM))
  139. break;
  140. }
  141. return i;
  142. }
  143. static void kvaser_pci_del_chan(struct net_device *dev)
  144. {
  145. struct sja1000_priv *priv;
  146. struct kvaser_pci *board;
  147. int i;
  148. if (!dev)
  149. return;
  150. priv = netdev_priv(dev);
  151. board = priv->priv;
  152. if (!board)
  153. return;
  154. dev_info(&board->pci_dev->dev, "Removing device %s\n",
  155. dev->name);
  156. /* Disable PCI interrupts */
  157. kvaser_pci_disable_irq(dev);
  158. for (i = 0; i < board->no_channels - 1; i++) {
  159. if (board->slave_dev[i]) {
  160. dev_info(&board->pci_dev->dev, "Removing device %s\n",
  161. board->slave_dev[i]->name);
  162. unregister_sja1000dev(board->slave_dev[i]);
  163. free_sja1000dev(board->slave_dev[i]);
  164. }
  165. }
  166. unregister_sja1000dev(dev);
  167. pci_iounmap(board->pci_dev, priv->reg_base);
  168. pci_iounmap(board->pci_dev, board->conf_addr);
  169. pci_iounmap(board->pci_dev, board->res_addr);
  170. free_sja1000dev(dev);
  171. }
  172. static int kvaser_pci_add_chan(struct pci_dev *pdev, int channel,
  173. struct net_device **master_dev,
  174. void __iomem *conf_addr,
  175. void __iomem *res_addr,
  176. void __iomem *base_addr)
  177. {
  178. struct net_device *dev;
  179. struct sja1000_priv *priv;
  180. struct kvaser_pci *board;
  181. int err;
  182. dev = alloc_sja1000dev(sizeof(struct kvaser_pci));
  183. if (dev == NULL)
  184. return -ENOMEM;
  185. priv = netdev_priv(dev);
  186. board = priv->priv;
  187. board->pci_dev = pdev;
  188. board->channel = channel;
  189. /* S5920 */
  190. board->conf_addr = conf_addr;
  191. /* XILINX board wide address */
  192. board->res_addr = res_addr;
  193. if (channel == 0) {
  194. board->xilinx_ver =
  195. ioread8(board->res_addr + XILINX_VERINT) >> 4;
  196. /* Assert PTADR# - we're in passive mode so the other bits are
  197. not important */
  198. iowrite32(0x80808080UL, board->conf_addr + S5920_PTCR);
  199. /* Enable interrupts from card */
  200. kvaser_pci_enable_irq(dev);
  201. } else {
  202. struct sja1000_priv *master_priv = netdev_priv(*master_dev);
  203. struct kvaser_pci *master_board = master_priv->priv;
  204. master_board->slave_dev[channel - 1] = dev;
  205. master_board->no_channels = channel + 1;
  206. board->xilinx_ver = master_board->xilinx_ver;
  207. }
  208. priv->reg_base = base_addr + channel * KVASER_PCI_PORT_BYTES;
  209. priv->read_reg = kvaser_pci_read_reg;
  210. priv->write_reg = kvaser_pci_write_reg;
  211. priv->can.clock.freq = KVASER_PCI_CAN_CLOCK;
  212. priv->ocr = KVASER_PCI_OCR;
  213. priv->cdr = KVASER_PCI_CDR;
  214. priv->irq_flags = IRQF_SHARED;
  215. dev->irq = pdev->irq;
  216. dev_info(&pdev->dev, "reg_base=%p conf_addr=%p irq=%d\n",
  217. priv->reg_base, board->conf_addr, dev->irq);
  218. SET_NETDEV_DEV(dev, &pdev->dev);
  219. dev->dev_id = channel;
  220. /* Register SJA1000 device */
  221. err = register_sja1000dev(dev);
  222. if (err) {
  223. dev_err(&pdev->dev, "Registering device failed (err=%d)\n",
  224. err);
  225. goto failure;
  226. }
  227. if (channel == 0)
  228. *master_dev = dev;
  229. return 0;
  230. failure:
  231. kvaser_pci_del_chan(dev);
  232. return err;
  233. }
  234. static int kvaser_pci_init_one(struct pci_dev *pdev,
  235. const struct pci_device_id *ent)
  236. {
  237. int err;
  238. struct net_device *master_dev = NULL;
  239. struct sja1000_priv *priv;
  240. struct kvaser_pci *board;
  241. int no_channels;
  242. void __iomem *base_addr = NULL;
  243. void __iomem *conf_addr = NULL;
  244. void __iomem *res_addr = NULL;
  245. int i;
  246. dev_info(&pdev->dev, "initializing device %04x:%04x\n",
  247. pdev->vendor, pdev->device);
  248. err = pci_enable_device(pdev);
  249. if (err)
  250. goto failure;
  251. err = pci_request_regions(pdev, DRV_NAME);
  252. if (err)
  253. goto failure_release_pci;
  254. /* S5920 */
  255. conf_addr = pci_iomap(pdev, 0, PCI_CONFIG_PORT_SIZE);
  256. if (conf_addr == NULL) {
  257. err = -ENODEV;
  258. goto failure_release_regions;
  259. }
  260. /* XILINX board wide address */
  261. res_addr = pci_iomap(pdev, 2, PCI_PORT_XILINX_SIZE);
  262. if (res_addr == NULL) {
  263. err = -ENOMEM;
  264. goto failure_iounmap;
  265. }
  266. base_addr = pci_iomap(pdev, 1, PCI_PORT_SIZE);
  267. if (base_addr == NULL) {
  268. err = -ENOMEM;
  269. goto failure_iounmap;
  270. }
  271. no_channels = number_of_sja1000_chip(base_addr);
  272. if (no_channels == 0) {
  273. err = -ENOMEM;
  274. goto failure_iounmap;
  275. }
  276. for (i = 0; i < no_channels; i++) {
  277. err = kvaser_pci_add_chan(pdev, i, &master_dev,
  278. conf_addr, res_addr,
  279. base_addr);
  280. if (err)
  281. goto failure_cleanup;
  282. }
  283. priv = netdev_priv(master_dev);
  284. board = priv->priv;
  285. dev_info(&pdev->dev, "xilinx version=%d number of channels=%d\n",
  286. board->xilinx_ver, board->no_channels);
  287. pci_set_drvdata(pdev, master_dev);
  288. return 0;
  289. failure_cleanup:
  290. kvaser_pci_del_chan(master_dev);
  291. failure_iounmap:
  292. if (conf_addr != NULL)
  293. pci_iounmap(pdev, conf_addr);
  294. if (res_addr != NULL)
  295. pci_iounmap(pdev, res_addr);
  296. if (base_addr != NULL)
  297. pci_iounmap(pdev, base_addr);
  298. failure_release_regions:
  299. pci_release_regions(pdev);
  300. failure_release_pci:
  301. pci_disable_device(pdev);
  302. failure:
  303. return err;
  304. }
  305. static void kvaser_pci_remove_one(struct pci_dev *pdev)
  306. {
  307. struct net_device *dev = pci_get_drvdata(pdev);
  308. kvaser_pci_del_chan(dev);
  309. pci_release_regions(pdev);
  310. pci_disable_device(pdev);
  311. }
  312. static struct pci_driver kvaser_pci_driver = {
  313. .name = DRV_NAME,
  314. .id_table = kvaser_pci_tbl,
  315. .probe = kvaser_pci_init_one,
  316. .remove = kvaser_pci_remove_one,
  317. };
  318. module_pci_driver(kvaser_pci_driver);