Kconfig 4.5 KB

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  1. #
  2. # Memory devices
  3. #
  4. menuconfig MEMORY
  5. bool "Memory Controller drivers"
  6. if MEMORY
  7. config ARM_PL172_MPMC
  8. tristate "ARM PL172 MPMC driver"
  9. depends on ARM_AMBA && OF
  10. help
  11. This selects the ARM PrimeCell PL172 MultiPort Memory Controller.
  12. If you have an embedded system with an AMBA bus and a PL172
  13. controller, say Y or M here.
  14. config ATMEL_SDRAMC
  15. bool "Atmel (Multi-port DDR-)SDRAM Controller"
  16. default y
  17. depends on ARCH_AT91 && OF
  18. help
  19. This driver is for Atmel SDRAM Controller or Atmel Multi-port
  20. DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs.
  21. Starting with the at91sam9g45, this controller supports SDR, DDR and
  22. LP-DDR memories.
  23. config ATMEL_EBI
  24. bool "Atmel EBI driver"
  25. default y
  26. depends on ARCH_AT91 && OF
  27. select MFD_SYSCON
  28. help
  29. Driver for Atmel EBI controller.
  30. Used to configure the EBI (external bus interface) when the device-
  31. tree is used. This bus supports NANDs, external ethernet controller,
  32. SRAMs, ATA devices, etc.
  33. config TI_AEMIF
  34. tristate "Texas Instruments AEMIF driver"
  35. depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF
  36. help
  37. This driver is for the AEMIF module available in Texas Instruments
  38. SoCs. AEMIF stands for Asynchronous External Memory Interface and
  39. is intended to provide a glue-less interface to a variety of
  40. asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
  41. of 256M bytes of any of these memories can be accessed at a given
  42. time via four chip selects with 64M byte access per chip select.
  43. config TI_EMIF
  44. tristate "Texas Instruments EMIF driver"
  45. depends on ARCH_OMAP2PLUS
  46. select DDR
  47. help
  48. This driver is for the EMIF module available in Texas Instruments
  49. SoCs. EMIF is an SDRAM controller that, based on its revision,
  50. supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
  51. This driver takes care of only LPDDR2 memories presently. The
  52. functions of the driver includes re-configuring AC timing
  53. parameters and other settings during frequency, voltage and
  54. temperature changes
  55. config OMAP_GPMC
  56. bool
  57. select GPIOLIB
  58. help
  59. This driver is for the General Purpose Memory Controller (GPMC)
  60. present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows
  61. interfacing to a variety of asynchronous as well as synchronous
  62. memory drives like NOR, NAND, OneNAND, SRAM.
  63. config OMAP_GPMC_DEBUG
  64. bool "Enable GPMC debug output and skip reset of GPMC during init"
  65. depends on OMAP_GPMC
  66. help
  67. Enables verbose debugging mostly to decode the bootloader provided
  68. timings. To preserve the bootloader provided timings, the reset
  69. of GPMC is skipped during init. Enable this during development to
  70. configure devices connected to the GPMC bus.
  71. NOTE: In addition to matching the register setup with the bootloader
  72. you also need to match the GPMC FCLK frequency used by the
  73. bootloader or else the GPMC timings won't be identical with the
  74. bootloader timings.
  75. config MVEBU_DEVBUS
  76. bool "Marvell EBU Device Bus Controller"
  77. default y
  78. depends on PLAT_ORION && OF
  79. help
  80. This driver is for the Device Bus controller available in some
  81. Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and
  82. Armada 370 and Armada XP. This controller allows to handle flash
  83. devices such as NOR, NAND, SRAM, and FPGA.
  84. config TEGRA20_MC
  85. bool "Tegra20 Memory Controller(MC) driver"
  86. default y
  87. depends on ARCH_TEGRA_2x_SOC
  88. help
  89. This driver is for the Memory Controller(MC) module available
  90. in Tegra20 SoCs, mainly for a address translation fault
  91. analysis, especially for IOMMU/GART(Graphics Address
  92. Relocation Table) module.
  93. config FSL_CORENET_CF
  94. tristate "Freescale CoreNet Error Reporting"
  95. depends on FSL_SOC_BOOKE
  96. help
  97. Say Y for reporting of errors from the Freescale CoreNet
  98. Coherency Fabric. Errors reported include accesses to
  99. physical addresses that mapped by no local access window
  100. (LAW) or an invalid LAW, as well as bad cache state that
  101. represents a coherency violation.
  102. config FSL_IFC
  103. bool
  104. depends on FSL_SOC || ARCH_LAYERSCAPE
  105. config JZ4780_NEMC
  106. bool "Ingenic JZ4780 SoC NEMC driver"
  107. default y
  108. depends on MACH_JZ4780
  109. help
  110. This driver is for the NAND/External Memory Controller (NEMC) in
  111. the Ingenic JZ4780. This controller is used to handle external
  112. memory devices such as NAND and SRAM.
  113. config MTK_SMI
  114. bool
  115. depends on ARCH_MEDIATEK || COMPILE_TEST
  116. help
  117. This driver is for the Memory Controller module in MediaTek SoCs,
  118. mainly help enable/disable iommu and control the power domain and
  119. clocks for each local arbiter.
  120. source "drivers/memory/samsung/Kconfig"
  121. source "drivers/memory/tegra/Kconfig"
  122. endif