gpio-mcp23s08.c 24 KB

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  1. /*
  2. * MCP23S08 SPI/I2C GPIO gpio expander driver
  3. *
  4. * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
  5. * supported.
  6. * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
  7. * interrupts is also supported.
  8. * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
  9. * also capable of generating interrupts, but the linux driver does not
  10. * support that yet.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/device.h>
  14. #include <linux/mutex.h>
  15. #include <linux/module.h>
  16. #include <linux/gpio.h>
  17. #include <linux/i2c.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/mcp23s08.h>
  20. #include <linux/slab.h>
  21. #include <asm/byteorder.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/of_device.h>
  25. /**
  26. * MCP types supported by driver
  27. */
  28. #define MCP_TYPE_S08 0
  29. #define MCP_TYPE_S17 1
  30. #define MCP_TYPE_008 2
  31. #define MCP_TYPE_017 3
  32. #define MCP_TYPE_S18 4
  33. /* Registers are all 8 bits wide.
  34. *
  35. * The mcp23s17 has twice as many bits, and can be configured to work
  36. * with either 16 bit registers or with two adjacent 8 bit banks.
  37. */
  38. #define MCP_IODIR 0x00 /* init/reset: all ones */
  39. #define MCP_IPOL 0x01
  40. #define MCP_GPINTEN 0x02
  41. #define MCP_DEFVAL 0x03
  42. #define MCP_INTCON 0x04
  43. #define MCP_IOCON 0x05
  44. # define IOCON_MIRROR (1 << 6)
  45. # define IOCON_SEQOP (1 << 5)
  46. # define IOCON_HAEN (1 << 3)
  47. # define IOCON_ODR (1 << 2)
  48. # define IOCON_INTPOL (1 << 1)
  49. # define IOCON_INTCC (1)
  50. #define MCP_GPPU 0x06
  51. #define MCP_INTF 0x07
  52. #define MCP_INTCAP 0x08
  53. #define MCP_GPIO 0x09
  54. #define MCP_OLAT 0x0a
  55. struct mcp23s08;
  56. struct mcp23s08_ops {
  57. int (*read)(struct mcp23s08 *mcp, unsigned reg);
  58. int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
  59. int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
  60. u16 *vals, unsigned n);
  61. };
  62. struct mcp23s08 {
  63. u8 addr;
  64. bool irq_active_high;
  65. u16 cache[11];
  66. u16 irq_rise;
  67. u16 irq_fall;
  68. int irq;
  69. bool irq_controller;
  70. /* lock protects the cached values */
  71. struct mutex lock;
  72. struct mutex irq_lock;
  73. struct gpio_chip chip;
  74. const struct mcp23s08_ops *ops;
  75. void *data; /* ops specific data */
  76. };
  77. /* A given spi_device can represent up to eight mcp23sxx chips
  78. * sharing the same chipselect but using different addresses
  79. * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
  80. * Driver data holds all the per-chip data.
  81. */
  82. struct mcp23s08_driver_data {
  83. unsigned ngpio;
  84. struct mcp23s08 *mcp[8];
  85. struct mcp23s08 chip[];
  86. };
  87. /*----------------------------------------------------------------------*/
  88. #if IS_ENABLED(CONFIG_I2C)
  89. static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
  90. {
  91. return i2c_smbus_read_byte_data(mcp->data, reg);
  92. }
  93. static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  94. {
  95. return i2c_smbus_write_byte_data(mcp->data, reg, val);
  96. }
  97. static int
  98. mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  99. {
  100. while (n--) {
  101. int ret = mcp23008_read(mcp, reg++);
  102. if (ret < 0)
  103. return ret;
  104. *vals++ = ret;
  105. }
  106. return 0;
  107. }
  108. static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
  109. {
  110. return i2c_smbus_read_word_data(mcp->data, reg << 1);
  111. }
  112. static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  113. {
  114. return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
  115. }
  116. static int
  117. mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  118. {
  119. while (n--) {
  120. int ret = mcp23017_read(mcp, reg++);
  121. if (ret < 0)
  122. return ret;
  123. *vals++ = ret;
  124. }
  125. return 0;
  126. }
  127. static const struct mcp23s08_ops mcp23008_ops = {
  128. .read = mcp23008_read,
  129. .write = mcp23008_write,
  130. .read_regs = mcp23008_read_regs,
  131. };
  132. static const struct mcp23s08_ops mcp23017_ops = {
  133. .read = mcp23017_read,
  134. .write = mcp23017_write,
  135. .read_regs = mcp23017_read_regs,
  136. };
  137. #endif /* CONFIG_I2C */
  138. /*----------------------------------------------------------------------*/
  139. #ifdef CONFIG_SPI_MASTER
  140. static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
  141. {
  142. u8 tx[2], rx[1];
  143. int status;
  144. tx[0] = mcp->addr | 0x01;
  145. tx[1] = reg;
  146. status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
  147. return (status < 0) ? status : rx[0];
  148. }
  149. static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  150. {
  151. u8 tx[3];
  152. tx[0] = mcp->addr;
  153. tx[1] = reg;
  154. tx[2] = val;
  155. return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
  156. }
  157. static int
  158. mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  159. {
  160. u8 tx[2], *tmp;
  161. int status;
  162. if ((n + reg) > sizeof(mcp->cache))
  163. return -EINVAL;
  164. tx[0] = mcp->addr | 0x01;
  165. tx[1] = reg;
  166. tmp = (u8 *)vals;
  167. status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
  168. if (status >= 0) {
  169. while (n--)
  170. vals[n] = tmp[n]; /* expand to 16bit */
  171. }
  172. return status;
  173. }
  174. static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
  175. {
  176. u8 tx[2], rx[2];
  177. int status;
  178. tx[0] = mcp->addr | 0x01;
  179. tx[1] = reg << 1;
  180. status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
  181. return (status < 0) ? status : (rx[0] | (rx[1] << 8));
  182. }
  183. static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  184. {
  185. u8 tx[4];
  186. tx[0] = mcp->addr;
  187. tx[1] = reg << 1;
  188. tx[2] = val;
  189. tx[3] = val >> 8;
  190. return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
  191. }
  192. static int
  193. mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  194. {
  195. u8 tx[2];
  196. int status;
  197. if ((n + reg) > sizeof(mcp->cache))
  198. return -EINVAL;
  199. tx[0] = mcp->addr | 0x01;
  200. tx[1] = reg << 1;
  201. status = spi_write_then_read(mcp->data, tx, sizeof(tx),
  202. (u8 *)vals, n * 2);
  203. if (status >= 0) {
  204. while (n--)
  205. vals[n] = __le16_to_cpu((__le16)vals[n]);
  206. }
  207. return status;
  208. }
  209. static const struct mcp23s08_ops mcp23s08_ops = {
  210. .read = mcp23s08_read,
  211. .write = mcp23s08_write,
  212. .read_regs = mcp23s08_read_regs,
  213. };
  214. static const struct mcp23s08_ops mcp23s17_ops = {
  215. .read = mcp23s17_read,
  216. .write = mcp23s17_write,
  217. .read_regs = mcp23s17_read_regs,
  218. };
  219. #endif /* CONFIG_SPI_MASTER */
  220. /*----------------------------------------------------------------------*/
  221. static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
  222. {
  223. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  224. int status;
  225. mutex_lock(&mcp->lock);
  226. mcp->cache[MCP_IODIR] |= (1 << offset);
  227. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  228. mutex_unlock(&mcp->lock);
  229. return status;
  230. }
  231. static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
  232. {
  233. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  234. int status;
  235. mutex_lock(&mcp->lock);
  236. /* REVISIT reading this clears any IRQ ... */
  237. status = mcp->ops->read(mcp, MCP_GPIO);
  238. if (status < 0)
  239. status = 0;
  240. else {
  241. mcp->cache[MCP_GPIO] = status;
  242. status = !!(status & (1 << offset));
  243. }
  244. mutex_unlock(&mcp->lock);
  245. return status;
  246. }
  247. static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
  248. {
  249. unsigned olat = mcp->cache[MCP_OLAT];
  250. if (value)
  251. olat |= mask;
  252. else
  253. olat &= ~mask;
  254. mcp->cache[MCP_OLAT] = olat;
  255. return mcp->ops->write(mcp, MCP_OLAT, olat);
  256. }
  257. static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
  258. {
  259. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  260. unsigned mask = 1 << offset;
  261. mutex_lock(&mcp->lock);
  262. __mcp23s08_set(mcp, mask, value);
  263. mutex_unlock(&mcp->lock);
  264. }
  265. static int
  266. mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
  267. {
  268. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  269. unsigned mask = 1 << offset;
  270. int status;
  271. mutex_lock(&mcp->lock);
  272. status = __mcp23s08_set(mcp, mask, value);
  273. if (status == 0) {
  274. mcp->cache[MCP_IODIR] &= ~mask;
  275. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  276. }
  277. mutex_unlock(&mcp->lock);
  278. return status;
  279. }
  280. /*----------------------------------------------------------------------*/
  281. static irqreturn_t mcp23s08_irq(int irq, void *data)
  282. {
  283. struct mcp23s08 *mcp = data;
  284. int intcap, intf, i;
  285. unsigned int child_irq;
  286. mutex_lock(&mcp->lock);
  287. intf = mcp->ops->read(mcp, MCP_INTF);
  288. if (intf < 0) {
  289. mutex_unlock(&mcp->lock);
  290. return IRQ_HANDLED;
  291. }
  292. mcp->cache[MCP_INTF] = intf;
  293. intcap = mcp->ops->read(mcp, MCP_INTCAP);
  294. if (intcap < 0) {
  295. mutex_unlock(&mcp->lock);
  296. return IRQ_HANDLED;
  297. }
  298. mcp->cache[MCP_INTCAP] = intcap;
  299. mutex_unlock(&mcp->lock);
  300. for (i = 0; i < mcp->chip.ngpio; i++) {
  301. if ((BIT(i) & mcp->cache[MCP_INTF]) &&
  302. ((BIT(i) & intcap & mcp->irq_rise) ||
  303. (mcp->irq_fall & ~intcap & BIT(i)) ||
  304. (BIT(i) & mcp->cache[MCP_INTCON]))) {
  305. child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
  306. handle_nested_irq(child_irq);
  307. }
  308. }
  309. return IRQ_HANDLED;
  310. }
  311. static void mcp23s08_irq_mask(struct irq_data *data)
  312. {
  313. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  314. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  315. unsigned int pos = data->hwirq;
  316. mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
  317. }
  318. static void mcp23s08_irq_unmask(struct irq_data *data)
  319. {
  320. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  321. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  322. unsigned int pos = data->hwirq;
  323. mcp->cache[MCP_GPINTEN] |= BIT(pos);
  324. }
  325. static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
  326. {
  327. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  328. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  329. unsigned int pos = data->hwirq;
  330. int status = 0;
  331. if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
  332. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  333. mcp->irq_rise |= BIT(pos);
  334. mcp->irq_fall |= BIT(pos);
  335. } else if (type & IRQ_TYPE_EDGE_RISING) {
  336. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  337. mcp->irq_rise |= BIT(pos);
  338. mcp->irq_fall &= ~BIT(pos);
  339. } else if (type & IRQ_TYPE_EDGE_FALLING) {
  340. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  341. mcp->irq_rise &= ~BIT(pos);
  342. mcp->irq_fall |= BIT(pos);
  343. } else if (type & IRQ_TYPE_LEVEL_HIGH) {
  344. mcp->cache[MCP_INTCON] |= BIT(pos);
  345. mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
  346. } else if (type & IRQ_TYPE_LEVEL_LOW) {
  347. mcp->cache[MCP_INTCON] |= BIT(pos);
  348. mcp->cache[MCP_DEFVAL] |= BIT(pos);
  349. } else
  350. return -EINVAL;
  351. return status;
  352. }
  353. static void mcp23s08_irq_bus_lock(struct irq_data *data)
  354. {
  355. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  356. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  357. mutex_lock(&mcp->irq_lock);
  358. }
  359. static void mcp23s08_irq_bus_unlock(struct irq_data *data)
  360. {
  361. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  362. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  363. mutex_lock(&mcp->lock);
  364. mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
  365. mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
  366. mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
  367. mutex_unlock(&mcp->lock);
  368. mutex_unlock(&mcp->irq_lock);
  369. }
  370. static struct irq_chip mcp23s08_irq_chip = {
  371. .name = "gpio-mcp23xxx",
  372. .irq_mask = mcp23s08_irq_mask,
  373. .irq_unmask = mcp23s08_irq_unmask,
  374. .irq_set_type = mcp23s08_irq_set_type,
  375. .irq_bus_lock = mcp23s08_irq_bus_lock,
  376. .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
  377. };
  378. static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
  379. {
  380. struct gpio_chip *chip = &mcp->chip;
  381. int err;
  382. unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
  383. mutex_init(&mcp->irq_lock);
  384. if (mcp->irq_active_high)
  385. irqflags |= IRQF_TRIGGER_HIGH;
  386. else
  387. irqflags |= IRQF_TRIGGER_LOW;
  388. err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
  389. mcp23s08_irq,
  390. irqflags, dev_name(chip->parent), mcp);
  391. if (err != 0) {
  392. dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
  393. mcp->irq, err);
  394. return err;
  395. }
  396. err = gpiochip_irqchip_add(chip,
  397. &mcp23s08_irq_chip,
  398. 0,
  399. handle_simple_irq,
  400. IRQ_TYPE_NONE);
  401. if (err) {
  402. dev_err(chip->parent,
  403. "could not connect irqchip to gpiochip: %d\n", err);
  404. return err;
  405. }
  406. gpiochip_set_chained_irqchip(chip,
  407. &mcp23s08_irq_chip,
  408. mcp->irq,
  409. NULL);
  410. return 0;
  411. }
  412. /*----------------------------------------------------------------------*/
  413. #ifdef CONFIG_DEBUG_FS
  414. #include <linux/seq_file.h>
  415. /*
  416. * This shows more info than the generic gpio dump code:
  417. * pullups, deglitching, open drain drive.
  418. */
  419. static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  420. {
  421. struct mcp23s08 *mcp;
  422. char bank;
  423. int t;
  424. unsigned mask;
  425. mcp = gpiochip_get_data(chip);
  426. /* NOTE: we only handle one bank for now ... */
  427. bank = '0' + ((mcp->addr >> 1) & 0x7);
  428. mutex_lock(&mcp->lock);
  429. t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  430. if (t < 0) {
  431. seq_printf(s, " I/O ERROR %d\n", t);
  432. goto done;
  433. }
  434. for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
  435. const char *label;
  436. label = gpiochip_is_requested(chip, t);
  437. if (!label)
  438. continue;
  439. seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
  440. chip->base + t, bank, t, label,
  441. (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
  442. (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
  443. (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
  444. /* NOTE: ignoring the irq-related registers */
  445. seq_puts(s, "\n");
  446. }
  447. done:
  448. mutex_unlock(&mcp->lock);
  449. }
  450. #else
  451. #define mcp23s08_dbg_show NULL
  452. #endif
  453. /*----------------------------------------------------------------------*/
  454. static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
  455. void *data, unsigned addr, unsigned type,
  456. struct mcp23s08_platform_data *pdata, int cs)
  457. {
  458. int status;
  459. bool mirror = false;
  460. mutex_init(&mcp->lock);
  461. mcp->data = data;
  462. mcp->addr = addr;
  463. mcp->irq_active_high = false;
  464. mcp->chip.direction_input = mcp23s08_direction_input;
  465. mcp->chip.get = mcp23s08_get;
  466. mcp->chip.direction_output = mcp23s08_direction_output;
  467. mcp->chip.set = mcp23s08_set;
  468. mcp->chip.dbg_show = mcp23s08_dbg_show;
  469. #ifdef CONFIG_OF_GPIO
  470. mcp->chip.of_gpio_n_cells = 2;
  471. mcp->chip.of_node = dev->of_node;
  472. #endif
  473. switch (type) {
  474. #ifdef CONFIG_SPI_MASTER
  475. case MCP_TYPE_S08:
  476. mcp->ops = &mcp23s08_ops;
  477. mcp->chip.ngpio = 8;
  478. mcp->chip.label = "mcp23s08";
  479. break;
  480. case MCP_TYPE_S17:
  481. mcp->ops = &mcp23s17_ops;
  482. mcp->chip.ngpio = 16;
  483. mcp->chip.label = "mcp23s17";
  484. break;
  485. case MCP_TYPE_S18:
  486. mcp->ops = &mcp23s17_ops;
  487. mcp->chip.ngpio = 16;
  488. mcp->chip.label = "mcp23s18";
  489. break;
  490. #endif /* CONFIG_SPI_MASTER */
  491. #if IS_ENABLED(CONFIG_I2C)
  492. case MCP_TYPE_008:
  493. mcp->ops = &mcp23008_ops;
  494. mcp->chip.ngpio = 8;
  495. mcp->chip.label = "mcp23008";
  496. break;
  497. case MCP_TYPE_017:
  498. mcp->ops = &mcp23017_ops;
  499. mcp->chip.ngpio = 16;
  500. mcp->chip.label = "mcp23017";
  501. break;
  502. #endif /* CONFIG_I2C */
  503. default:
  504. dev_err(dev, "invalid device type (%d)\n", type);
  505. return -EINVAL;
  506. }
  507. mcp->chip.base = pdata->base;
  508. mcp->chip.can_sleep = true;
  509. mcp->chip.parent = dev;
  510. mcp->chip.owner = THIS_MODULE;
  511. /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
  512. * and MCP_IOCON.HAEN = 1, so we work with all chips.
  513. */
  514. status = mcp->ops->read(mcp, MCP_IOCON);
  515. if (status < 0)
  516. goto fail;
  517. mcp->irq_controller = pdata->irq_controller;
  518. if (mcp->irq && mcp->irq_controller) {
  519. mcp->irq_active_high =
  520. of_property_read_bool(mcp->chip.parent->of_node,
  521. "microchip,irq-active-high");
  522. mirror = pdata->mirror;
  523. }
  524. if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
  525. mcp->irq_active_high) {
  526. /* mcp23s17 has IOCON twice, make sure they are in sync */
  527. status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
  528. status |= IOCON_HAEN | (IOCON_HAEN << 8);
  529. if (mcp->irq_active_high)
  530. status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
  531. else
  532. status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
  533. if (mirror)
  534. status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
  535. if (type == MCP_TYPE_S18)
  536. status |= IOCON_INTCC | (IOCON_INTCC << 8);
  537. status = mcp->ops->write(mcp, MCP_IOCON, status);
  538. if (status < 0)
  539. goto fail;
  540. }
  541. /* configure ~100K pullups */
  542. status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
  543. if (status < 0)
  544. goto fail;
  545. status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  546. if (status < 0)
  547. goto fail;
  548. /* disable inverter on input */
  549. if (mcp->cache[MCP_IPOL] != 0) {
  550. mcp->cache[MCP_IPOL] = 0;
  551. status = mcp->ops->write(mcp, MCP_IPOL, 0);
  552. if (status < 0)
  553. goto fail;
  554. }
  555. /* disable irqs */
  556. if (mcp->cache[MCP_GPINTEN] != 0) {
  557. mcp->cache[MCP_GPINTEN] = 0;
  558. status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
  559. if (status < 0)
  560. goto fail;
  561. }
  562. status = gpiochip_add_data(&mcp->chip, mcp);
  563. if (status < 0)
  564. goto fail;
  565. if (mcp->irq && mcp->irq_controller) {
  566. status = mcp23s08_irq_setup(mcp);
  567. if (status) {
  568. goto fail;
  569. }
  570. }
  571. fail:
  572. if (status < 0)
  573. dev_dbg(dev, "can't setup chip %d, --> %d\n",
  574. addr, status);
  575. return status;
  576. }
  577. /*----------------------------------------------------------------------*/
  578. #ifdef CONFIG_OF
  579. #ifdef CONFIG_SPI_MASTER
  580. static const struct of_device_id mcp23s08_spi_of_match[] = {
  581. {
  582. .compatible = "microchip,mcp23s08",
  583. .data = (void *) MCP_TYPE_S08,
  584. },
  585. {
  586. .compatible = "microchip,mcp23s17",
  587. .data = (void *) MCP_TYPE_S17,
  588. },
  589. {
  590. .compatible = "microchip,mcp23s18",
  591. .data = (void *) MCP_TYPE_S18,
  592. },
  593. /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
  594. {
  595. .compatible = "mcp,mcp23s08",
  596. .data = (void *) MCP_TYPE_S08,
  597. },
  598. {
  599. .compatible = "mcp,mcp23s17",
  600. .data = (void *) MCP_TYPE_S17,
  601. },
  602. { },
  603. };
  604. MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
  605. #endif
  606. #if IS_ENABLED(CONFIG_I2C)
  607. static const struct of_device_id mcp23s08_i2c_of_match[] = {
  608. {
  609. .compatible = "microchip,mcp23008",
  610. .data = (void *) MCP_TYPE_008,
  611. },
  612. {
  613. .compatible = "microchip,mcp23017",
  614. .data = (void *) MCP_TYPE_017,
  615. },
  616. /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
  617. {
  618. .compatible = "mcp,mcp23008",
  619. .data = (void *) MCP_TYPE_008,
  620. },
  621. {
  622. .compatible = "mcp,mcp23017",
  623. .data = (void *) MCP_TYPE_017,
  624. },
  625. { },
  626. };
  627. MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
  628. #endif
  629. #endif /* CONFIG_OF */
  630. #if IS_ENABLED(CONFIG_I2C)
  631. static int mcp230xx_probe(struct i2c_client *client,
  632. const struct i2c_device_id *id)
  633. {
  634. struct mcp23s08_platform_data *pdata, local_pdata;
  635. struct mcp23s08 *mcp;
  636. int status;
  637. const struct of_device_id *match;
  638. match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
  639. &client->dev);
  640. if (match) {
  641. pdata = &local_pdata;
  642. pdata->base = -1;
  643. pdata->chip[0].pullups = 0;
  644. pdata->irq_controller = of_property_read_bool(
  645. client->dev.of_node,
  646. "interrupt-controller");
  647. pdata->mirror = of_property_read_bool(client->dev.of_node,
  648. "microchip,irq-mirror");
  649. client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
  650. } else {
  651. pdata = dev_get_platdata(&client->dev);
  652. if (!pdata) {
  653. pdata = devm_kzalloc(&client->dev,
  654. sizeof(struct mcp23s08_platform_data),
  655. GFP_KERNEL);
  656. if (!pdata)
  657. return -ENOMEM;
  658. pdata->base = -1;
  659. }
  660. }
  661. mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
  662. if (!mcp)
  663. return -ENOMEM;
  664. mcp->irq = client->irq;
  665. status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
  666. id->driver_data, pdata, 0);
  667. if (status)
  668. goto fail;
  669. i2c_set_clientdata(client, mcp);
  670. return 0;
  671. fail:
  672. kfree(mcp);
  673. return status;
  674. }
  675. static int mcp230xx_remove(struct i2c_client *client)
  676. {
  677. struct mcp23s08 *mcp = i2c_get_clientdata(client);
  678. gpiochip_remove(&mcp->chip);
  679. kfree(mcp);
  680. return 0;
  681. }
  682. static const struct i2c_device_id mcp230xx_id[] = {
  683. { "mcp23008", MCP_TYPE_008 },
  684. { "mcp23017", MCP_TYPE_017 },
  685. { },
  686. };
  687. MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
  688. static struct i2c_driver mcp230xx_driver = {
  689. .driver = {
  690. .name = "mcp230xx",
  691. .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
  692. },
  693. .probe = mcp230xx_probe,
  694. .remove = mcp230xx_remove,
  695. .id_table = mcp230xx_id,
  696. };
  697. static int __init mcp23s08_i2c_init(void)
  698. {
  699. return i2c_add_driver(&mcp230xx_driver);
  700. }
  701. static void mcp23s08_i2c_exit(void)
  702. {
  703. i2c_del_driver(&mcp230xx_driver);
  704. }
  705. #else
  706. static int __init mcp23s08_i2c_init(void) { return 0; }
  707. static void mcp23s08_i2c_exit(void) { }
  708. #endif /* CONFIG_I2C */
  709. /*----------------------------------------------------------------------*/
  710. #ifdef CONFIG_SPI_MASTER
  711. static int mcp23s08_probe(struct spi_device *spi)
  712. {
  713. struct mcp23s08_platform_data *pdata, local_pdata;
  714. unsigned addr;
  715. int chips = 0;
  716. struct mcp23s08_driver_data *data;
  717. int status, type;
  718. unsigned ngpio = 0;
  719. const struct of_device_id *match;
  720. u32 spi_present_mask = 0;
  721. match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
  722. if (match) {
  723. type = (int)(uintptr_t)match->data;
  724. status = of_property_read_u32(spi->dev.of_node,
  725. "microchip,spi-present-mask", &spi_present_mask);
  726. if (status) {
  727. status = of_property_read_u32(spi->dev.of_node,
  728. "mcp,spi-present-mask", &spi_present_mask);
  729. if (status) {
  730. dev_err(&spi->dev,
  731. "DT has no spi-present-mask\n");
  732. return -ENODEV;
  733. }
  734. }
  735. if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
  736. dev_err(&spi->dev, "invalid spi-present-mask\n");
  737. return -ENODEV;
  738. }
  739. pdata = &local_pdata;
  740. pdata->base = -1;
  741. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  742. pdata->chip[addr].pullups = 0;
  743. if (spi_present_mask & (1 << addr))
  744. chips++;
  745. }
  746. pdata->irq_controller = of_property_read_bool(
  747. spi->dev.of_node,
  748. "interrupt-controller");
  749. pdata->mirror = of_property_read_bool(spi->dev.of_node,
  750. "microchip,irq-mirror");
  751. } else {
  752. type = spi_get_device_id(spi)->driver_data;
  753. pdata = dev_get_platdata(&spi->dev);
  754. if (!pdata) {
  755. pdata = devm_kzalloc(&spi->dev,
  756. sizeof(struct mcp23s08_platform_data),
  757. GFP_KERNEL);
  758. pdata->base = -1;
  759. }
  760. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  761. if (!pdata->chip[addr].is_present)
  762. continue;
  763. chips++;
  764. if ((type == MCP_TYPE_S08) && (addr > 3)) {
  765. dev_err(&spi->dev,
  766. "mcp23s08 only supports address 0..3\n");
  767. return -EINVAL;
  768. }
  769. spi_present_mask |= 1 << addr;
  770. }
  771. }
  772. if (!chips)
  773. return -ENODEV;
  774. data = devm_kzalloc(&spi->dev,
  775. sizeof(*data) + chips * sizeof(struct mcp23s08),
  776. GFP_KERNEL);
  777. if (!data)
  778. return -ENOMEM;
  779. spi_set_drvdata(spi, data);
  780. spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
  781. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  782. if (!(spi_present_mask & (1 << addr)))
  783. continue;
  784. chips--;
  785. data->mcp[addr] = &data->chip[chips];
  786. data->mcp[addr]->irq = spi->irq;
  787. status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
  788. 0x40 | (addr << 1), type, pdata,
  789. addr);
  790. if (status < 0)
  791. goto fail;
  792. if (pdata->base != -1)
  793. pdata->base += data->mcp[addr]->chip.ngpio;
  794. ngpio += data->mcp[addr]->chip.ngpio;
  795. }
  796. data->ngpio = ngpio;
  797. /* NOTE: these chips have a relatively sane IRQ framework, with
  798. * per-signal masking and level/edge triggering. It's not yet
  799. * handled here...
  800. */
  801. return 0;
  802. fail:
  803. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  804. if (!data->mcp[addr])
  805. continue;
  806. gpiochip_remove(&data->mcp[addr]->chip);
  807. }
  808. return status;
  809. }
  810. static int mcp23s08_remove(struct spi_device *spi)
  811. {
  812. struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
  813. unsigned addr;
  814. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  815. if (!data->mcp[addr])
  816. continue;
  817. gpiochip_remove(&data->mcp[addr]->chip);
  818. }
  819. return 0;
  820. }
  821. static const struct spi_device_id mcp23s08_ids[] = {
  822. { "mcp23s08", MCP_TYPE_S08 },
  823. { "mcp23s17", MCP_TYPE_S17 },
  824. { "mcp23s18", MCP_TYPE_S18 },
  825. { },
  826. };
  827. MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
  828. static struct spi_driver mcp23s08_driver = {
  829. .probe = mcp23s08_probe,
  830. .remove = mcp23s08_remove,
  831. .id_table = mcp23s08_ids,
  832. .driver = {
  833. .name = "mcp23s08",
  834. .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
  835. },
  836. };
  837. static int __init mcp23s08_spi_init(void)
  838. {
  839. return spi_register_driver(&mcp23s08_driver);
  840. }
  841. static void mcp23s08_spi_exit(void)
  842. {
  843. spi_unregister_driver(&mcp23s08_driver);
  844. }
  845. #else
  846. static int __init mcp23s08_spi_init(void) { return 0; }
  847. static void mcp23s08_spi_exit(void) { }
  848. #endif /* CONFIG_SPI_MASTER */
  849. /*----------------------------------------------------------------------*/
  850. static int __init mcp23s08_init(void)
  851. {
  852. int ret;
  853. ret = mcp23s08_spi_init();
  854. if (ret)
  855. goto spi_fail;
  856. ret = mcp23s08_i2c_init();
  857. if (ret)
  858. goto i2c_fail;
  859. return 0;
  860. i2c_fail:
  861. mcp23s08_spi_exit();
  862. spi_fail:
  863. return ret;
  864. }
  865. /* register after spi/i2c postcore initcall and before
  866. * subsys initcalls that may rely on these GPIOs
  867. */
  868. subsys_initcall(mcp23s08_init);
  869. static void __exit mcp23s08_exit(void)
  870. {
  871. mcp23s08_spi_exit();
  872. mcp23s08_i2c_exit();
  873. }
  874. module_exit(mcp23s08_exit);
  875. MODULE_LICENSE("GPL");