amd64_edac_dbg.c 1.5 KB

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  1. #include "amd64_edac.h"
  2. #define EDAC_DCT_ATTR_SHOW(reg) \
  3. static ssize_t amd64_##reg##_show(struct device *dev, \
  4. struct device_attribute *mattr, \
  5. char *data) \
  6. { \
  7. struct mem_ctl_info *mci = to_mci(dev); \
  8. struct amd64_pvt *pvt = mci->pvt_info; \
  9. return sprintf(data, "0x%016llx\n", (u64)pvt->reg); \
  10. }
  11. EDAC_DCT_ATTR_SHOW(dhar);
  12. EDAC_DCT_ATTR_SHOW(dbam0);
  13. EDAC_DCT_ATTR_SHOW(top_mem);
  14. EDAC_DCT_ATTR_SHOW(top_mem2);
  15. static ssize_t amd64_hole_show(struct device *dev,
  16. struct device_attribute *mattr,
  17. char *data)
  18. {
  19. struct mem_ctl_info *mci = to_mci(dev);
  20. u64 hole_base = 0;
  21. u64 hole_offset = 0;
  22. u64 hole_size = 0;
  23. amd64_get_dram_hole_info(mci, &hole_base, &hole_offset, &hole_size);
  24. return sprintf(data, "%llx %llx %llx\n", hole_base, hole_offset,
  25. hole_size);
  26. }
  27. /*
  28. * update NUM_DBG_ATTRS in case you add new members
  29. */
  30. static DEVICE_ATTR(dhar, S_IRUGO, amd64_dhar_show, NULL);
  31. static DEVICE_ATTR(dbam, S_IRUGO, amd64_dbam0_show, NULL);
  32. static DEVICE_ATTR(topmem, S_IRUGO, amd64_top_mem_show, NULL);
  33. static DEVICE_ATTR(topmem2, S_IRUGO, amd64_top_mem2_show, NULL);
  34. static DEVICE_ATTR(dram_hole, S_IRUGO, amd64_hole_show, NULL);
  35. static struct attribute *amd64_edac_dbg_attrs[] = {
  36. &dev_attr_dhar.attr,
  37. &dev_attr_dbam.attr,
  38. &dev_attr_topmem.attr,
  39. &dev_attr_topmem2.attr,
  40. &dev_attr_dram_hole.attr,
  41. NULL
  42. };
  43. const struct attribute_group amd64_edac_dbg_group = {
  44. .attrs = amd64_edac_dbg_attrs,
  45. };