Kconfig 16 KB

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  1. menuconfig CRYPTO_HW
  2. bool "Hardware crypto devices"
  3. default y
  4. ---help---
  5. Say Y here to get to see options for hardware crypto devices and
  6. processors. This option alone does not add any kernel code.
  7. If you say N, all options in this submenu will be skipped and disabled.
  8. if CRYPTO_HW
  9. config CRYPTO_DEV_PADLOCK
  10. tristate "Support for VIA PadLock ACE"
  11. depends on X86 && !UML
  12. help
  13. Some VIA processors come with an integrated crypto engine
  14. (so called VIA PadLock ACE, Advanced Cryptography Engine)
  15. that provides instructions for very fast cryptographic
  16. operations with supported algorithms.
  17. The instructions are used only when the CPU supports them.
  18. Otherwise software encryption is used.
  19. config CRYPTO_DEV_PADLOCK_AES
  20. tristate "PadLock driver for AES algorithm"
  21. depends on CRYPTO_DEV_PADLOCK
  22. select CRYPTO_BLKCIPHER
  23. select CRYPTO_AES
  24. help
  25. Use VIA PadLock for AES algorithm.
  26. Available in VIA C3 and newer CPUs.
  27. If unsure say M. The compiled module will be
  28. called padlock-aes.
  29. config CRYPTO_DEV_PADLOCK_SHA
  30. tristate "PadLock driver for SHA1 and SHA256 algorithms"
  31. depends on CRYPTO_DEV_PADLOCK
  32. select CRYPTO_HASH
  33. select CRYPTO_SHA1
  34. select CRYPTO_SHA256
  35. help
  36. Use VIA PadLock for SHA1/SHA256 algorithms.
  37. Available in VIA C7 and newer processors.
  38. If unsure say M. The compiled module will be
  39. called padlock-sha.
  40. config CRYPTO_DEV_GEODE
  41. tristate "Support for the Geode LX AES engine"
  42. depends on X86_32 && PCI
  43. select CRYPTO_ALGAPI
  44. select CRYPTO_BLKCIPHER
  45. help
  46. Say 'Y' here to use the AMD Geode LX processor on-board AES
  47. engine for the CryptoAPI AES algorithm.
  48. To compile this driver as a module, choose M here: the module
  49. will be called geode-aes.
  50. config ZCRYPT
  51. tristate "Support for PCI-attached cryptographic adapters"
  52. depends on S390
  53. select HW_RANDOM
  54. help
  55. Select this option if you want to use a PCI-attached cryptographic
  56. adapter like:
  57. + PCI Cryptographic Accelerator (PCICA)
  58. + PCI Cryptographic Coprocessor (PCICC)
  59. + PCI-X Cryptographic Coprocessor (PCIXCC)
  60. + Crypto Express2 Coprocessor (CEX2C)
  61. + Crypto Express2 Accelerator (CEX2A)
  62. + Crypto Express3 Coprocessor (CEX3C)
  63. + Crypto Express3 Accelerator (CEX3A)
  64. config CRYPTO_SHA1_S390
  65. tristate "SHA1 digest algorithm"
  66. depends on S390
  67. select CRYPTO_HASH
  68. help
  69. This is the s390 hardware accelerated implementation of the
  70. SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
  71. It is available as of z990.
  72. config CRYPTO_SHA256_S390
  73. tristate "SHA256 digest algorithm"
  74. depends on S390
  75. select CRYPTO_HASH
  76. help
  77. This is the s390 hardware accelerated implementation of the
  78. SHA256 secure hash standard (DFIPS 180-2).
  79. It is available as of z9.
  80. config CRYPTO_SHA512_S390
  81. tristate "SHA384 and SHA512 digest algorithm"
  82. depends on S390
  83. select CRYPTO_HASH
  84. help
  85. This is the s390 hardware accelerated implementation of the
  86. SHA512 secure hash standard.
  87. It is available as of z10.
  88. config CRYPTO_DES_S390
  89. tristate "DES and Triple DES cipher algorithms"
  90. depends on S390
  91. select CRYPTO_ALGAPI
  92. select CRYPTO_BLKCIPHER
  93. select CRYPTO_DES
  94. help
  95. This is the s390 hardware accelerated implementation of the
  96. DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
  97. As of z990 the ECB and CBC mode are hardware accelerated.
  98. As of z196 the CTR mode is hardware accelerated.
  99. config CRYPTO_AES_S390
  100. tristate "AES cipher algorithms"
  101. depends on S390
  102. select CRYPTO_ALGAPI
  103. select CRYPTO_BLKCIPHER
  104. help
  105. This is the s390 hardware accelerated implementation of the
  106. AES cipher algorithms (FIPS-197).
  107. As of z9 the ECB and CBC modes are hardware accelerated
  108. for 128 bit keys.
  109. As of z10 the ECB and CBC modes are hardware accelerated
  110. for all AES key sizes.
  111. As of z196 the CTR mode is hardware accelerated for all AES
  112. key sizes and XTS mode is hardware accelerated for 256 and
  113. 512 bit keys.
  114. config S390_PRNG
  115. tristate "Pseudo random number generator device driver"
  116. depends on S390
  117. default "m"
  118. help
  119. Select this option if you want to use the s390 pseudo random number
  120. generator. The PRNG is part of the cryptographic processor functions
  121. and uses triple-DES to generate secure random numbers like the
  122. ANSI X9.17 standard. User-space programs access the
  123. pseudo-random-number device through the char device /dev/prandom.
  124. It is available as of z9.
  125. config CRYPTO_GHASH_S390
  126. tristate "GHASH digest algorithm"
  127. depends on S390
  128. select CRYPTO_HASH
  129. help
  130. This is the s390 hardware accelerated implementation of the
  131. GHASH message digest algorithm for GCM (Galois/Counter Mode).
  132. It is available as of z196.
  133. config CRYPTO_CRC32_S390
  134. tristate "CRC-32 algorithms"
  135. depends on S390
  136. select CRYPTO_HASH
  137. select CRC32
  138. help
  139. Select this option if you want to use hardware accelerated
  140. implementations of CRC algorithms. With this option, you
  141. can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
  142. and CRC-32C (Castagnoli).
  143. It is available with IBM z13 or later.
  144. config CRYPTO_DEV_MV_CESA
  145. tristate "Marvell's Cryptographic Engine"
  146. depends on PLAT_ORION
  147. select CRYPTO_AES
  148. select CRYPTO_BLKCIPHER
  149. select CRYPTO_HASH
  150. select SRAM
  151. help
  152. This driver allows you to utilize the Cryptographic Engines and
  153. Security Accelerator (CESA) which can be found on the Marvell Orion
  154. and Kirkwood SoCs, such as QNAP's TS-209.
  155. Currently the driver supports AES in ECB and CBC mode without DMA.
  156. config CRYPTO_DEV_MARVELL_CESA
  157. tristate "New Marvell's Cryptographic Engine driver"
  158. depends on PLAT_ORION || ARCH_MVEBU
  159. select CRYPTO_AES
  160. select CRYPTO_DES
  161. select CRYPTO_BLKCIPHER
  162. select CRYPTO_HASH
  163. select SRAM
  164. help
  165. This driver allows you to utilize the Cryptographic Engines and
  166. Security Accelerator (CESA) which can be found on the Armada 370.
  167. This driver supports CPU offload through DMA transfers.
  168. This driver is aimed at replacing the mv_cesa driver. This will only
  169. happen once it has received proper testing.
  170. config CRYPTO_DEV_NIAGARA2
  171. tristate "Niagara2 Stream Processing Unit driver"
  172. select CRYPTO_DES
  173. select CRYPTO_BLKCIPHER
  174. select CRYPTO_HASH
  175. select CRYPTO_MD5
  176. select CRYPTO_SHA1
  177. select CRYPTO_SHA256
  178. depends on SPARC64
  179. help
  180. Each core of a Niagara2 processor contains a Stream
  181. Processing Unit, which itself contains several cryptographic
  182. sub-units. One set provides the Modular Arithmetic Unit,
  183. used for SSL offload. The other set provides the Cipher
  184. Group, which can perform encryption, decryption, hashing,
  185. checksumming, and raw copies.
  186. config CRYPTO_DEV_HIFN_795X
  187. tristate "Driver HIFN 795x crypto accelerator chips"
  188. select CRYPTO_DES
  189. select CRYPTO_BLKCIPHER
  190. select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
  191. depends on PCI
  192. depends on !ARCH_DMA_ADDR_T_64BIT
  193. help
  194. This option allows you to have support for HIFN 795x crypto adapters.
  195. config CRYPTO_DEV_HIFN_795X_RNG
  196. bool "HIFN 795x random number generator"
  197. depends on CRYPTO_DEV_HIFN_795X
  198. help
  199. Select this option if you want to enable the random number generator
  200. on the HIFN 795x crypto adapters.
  201. source drivers/crypto/caam/Kconfig
  202. config CRYPTO_DEV_TALITOS
  203. tristate "Talitos Freescale Security Engine (SEC)"
  204. select CRYPTO_AEAD
  205. select CRYPTO_AUTHENC
  206. select CRYPTO_BLKCIPHER
  207. select CRYPTO_HASH
  208. select HW_RANDOM
  209. depends on FSL_SOC
  210. help
  211. Say 'Y' here to use the Freescale Security Engine (SEC)
  212. to offload cryptographic algorithm computation.
  213. The Freescale SEC is present on PowerQUICC 'E' processors, such
  214. as the MPC8349E and MPC8548E.
  215. To compile this driver as a module, choose M here: the module
  216. will be called talitos.
  217. config CRYPTO_DEV_TALITOS1
  218. bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
  219. depends on CRYPTO_DEV_TALITOS
  220. depends on PPC_8xx || PPC_82xx
  221. default y
  222. help
  223. Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
  224. found on MPC82xx or the Freescale Security Engine (SEC Lite)
  225. version 1.2 found on MPC8xx
  226. config CRYPTO_DEV_TALITOS2
  227. bool "SEC2+ (SEC version 2.0 or upper)"
  228. depends on CRYPTO_DEV_TALITOS
  229. default y if !PPC_8xx
  230. help
  231. Say 'Y' here to use the Freescale Security Engine (SEC)
  232. version 2 and following as found on MPC83xx, MPC85xx, etc ...
  233. config CRYPTO_DEV_IXP4XX
  234. tristate "Driver for IXP4xx crypto hardware acceleration"
  235. depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
  236. select CRYPTO_DES
  237. select CRYPTO_AEAD
  238. select CRYPTO_AUTHENC
  239. select CRYPTO_BLKCIPHER
  240. help
  241. Driver for the IXP4xx NPE crypto engine.
  242. config CRYPTO_DEV_PPC4XX
  243. tristate "Driver AMCC PPC4xx crypto accelerator"
  244. depends on PPC && 4xx
  245. select CRYPTO_HASH
  246. select CRYPTO_BLKCIPHER
  247. help
  248. This option allows you to have support for AMCC crypto acceleration.
  249. config HW_RANDOM_PPC4XX
  250. bool "PowerPC 4xx generic true random number generator support"
  251. depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
  252. default y
  253. ---help---
  254. This option provides the kernel-side support for the TRNG hardware
  255. found in the security function of some PowerPC 4xx SoCs.
  256. config CRYPTO_DEV_OMAP_SHAM
  257. tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
  258. depends on ARCH_OMAP2PLUS
  259. select CRYPTO_SHA1
  260. select CRYPTO_MD5
  261. select CRYPTO_SHA256
  262. select CRYPTO_SHA512
  263. select CRYPTO_HMAC
  264. help
  265. OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
  266. want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
  267. config CRYPTO_DEV_OMAP_AES
  268. tristate "Support for OMAP AES hw engine"
  269. depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
  270. select CRYPTO_AES
  271. select CRYPTO_BLKCIPHER
  272. select CRYPTO_ENGINE
  273. select CRYPTO_CBC
  274. select CRYPTO_ECB
  275. select CRYPTO_CTR
  276. help
  277. OMAP processors have AES module accelerator. Select this if you
  278. want to use the OMAP module for AES algorithms.
  279. config CRYPTO_DEV_OMAP_DES
  280. tristate "Support for OMAP DES/3DES hw engine"
  281. depends on ARCH_OMAP2PLUS
  282. select CRYPTO_DES
  283. select CRYPTO_BLKCIPHER
  284. select CRYPTO_ENGINE
  285. help
  286. OMAP processors have DES/3DES module accelerator. Select this if you
  287. want to use the OMAP module for DES and 3DES algorithms. Currently
  288. the ECB and CBC modes of operation are supported by the driver. Also
  289. accesses made on unaligned boundaries are supported.
  290. config CRYPTO_DEV_PICOXCELL
  291. tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
  292. depends on ARCH_PICOXCELL && HAVE_CLK
  293. select CRYPTO_AEAD
  294. select CRYPTO_AES
  295. select CRYPTO_AUTHENC
  296. select CRYPTO_BLKCIPHER
  297. select CRYPTO_DES
  298. select CRYPTO_CBC
  299. select CRYPTO_ECB
  300. select CRYPTO_SEQIV
  301. help
  302. This option enables support for the hardware offload engines in the
  303. Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
  304. and for 3gpp Layer 2 ciphering support.
  305. Saying m here will build a module named pipcoxcell_crypto.
  306. config CRYPTO_DEV_SAHARA
  307. tristate "Support for SAHARA crypto accelerator"
  308. depends on ARCH_MXC && OF
  309. select CRYPTO_BLKCIPHER
  310. select CRYPTO_AES
  311. select CRYPTO_ECB
  312. help
  313. This option enables support for the SAHARA HW crypto accelerator
  314. found in some Freescale i.MX chips.
  315. config CRYPTO_DEV_MXC_SCC
  316. tristate "Support for Freescale Security Controller (SCC)"
  317. depends on ARCH_MXC && OF
  318. select CRYPTO_BLKCIPHER
  319. select CRYPTO_DES
  320. help
  321. This option enables support for the Security Controller (SCC)
  322. found in Freescale i.MX25 chips.
  323. config CRYPTO_DEV_S5P
  324. tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
  325. depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
  326. depends on HAS_IOMEM && HAS_DMA
  327. select CRYPTO_AES
  328. select CRYPTO_BLKCIPHER
  329. help
  330. This option allows you to have support for S5P crypto acceleration.
  331. Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
  332. algorithms execution.
  333. config CRYPTO_DEV_NX
  334. bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
  335. depends on PPC64
  336. help
  337. This enables support for the NX hardware cryptographic accelerator
  338. coprocessor that is in IBM PowerPC P7+ or later processors. This
  339. does not actually enable any drivers, it only allows you to select
  340. which acceleration type (encryption and/or compression) to enable.
  341. if CRYPTO_DEV_NX
  342. source "drivers/crypto/nx/Kconfig"
  343. endif
  344. config CRYPTO_DEV_UX500
  345. tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
  346. depends on ARCH_U8500
  347. help
  348. Driver for ST-Ericsson UX500 crypto engine.
  349. if CRYPTO_DEV_UX500
  350. source "drivers/crypto/ux500/Kconfig"
  351. endif # if CRYPTO_DEV_UX500
  352. config CRYPTO_DEV_BFIN_CRC
  353. tristate "Support for Blackfin CRC hardware"
  354. depends on BF60x
  355. help
  356. Newer Blackfin processors have CRC hardware. Select this if you
  357. want to use the Blackfin CRC module.
  358. config CRYPTO_DEV_ATMEL_AES
  359. tristate "Support for Atmel AES hw accelerator"
  360. depends on HAS_DMA
  361. depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
  362. select CRYPTO_AES
  363. select CRYPTO_AEAD
  364. select CRYPTO_BLKCIPHER
  365. help
  366. Some Atmel processors have AES hw accelerator.
  367. Select this if you want to use the Atmel module for
  368. AES algorithms.
  369. To compile this driver as a module, choose M here: the module
  370. will be called atmel-aes.
  371. config CRYPTO_DEV_ATMEL_TDES
  372. tristate "Support for Atmel DES/TDES hw accelerator"
  373. depends on ARCH_AT91
  374. select CRYPTO_DES
  375. select CRYPTO_BLKCIPHER
  376. help
  377. Some Atmel processors have DES/TDES hw accelerator.
  378. Select this if you want to use the Atmel module for
  379. DES/TDES algorithms.
  380. To compile this driver as a module, choose M here: the module
  381. will be called atmel-tdes.
  382. config CRYPTO_DEV_ATMEL_SHA
  383. tristate "Support for Atmel SHA hw accelerator"
  384. depends on ARCH_AT91
  385. select CRYPTO_HASH
  386. help
  387. Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
  388. hw accelerator.
  389. Select this if you want to use the Atmel module for
  390. SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
  391. To compile this driver as a module, choose M here: the module
  392. will be called atmel-sha.
  393. config CRYPTO_DEV_CCP
  394. bool "Support for AMD Cryptographic Coprocessor"
  395. depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
  396. help
  397. The AMD Cryptographic Coprocessor provides hardware offload support
  398. for encryption, hashing and related operations.
  399. if CRYPTO_DEV_CCP
  400. source "drivers/crypto/ccp/Kconfig"
  401. endif
  402. config CRYPTO_DEV_MXS_DCP
  403. tristate "Support for Freescale MXS DCP"
  404. depends on (ARCH_MXS || ARCH_MXC)
  405. select STMP_DEVICE
  406. select CRYPTO_CBC
  407. select CRYPTO_ECB
  408. select CRYPTO_AES
  409. select CRYPTO_BLKCIPHER
  410. select CRYPTO_HASH
  411. help
  412. The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
  413. co-processor on the die.
  414. To compile this driver as a module, choose M here: the module
  415. will be called mxs-dcp.
  416. source "drivers/crypto/qat/Kconfig"
  417. config CRYPTO_DEV_QCE
  418. tristate "Qualcomm crypto engine accelerator"
  419. depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
  420. select CRYPTO_AES
  421. select CRYPTO_DES
  422. select CRYPTO_ECB
  423. select CRYPTO_CBC
  424. select CRYPTO_XTS
  425. select CRYPTO_CTR
  426. select CRYPTO_BLKCIPHER
  427. help
  428. This driver supports Qualcomm crypto engine accelerator
  429. hardware. To compile this driver as a module, choose M here. The
  430. module will be called qcrypto.
  431. config CRYPTO_DEV_VMX
  432. bool "Support for VMX cryptographic acceleration instructions"
  433. depends on PPC64 && VSX
  434. help
  435. Support for VMX cryptographic acceleration instructions.
  436. source "drivers/crypto/vmx/Kconfig"
  437. config CRYPTO_DEV_IMGTEC_HASH
  438. tristate "Imagination Technologies hardware hash accelerator"
  439. depends on MIPS || COMPILE_TEST
  440. depends on HAS_DMA
  441. select CRYPTO_MD5
  442. select CRYPTO_SHA1
  443. select CRYPTO_SHA256
  444. select CRYPTO_HASH
  445. help
  446. This driver interfaces with the Imagination Technologies
  447. hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
  448. hashing algorithms.
  449. config CRYPTO_DEV_SUN4I_SS
  450. tristate "Support for Allwinner Security System cryptographic accelerator"
  451. depends on ARCH_SUNXI && !64BIT
  452. select CRYPTO_MD5
  453. select CRYPTO_SHA1
  454. select CRYPTO_AES
  455. select CRYPTO_DES
  456. select CRYPTO_BLKCIPHER
  457. help
  458. Some Allwinner SoC have a crypto accelerator named
  459. Security System. Select this if you want to use it.
  460. The Security System handle AES/DES/3DES ciphers in CBC mode
  461. and SHA1 and MD5 hash algorithms.
  462. To compile this driver as a module, choose M here: the module
  463. will be called sun4i-ss.
  464. config CRYPTO_DEV_ROCKCHIP
  465. tristate "Rockchip's Cryptographic Engine driver"
  466. depends on OF && ARCH_ROCKCHIP
  467. select CRYPTO_AES
  468. select CRYPTO_DES
  469. select CRYPTO_MD5
  470. select CRYPTO_SHA1
  471. select CRYPTO_SHA256
  472. select CRYPTO_HASH
  473. select CRYPTO_BLKCIPHER
  474. help
  475. This driver interfaces with the hardware crypto accelerator.
  476. Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
  477. source "drivers/crypto/chelsio/Kconfig"
  478. endif # CRYPTO_HW