htirq.c 4.7 KB

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  1. /*
  2. * Support Hypertransport IRQ
  3. *
  4. * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo
  5. * Moved from arch/x86/kernel/apic/io_apic.c.
  6. * Jiang Liu <jiang.liu@linux.intel.com>
  7. * Add support of hierarchical irqdomain
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/mm.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/pci.h>
  18. #include <linux/htirq.h>
  19. #include <asm/irqdomain.h>
  20. #include <asm/hw_irq.h>
  21. #include <asm/apic.h>
  22. #include <asm/hypertransport.h>
  23. static struct irq_domain *htirq_domain;
  24. /*
  25. * Hypertransport interrupt support
  26. */
  27. static int
  28. ht_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force)
  29. {
  30. struct irq_data *parent = data->parent_data;
  31. int ret;
  32. ret = parent->chip->irq_set_affinity(parent, mask, force);
  33. if (ret >= 0) {
  34. struct ht_irq_msg msg;
  35. struct irq_cfg *cfg = irqd_cfg(data);
  36. fetch_ht_irq_msg(data->irq, &msg);
  37. msg.address_lo &= ~(HT_IRQ_LOW_VECTOR_MASK |
  38. HT_IRQ_LOW_DEST_ID_MASK);
  39. msg.address_lo |= HT_IRQ_LOW_VECTOR(cfg->vector) |
  40. HT_IRQ_LOW_DEST_ID(cfg->dest_apicid);
  41. msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK);
  42. msg.address_hi |= HT_IRQ_HIGH_DEST_ID(cfg->dest_apicid);
  43. write_ht_irq_msg(data->irq, &msg);
  44. }
  45. return ret;
  46. }
  47. static struct irq_chip ht_irq_chip = {
  48. .name = "PCI-HT",
  49. .irq_mask = mask_ht_irq,
  50. .irq_unmask = unmask_ht_irq,
  51. .irq_ack = irq_chip_ack_parent,
  52. .irq_set_affinity = ht_set_affinity,
  53. .irq_retrigger = irq_chip_retrigger_hierarchy,
  54. .flags = IRQCHIP_SKIP_SET_WAKE,
  55. };
  56. static int htirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
  57. unsigned int nr_irqs, void *arg)
  58. {
  59. struct ht_irq_cfg *ht_cfg;
  60. struct irq_alloc_info *info = arg;
  61. struct pci_dev *dev;
  62. irq_hw_number_t hwirq;
  63. int ret;
  64. if (nr_irqs > 1 || !info)
  65. return -EINVAL;
  66. dev = info->ht_dev;
  67. hwirq = (info->ht_idx & 0xFF) |
  68. PCI_DEVID(dev->bus->number, dev->devfn) << 8 |
  69. (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 24;
  70. if (irq_find_mapping(domain, hwirq) > 0)
  71. return -EEXIST;
  72. ht_cfg = kmalloc(sizeof(*ht_cfg), GFP_KERNEL);
  73. if (!ht_cfg)
  74. return -ENOMEM;
  75. ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, info);
  76. if (ret < 0) {
  77. kfree(ht_cfg);
  78. return ret;
  79. }
  80. /* Initialize msg to a value that will never match the first write. */
  81. ht_cfg->msg.address_lo = 0xffffffff;
  82. ht_cfg->msg.address_hi = 0xffffffff;
  83. ht_cfg->dev = info->ht_dev;
  84. ht_cfg->update = info->ht_update;
  85. ht_cfg->pos = info->ht_pos;
  86. ht_cfg->idx = 0x10 + (info->ht_idx * 2);
  87. irq_domain_set_info(domain, virq, hwirq, &ht_irq_chip, ht_cfg,
  88. handle_edge_irq, ht_cfg, "edge");
  89. return 0;
  90. }
  91. static void htirq_domain_free(struct irq_domain *domain, unsigned int virq,
  92. unsigned int nr_irqs)
  93. {
  94. struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq);
  95. BUG_ON(nr_irqs != 1);
  96. kfree(irq_data->chip_data);
  97. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  98. }
  99. static void htirq_domain_activate(struct irq_domain *domain,
  100. struct irq_data *irq_data)
  101. {
  102. struct ht_irq_msg msg;
  103. struct irq_cfg *cfg = irqd_cfg(irq_data);
  104. msg.address_hi = HT_IRQ_HIGH_DEST_ID(cfg->dest_apicid);
  105. msg.address_lo =
  106. HT_IRQ_LOW_BASE |
  107. HT_IRQ_LOW_DEST_ID(cfg->dest_apicid) |
  108. HT_IRQ_LOW_VECTOR(cfg->vector) |
  109. ((apic->irq_dest_mode == 0) ?
  110. HT_IRQ_LOW_DM_PHYSICAL :
  111. HT_IRQ_LOW_DM_LOGICAL) |
  112. HT_IRQ_LOW_RQEOI_EDGE |
  113. ((apic->irq_delivery_mode != dest_LowestPrio) ?
  114. HT_IRQ_LOW_MT_FIXED :
  115. HT_IRQ_LOW_MT_ARBITRATED) |
  116. HT_IRQ_LOW_IRQ_MASKED;
  117. write_ht_irq_msg(irq_data->irq, &msg);
  118. }
  119. static void htirq_domain_deactivate(struct irq_domain *domain,
  120. struct irq_data *irq_data)
  121. {
  122. struct ht_irq_msg msg;
  123. memset(&msg, 0, sizeof(msg));
  124. write_ht_irq_msg(irq_data->irq, &msg);
  125. }
  126. static const struct irq_domain_ops htirq_domain_ops = {
  127. .alloc = htirq_domain_alloc,
  128. .free = htirq_domain_free,
  129. .activate = htirq_domain_activate,
  130. .deactivate = htirq_domain_deactivate,
  131. };
  132. void arch_init_htirq_domain(struct irq_domain *parent)
  133. {
  134. if (disable_apic)
  135. return;
  136. htirq_domain = irq_domain_add_tree(NULL, &htirq_domain_ops, NULL);
  137. if (!htirq_domain)
  138. pr_warn("failed to initialize irqdomain for HTIRQ.\n");
  139. else
  140. htirq_domain->parent = parent;
  141. }
  142. int arch_setup_ht_irq(int idx, int pos, struct pci_dev *dev,
  143. ht_irq_update_t *update)
  144. {
  145. struct irq_alloc_info info;
  146. if (!htirq_domain)
  147. return -ENOSYS;
  148. init_irq_alloc_info(&info, NULL);
  149. info.ht_idx = idx;
  150. info.ht_pos = pos;
  151. info.ht_dev = dev;
  152. info.ht_update = update;
  153. return irq_domain_alloc_irqs(htirq_domain, 1, dev_to_node(&dev->dev),
  154. &info);
  155. }
  156. void arch_teardown_ht_irq(unsigned int irq)
  157. {
  158. irq_domain_free_irqs(irq, 1);
  159. }