smp_32.c 7.5 KB

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  1. /* smp.c: Sparc SMP support.
  2. *
  3. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  4. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  5. * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
  6. */
  7. #include <asm/head.h>
  8. #include <linux/kernel.h>
  9. #include <linux/sched.h>
  10. #include <linux/threads.h>
  11. #include <linux/smp.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/init.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/mm.h>
  17. #include <linux/fs.h>
  18. #include <linux/seq_file.h>
  19. #include <linux/cache.h>
  20. #include <linux/delay.h>
  21. #include <linux/profile.h>
  22. #include <linux/cpu.h>
  23. #include <asm/ptrace.h>
  24. #include <linux/atomic.h>
  25. #include <asm/irq.h>
  26. #include <asm/page.h>
  27. #include <asm/pgalloc.h>
  28. #include <asm/pgtable.h>
  29. #include <asm/oplib.h>
  30. #include <asm/cacheflush.h>
  31. #include <asm/tlbflush.h>
  32. #include <asm/cpudata.h>
  33. #include <asm/timer.h>
  34. #include <asm/leon.h>
  35. #include "kernel.h"
  36. #include "irq.h"
  37. volatile unsigned long cpu_callin_map[NR_CPUS] = {0,};
  38. cpumask_t smp_commenced_mask = CPU_MASK_NONE;
  39. const struct sparc32_ipi_ops *sparc32_ipi_ops;
  40. /* The only guaranteed locking primitive available on all Sparc
  41. * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
  42. * places the current byte at the effective address into dest_reg and
  43. * places 0xff there afterwards. Pretty lame locking primitive
  44. * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
  45. * instruction which is much better...
  46. */
  47. void smp_store_cpu_info(int id)
  48. {
  49. int cpu_node;
  50. int mid;
  51. cpu_data(id).udelay_val = loops_per_jiffy;
  52. cpu_find_by_mid(id, &cpu_node);
  53. cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
  54. "clock-frequency", 0);
  55. cpu_data(id).prom_node = cpu_node;
  56. mid = cpu_get_hwmid(cpu_node);
  57. if (mid < 0) {
  58. printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08x", id, cpu_node);
  59. mid = 0;
  60. }
  61. cpu_data(id).mid = mid;
  62. }
  63. void __init smp_cpus_done(unsigned int max_cpus)
  64. {
  65. unsigned long bogosum = 0;
  66. int cpu, num = 0;
  67. for_each_online_cpu(cpu) {
  68. num++;
  69. bogosum += cpu_data(cpu).udelay_val;
  70. }
  71. printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
  72. num, bogosum/(500000/HZ),
  73. (bogosum/(5000/HZ))%100);
  74. switch(sparc_cpu_model) {
  75. case sun4m:
  76. smp4m_smp_done();
  77. break;
  78. case sun4d:
  79. smp4d_smp_done();
  80. break;
  81. case sparc_leon:
  82. leon_smp_done();
  83. break;
  84. case sun4e:
  85. printk("SUN4E\n");
  86. BUG();
  87. break;
  88. case sun4u:
  89. printk("SUN4U\n");
  90. BUG();
  91. break;
  92. default:
  93. printk("UNKNOWN!\n");
  94. BUG();
  95. break;
  96. }
  97. }
  98. void cpu_panic(void)
  99. {
  100. printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
  101. panic("SMP bolixed\n");
  102. }
  103. struct linux_prom_registers smp_penguin_ctable = { 0 };
  104. void smp_send_reschedule(int cpu)
  105. {
  106. /*
  107. * CPU model dependent way of implementing IPI generation targeting
  108. * a single CPU. The trap handler needs only to do trap entry/return
  109. * to call schedule.
  110. */
  111. sparc32_ipi_ops->resched(cpu);
  112. }
  113. void smp_send_stop(void)
  114. {
  115. }
  116. void arch_send_call_function_single_ipi(int cpu)
  117. {
  118. /* trigger one IPI single call on one CPU */
  119. sparc32_ipi_ops->single(cpu);
  120. }
  121. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  122. {
  123. int cpu;
  124. /* trigger IPI mask call on each CPU */
  125. for_each_cpu(cpu, mask)
  126. sparc32_ipi_ops->mask_one(cpu);
  127. }
  128. void smp_resched_interrupt(void)
  129. {
  130. irq_enter();
  131. scheduler_ipi();
  132. local_cpu_data().irq_resched_count++;
  133. irq_exit();
  134. /* re-schedule routine called by interrupt return code. */
  135. }
  136. void smp_call_function_single_interrupt(void)
  137. {
  138. irq_enter();
  139. generic_smp_call_function_single_interrupt();
  140. local_cpu_data().irq_call_count++;
  141. irq_exit();
  142. }
  143. void smp_call_function_interrupt(void)
  144. {
  145. irq_enter();
  146. generic_smp_call_function_interrupt();
  147. local_cpu_data().irq_call_count++;
  148. irq_exit();
  149. }
  150. int setup_profiling_timer(unsigned int multiplier)
  151. {
  152. return -EINVAL;
  153. }
  154. void __init smp_prepare_cpus(unsigned int max_cpus)
  155. {
  156. int i, cpuid, extra;
  157. printk("Entering SMP Mode...\n");
  158. extra = 0;
  159. for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
  160. if (cpuid >= NR_CPUS)
  161. extra++;
  162. }
  163. /* i = number of cpus */
  164. if (extra && max_cpus > i - extra)
  165. printk("Warning: NR_CPUS is too low to start all cpus\n");
  166. smp_store_cpu_info(boot_cpu_id);
  167. switch(sparc_cpu_model) {
  168. case sun4m:
  169. smp4m_boot_cpus();
  170. break;
  171. case sun4d:
  172. smp4d_boot_cpus();
  173. break;
  174. case sparc_leon:
  175. leon_boot_cpus();
  176. break;
  177. case sun4e:
  178. printk("SUN4E\n");
  179. BUG();
  180. break;
  181. case sun4u:
  182. printk("SUN4U\n");
  183. BUG();
  184. break;
  185. default:
  186. printk("UNKNOWN!\n");
  187. BUG();
  188. break;
  189. }
  190. }
  191. /* Set this up early so that things like the scheduler can init
  192. * properly. We use the same cpu mask for both the present and
  193. * possible cpu map.
  194. */
  195. void __init smp_setup_cpu_possible_map(void)
  196. {
  197. int instance, mid;
  198. instance = 0;
  199. while (!cpu_find_by_instance(instance, NULL, &mid)) {
  200. if (mid < NR_CPUS) {
  201. set_cpu_possible(mid, true);
  202. set_cpu_present(mid, true);
  203. }
  204. instance++;
  205. }
  206. }
  207. void __init smp_prepare_boot_cpu(void)
  208. {
  209. int cpuid = hard_smp_processor_id();
  210. if (cpuid >= NR_CPUS) {
  211. prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
  212. prom_halt();
  213. }
  214. if (cpuid != 0)
  215. printk("boot cpu id != 0, this could work but is untested\n");
  216. current_thread_info()->cpu = cpuid;
  217. set_cpu_online(cpuid, true);
  218. set_cpu_possible(cpuid, true);
  219. }
  220. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  221. {
  222. int ret=0;
  223. switch(sparc_cpu_model) {
  224. case sun4m:
  225. ret = smp4m_boot_one_cpu(cpu, tidle);
  226. break;
  227. case sun4d:
  228. ret = smp4d_boot_one_cpu(cpu, tidle);
  229. break;
  230. case sparc_leon:
  231. ret = leon_boot_one_cpu(cpu, tidle);
  232. break;
  233. case sun4e:
  234. printk("SUN4E\n");
  235. BUG();
  236. break;
  237. case sun4u:
  238. printk("SUN4U\n");
  239. BUG();
  240. break;
  241. default:
  242. printk("UNKNOWN!\n");
  243. BUG();
  244. break;
  245. }
  246. if (!ret) {
  247. cpumask_set_cpu(cpu, &smp_commenced_mask);
  248. while (!cpu_online(cpu))
  249. mb();
  250. }
  251. return ret;
  252. }
  253. static void arch_cpu_pre_starting(void *arg)
  254. {
  255. local_ops->cache_all();
  256. local_ops->tlb_all();
  257. switch(sparc_cpu_model) {
  258. case sun4m:
  259. sun4m_cpu_pre_starting(arg);
  260. break;
  261. case sun4d:
  262. sun4d_cpu_pre_starting(arg);
  263. break;
  264. case sparc_leon:
  265. leon_cpu_pre_starting(arg);
  266. break;
  267. default:
  268. BUG();
  269. }
  270. }
  271. static void arch_cpu_pre_online(void *arg)
  272. {
  273. unsigned int cpuid = hard_smp_processor_id();
  274. register_percpu_ce(cpuid);
  275. calibrate_delay();
  276. smp_store_cpu_info(cpuid);
  277. local_ops->cache_all();
  278. local_ops->tlb_all();
  279. switch(sparc_cpu_model) {
  280. case sun4m:
  281. sun4m_cpu_pre_online(arg);
  282. break;
  283. case sun4d:
  284. sun4d_cpu_pre_online(arg);
  285. break;
  286. case sparc_leon:
  287. leon_cpu_pre_online(arg);
  288. break;
  289. default:
  290. BUG();
  291. }
  292. }
  293. static void sparc_start_secondary(void *arg)
  294. {
  295. unsigned int cpu;
  296. /*
  297. * SMP booting is extremely fragile in some architectures. So run
  298. * the cpu initialization code first before anything else.
  299. */
  300. arch_cpu_pre_starting(arg);
  301. preempt_disable();
  302. cpu = smp_processor_id();
  303. notify_cpu_starting(cpu);
  304. arch_cpu_pre_online(arg);
  305. /* Set the CPU in the cpu_online_mask */
  306. set_cpu_online(cpu, true);
  307. /* Enable local interrupts now */
  308. local_irq_enable();
  309. wmb();
  310. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  311. /* We should never reach here! */
  312. BUG();
  313. }
  314. void smp_callin(void)
  315. {
  316. sparc_start_secondary(NULL);
  317. }
  318. void smp_bogo(struct seq_file *m)
  319. {
  320. int i;
  321. for_each_online_cpu(i) {
  322. seq_printf(m,
  323. "Cpu%dBogo\t: %lu.%02lu\n",
  324. i,
  325. cpu_data(i).udelay_val/(500000/HZ),
  326. (cpu_data(i).udelay_val/(5000/HZ))%100);
  327. }
  328. }
  329. void smp_info(struct seq_file *m)
  330. {
  331. int i;
  332. seq_printf(m, "State:\n");
  333. for_each_online_cpu(i)
  334. seq_printf(m, "CPU%d\t\t: online\n", i);
  335. }