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linux-libre
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arch
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m68k
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coldfire
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m523x.c

m523x.c 2.3 KB
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  1. /***************************************************************************/
    2. 

  2. 

  3. /*
    4. 

  4.  *	m523x.c  -- platform support for ColdFire 523x based boards
    5. 

  5.  *
    6. 

  6.  *	Sub-architcture dependent initialization code for the Freescale
    7. 

  7.  *	523x CPUs.
    8. 

  8.  *
    9. 

  9.  *	Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
    10. 

  10.  *	Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
    11. 

  11.  */
    12. 

  12. 

  13. /***************************************************************************/
    14. 

  14. 

  15. #include <linux/kernel.h>
    16. 

  16. #include <linux/param.h>
    17. 

  17. #include <linux/init.h>
    18. 

  18. #include <linux/io.h>
    19. 

  19. #include <asm/machdep.h>
    20. 

  20. #include <asm/coldfire.h>
    21. 

  21. #include <asm/mcfsim.h>
    22. 

  22. #include <asm/mcfclk.h>
    23. 

  23. 

  24. /***************************************************************************/
    25. 

  25. 

  26. DEFINE_CLK(pll, "pll.0", MCF_CLK);
    27. 

  27. DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
    28. 

  28. DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
    29. 

  29. DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
    30. 

  30. DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
    31. 

  31. DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
    32. 

  32. DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
    33. 

  33. DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
    34. 

  34. DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
    35. 

  35. DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
    36. 

  36. DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
    37. 

  37. 

  38. struct clk *mcf_clks[] = {
    39. 

  39. 	&clk_pll,
    40. 

  40. 	&clk_sys,
    41. 

  41. 	&clk_mcfpit0,
    42. 

  42. 	&clk_mcfpit1,
    43. 

  43. 	&clk_mcfpit2,
    44. 

  44. 	&clk_mcfpit3,
    45. 

  45. 	&clk_mcfuart0,
    46. 

  46. 	&clk_mcfuart1,
    47. 

  47. 	&clk_mcfuart2,
    48. 

  48. 	&clk_mcfqspi0,
    49. 

  49. 	&clk_fec0,
    50. 

  50. 	NULL
    51. 

  51. };
    52. 

  52. 

  53. /***************************************************************************/
    54. 

  54. 

  55. static void __init m523x_qspi_init(void)
    56. 

  56. {
    57. 

  57. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
    58. 

  58. 	u16 par;
    59. 

  59. 

  60. 	/* setup QSPS pins for QSPI with gpio CS control */
    61. 

  61. 	writeb(0x1f, MCFGPIO_PAR_QSPI);
    62. 

  62. 	/* and CS2 & CS3 as gpio */
    63. 

  63. 	par = readw(MCFGPIO_PAR_TIMER);
    64. 

  64. 	par &= 0x3f3f;
    65. 

  65. 	writew(par, MCFGPIO_PAR_TIMER);
    66. 

  66. #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
    67. 

  67. }
    68. 

  68. 

  69. /***************************************************************************/
    70. 

  70. 

  71. static void __init m523x_fec_init(void)
    72. 

  72. {
    73. 

  73. 	/* Set multi-function pins to ethernet use */
    74. 

  74. 	writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
    75. 

  75. }
    76. 

  76. 

  77. /***************************************************************************/
    78. 

  78. 

  79. void __init config_BSP(char *commandp, int size)
    80. 

  80. {
    81. 

  81. 	mach_sched_init = hw_timer_init;
    82. 

  82. 	m523x_fec_init();
    83. 

  83. 	m523x_qspi_init();
    84. 

  84. }
    85. 

  85. 

  86. /***************************************************************************/
    87. 

  87.