tlb-v4wb.S 1.9 KB

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  1. /*
  2. * linux/arch/arm/mm/tlbv4wb.S
  3. *
  4. * Copyright (C) 1997-2002 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * ARM architecture version 4 TLB handling functions.
  11. * These assume a split I/D TLBs w/o I TLB entry, with a write buffer.
  12. *
  13. * Processors: SA110 SA1100 SA1110
  14. */
  15. #include <linux/linkage.h>
  16. #include <linux/init.h>
  17. #include <asm/assembler.h>
  18. #include <asm/asm-offsets.h>
  19. #include <asm/tlbflush.h>
  20. #include "proc-macros.S"
  21. .align 5
  22. /*
  23. * v4wb_flush_user_tlb_range(start, end, mm)
  24. *
  25. * Invalidate a range of TLB entries in the specified address space.
  26. *
  27. * - start - range start address
  28. * - end - range end address
  29. * - mm - mm_struct describing address space
  30. */
  31. .align 5
  32. ENTRY(v4wb_flush_user_tlb_range)
  33. vma_vm_mm ip, r2
  34. act_mm r3 @ get current->active_mm
  35. eors r3, ip, r3 @ == mm ?
  36. retne lr @ no, we dont do anything
  37. vma_vm_flags r2, r2
  38. mcr p15, 0, r3, c7, c10, 4 @ drain WB
  39. tst r2, #VM_EXEC
  40. mcrne p15, 0, r3, c8, c5, 0 @ invalidate I TLB
  41. bic r0, r0, #0x0ff
  42. bic r0, r0, #0xf00
  43. 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
  44. add r0, r0, #PAGE_SZ
  45. cmp r0, r1
  46. blo 1b
  47. ret lr
  48. /*
  49. * v4_flush_kern_tlb_range(start, end)
  50. *
  51. * Invalidate a range of TLB entries in the specified kernel
  52. * address range.
  53. *
  54. * - start - virtual address (may not be aligned)
  55. * - end - virtual address (may not be aligned)
  56. */
  57. ENTRY(v4wb_flush_kern_tlb_range)
  58. mov r3, #0
  59. mcr p15, 0, r3, c7, c10, 4 @ drain WB
  60. bic r0, r0, #0x0ff
  61. bic r0, r0, #0xf00
  62. mcr p15, 0, r3, c8, c5, 0 @ invalidate I TLB
  63. 1: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
  64. add r0, r0, #PAGE_SZ
  65. cmp r0, r1
  66. blo 1b
  67. ret lr
  68. __INITDATA
  69. /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
  70. define_tlb_functions v4wb, v4wb_tlb_flags