wnr854t-setup.c 4.3 KB

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  1. /*
  2. * arch/arm/mach-orion5x/wnr854t-setup.c
  3. *
  4. * This file is licensed under the terms of the GNU General Public
  5. * License version 2. This program is licensed "as is" without any
  6. * warranty of any kind, whether express or implied.
  7. */
  8. #include <linux/gpio.h>
  9. #include <linux/kernel.h>
  10. #include <linux/init.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/pci.h>
  13. #include <linux/irq.h>
  14. #include <linux/delay.h>
  15. #include <linux/mtd/physmap.h>
  16. #include <linux/mv643xx_eth.h>
  17. #include <linux/ethtool.h>
  18. #include <net/dsa.h>
  19. #include <asm/mach-types.h>
  20. #include <asm/mach/arch.h>
  21. #include <asm/mach/pci.h>
  22. #include "orion5x.h"
  23. #include "common.h"
  24. #include "mpp.h"
  25. static unsigned int wnr854t_mpp_modes[] __initdata = {
  26. MPP0_GPIO, /* Power LED green (0=on) */
  27. MPP1_GPIO, /* Reset Button (0=off) */
  28. MPP2_GPIO, /* Power LED blink (0=off) */
  29. MPP3_GPIO, /* WAN Status LED amber (0=off) */
  30. MPP4_GPIO, /* PCI int */
  31. MPP5_GPIO, /* ??? */
  32. MPP6_GPIO, /* ??? */
  33. MPP7_GPIO, /* ??? */
  34. MPP8_UNUSED, /* ??? */
  35. MPP9_GIGE, /* GE_RXERR */
  36. MPP10_UNUSED, /* ??? */
  37. MPP11_UNUSED, /* ??? */
  38. MPP12_GIGE, /* GE_TXD[4] */
  39. MPP13_GIGE, /* GE_TXD[5] */
  40. MPP14_GIGE, /* GE_TXD[6] */
  41. MPP15_GIGE, /* GE_TXD[7] */
  42. MPP16_GIGE, /* GE_RXD[4] */
  43. MPP17_GIGE, /* GE_RXD[5] */
  44. MPP18_GIGE, /* GE_RXD[6] */
  45. MPP19_GIGE, /* GE_RXD[7] */
  46. 0,
  47. };
  48. /*
  49. * 8M NOR flash Device bus boot chip select
  50. */
  51. #define WNR854T_NOR_BOOT_BASE 0xf4000000
  52. #define WNR854T_NOR_BOOT_SIZE SZ_8M
  53. static struct mtd_partition wnr854t_nor_flash_partitions[] = {
  54. {
  55. .name = "kernel",
  56. .offset = 0x00000000,
  57. .size = 0x00100000,
  58. }, {
  59. .name = "rootfs",
  60. .offset = 0x00100000,
  61. .size = 0x00660000,
  62. }, {
  63. .name = "uboot",
  64. .offset = 0x00760000,
  65. .size = 0x00040000,
  66. },
  67. };
  68. static struct physmap_flash_data wnr854t_nor_flash_data = {
  69. .width = 2,
  70. .parts = wnr854t_nor_flash_partitions,
  71. .nr_parts = ARRAY_SIZE(wnr854t_nor_flash_partitions),
  72. };
  73. static struct resource wnr854t_nor_flash_resource = {
  74. .flags = IORESOURCE_MEM,
  75. .start = WNR854T_NOR_BOOT_BASE,
  76. .end = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
  77. };
  78. static struct platform_device wnr854t_nor_flash = {
  79. .name = "physmap-flash",
  80. .id = 0,
  81. .dev = {
  82. .platform_data = &wnr854t_nor_flash_data,
  83. },
  84. .num_resources = 1,
  85. .resource = &wnr854t_nor_flash_resource,
  86. };
  87. static struct mv643xx_eth_platform_data wnr854t_eth_data = {
  88. .phy_addr = MV643XX_ETH_PHY_NONE,
  89. .speed = SPEED_1000,
  90. .duplex = DUPLEX_FULL,
  91. };
  92. static struct dsa_chip_data wnr854t_switch_chip_data = {
  93. .port_names[0] = "lan3",
  94. .port_names[1] = "lan4",
  95. .port_names[2] = "wan",
  96. .port_names[3] = "cpu",
  97. .port_names[5] = "lan1",
  98. .port_names[7] = "lan2",
  99. };
  100. static struct dsa_platform_data __initdata wnr854t_switch_plat_data = {
  101. .nr_chips = 1,
  102. .chip = &wnr854t_switch_chip_data,
  103. };
  104. static void __init wnr854t_init(void)
  105. {
  106. /*
  107. * Setup basic Orion functions. Need to be called early.
  108. */
  109. orion5x_init();
  110. orion5x_mpp_conf(wnr854t_mpp_modes);
  111. /*
  112. * Configure peripherals.
  113. */
  114. orion5x_eth_init(&wnr854t_eth_data);
  115. orion5x_eth_switch_init(&wnr854t_switch_plat_data);
  116. orion5x_uart0_init();
  117. mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
  118. ORION_MBUS_DEVBUS_BOOT_ATTR,
  119. WNR854T_NOR_BOOT_BASE,
  120. WNR854T_NOR_BOOT_SIZE);
  121. platform_device_register(&wnr854t_nor_flash);
  122. }
  123. static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
  124. u8 pin)
  125. {
  126. int irq;
  127. /*
  128. * Check for devices with hard-wired IRQs.
  129. */
  130. irq = orion5x_pci_map_irq(dev, slot, pin);
  131. if (irq != -1)
  132. return irq;
  133. /*
  134. * Mini-PCI slot.
  135. */
  136. if (slot == 7)
  137. return gpio_to_irq(4);
  138. return -1;
  139. }
  140. static struct hw_pci wnr854t_pci __initdata = {
  141. .nr_controllers = 2,
  142. .setup = orion5x_pci_sys_setup,
  143. .scan = orion5x_pci_sys_scan_bus,
  144. .map_irq = wnr854t_pci_map_irq,
  145. };
  146. static int __init wnr854t_pci_init(void)
  147. {
  148. if (machine_is_wnr854t())
  149. pci_common_init(&wnr854t_pci);
  150. return 0;
  151. }
  152. subsys_initcall(wnr854t_pci_init);
  153. MACHINE_START(WNR854T, "Netgear WNR854T")
  154. /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
  155. .atag_offset = 0x100,
  156. .nr_irqs = ORION5X_NR_IRQS,
  157. .init_machine = wnr854t_init,
  158. .map_io = orion5x_map_io,
  159. .init_early = orion5x_init_early,
  160. .init_irq = orion5x_init_irq,
  161. .init_time = orion5x_timer_init,
  162. .fixup = tag_fixup_mem32,
  163. .restart = orion5x_restart,
  164. MACHINE_END