clock.h 10 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/clock.h
  3. *
  4. * Copyright (C) 2004 - 2005, 2009 Nokia corporation
  5. * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  6. * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
  13. #define __ARCH_ARM_MACH_OMAP1_CLOCK_H
  14. #include <linux/clk.h>
  15. #include <linux/list.h>
  16. #include <linux/clkdev.h>
  17. struct module;
  18. struct clk;
  19. struct omap_clk {
  20. u16 cpu;
  21. struct clk_lookup lk;
  22. };
  23. #define CLK(dev, con, ck, cp) \
  24. { \
  25. .cpu = cp, \
  26. .lk = { \
  27. .dev_id = dev, \
  28. .con_id = con, \
  29. .clk = ck, \
  30. }, \
  31. }
  32. /* Platform flags for the clkdev-OMAP integration code */
  33. #define CK_310 (1 << 0)
  34. #define CK_7XX (1 << 1) /* 7xx, 850 */
  35. #define CK_1510 (1 << 2)
  36. #define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
  37. #define CK_1710 (1 << 4) /* 1710 extra for rate selection */
  38. /* Temporary, needed during the common clock framework conversion */
  39. #define __clk_get_name(clk) (clk->name)
  40. #define __clk_get_parent(clk) (clk->parent)
  41. #define __clk_get_rate(clk) (clk->rate)
  42. /**
  43. * struct clkops - some clock function pointers
  44. * @enable: fn ptr that enables the current clock in hardware
  45. * @disable: fn ptr that enables the current clock in hardware
  46. * @find_idlest: function returning the IDLEST register for the clock's IP blk
  47. * @find_companion: function returning the "companion" clk reg for the clock
  48. * @allow_idle: fn ptr that enables autoidle for the current clock in hardware
  49. * @deny_idle: fn ptr that disables autoidle for the current clock in hardware
  50. *
  51. * A "companion" clk is an accompanying clock to the one being queried
  52. * that must be enabled for the IP module connected to the clock to
  53. * become accessible by the hardware. Neither @find_idlest nor
  54. * @find_companion should be needed; that information is IP
  55. * block-specific; the hwmod code has been created to handle this, but
  56. * until hwmod data is ready and drivers have been converted to use PM
  57. * runtime calls in place of clk_enable()/clk_disable(), @find_idlest and
  58. * @find_companion must, unfortunately, remain.
  59. */
  60. struct clkops {
  61. int (*enable)(struct clk *);
  62. void (*disable)(struct clk *);
  63. void (*find_idlest)(struct clk *, void __iomem **,
  64. u8 *, u8 *);
  65. void (*find_companion)(struct clk *, void __iomem **,
  66. u8 *);
  67. void (*allow_idle)(struct clk *);
  68. void (*deny_idle)(struct clk *);
  69. };
  70. /*
  71. * struct clk.flags possibilities
  72. *
  73. * XXX document the rest of the clock flags here
  74. *
  75. * CLOCK_CLKOUTX2: (OMAP4 only) DPLL CLKOUT and CLKOUTX2 GATE_CTRL
  76. * bits share the same register. This flag allows the
  77. * omap4_dpllmx*() code to determine which GATE_CTRL bit field
  78. * should be used. This is a temporary solution - a better approach
  79. * would be to associate clock type-specific data with the clock,
  80. * similar to the struct dpll_data approach.
  81. */
  82. #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */
  83. #define CLOCK_IDLE_CONTROL (1 << 1)
  84. #define CLOCK_NO_IDLE_PARENT (1 << 2)
  85. #define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */
  86. #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */
  87. #define CLOCK_CLKOUTX2 (1 << 5)
  88. /**
  89. * struct clk - OMAP struct clk
  90. * @node: list_head connecting this clock into the full clock list
  91. * @ops: struct clkops * for this clock
  92. * @name: the name of the clock in the hardware (used in hwmod data and debug)
  93. * @parent: pointer to this clock's parent struct clk
  94. * @children: list_head connecting to the child clks' @sibling list_heads
  95. * @sibling: list_head connecting this clk to its parent clk's @children
  96. * @rate: current clock rate
  97. * @enable_reg: register to write to enable the clock (see @enable_bit)
  98. * @recalc: fn ptr that returns the clock's current rate
  99. * @set_rate: fn ptr that can change the clock's current rate
  100. * @round_rate: fn ptr that can round the clock's current rate
  101. * @init: fn ptr to do clock-specific initialization
  102. * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
  103. * @usecount: number of users that have requested this clock to be enabled
  104. * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div
  105. * @flags: see "struct clk.flags possibilities" above
  106. * @rate_offset: bitshift for rate selection bitfield (OMAP1 only)
  107. * @src_offset: bitshift for source selection bitfield (OMAP1 only)
  108. *
  109. * XXX @rate_offset, @src_offset should probably be removed and OMAP1
  110. * clock code converted to use clksel.
  111. *
  112. * XXX @usecount is poorly named. It should be "enable_count" or
  113. * something similar. "users" in the description refers to kernel
  114. * code (core code or drivers) that have called clk_enable() and not
  115. * yet called clk_disable(); the usecount of parent clocks is also
  116. * incremented by the clock code when clk_enable() is called on child
  117. * clocks and decremented by the clock code when clk_disable() is
  118. * called on child clocks.
  119. *
  120. * XXX @clkdm, @usecount, @children, @sibling should be marked for
  121. * internal use only.
  122. *
  123. * @children and @sibling are used to optimize parent-to-child clock
  124. * tree traversals. (child-to-parent traversals use @parent.)
  125. *
  126. * XXX The notion of the clock's current rate probably needs to be
  127. * separated from the clock's target rate.
  128. */
  129. struct clk {
  130. struct list_head node;
  131. const struct clkops *ops;
  132. const char *name;
  133. struct clk *parent;
  134. struct list_head children;
  135. struct list_head sibling; /* node for children */
  136. unsigned long rate;
  137. void __iomem *enable_reg;
  138. unsigned long (*recalc)(struct clk *);
  139. int (*set_rate)(struct clk *, unsigned long);
  140. long (*round_rate)(struct clk *, unsigned long);
  141. void (*init)(struct clk *);
  142. u8 enable_bit;
  143. s8 usecount;
  144. u8 fixed_div;
  145. u8 flags;
  146. u8 rate_offset;
  147. u8 src_offset;
  148. #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
  149. struct dentry *dent; /* For visible tree hierarchy */
  150. #endif
  151. };
  152. struct clk_functions {
  153. int (*clk_enable)(struct clk *clk);
  154. void (*clk_disable)(struct clk *clk);
  155. long (*clk_round_rate)(struct clk *clk, unsigned long rate);
  156. int (*clk_set_rate)(struct clk *clk, unsigned long rate);
  157. int (*clk_set_parent)(struct clk *clk, struct clk *parent);
  158. void (*clk_allow_idle)(struct clk *clk);
  159. void (*clk_deny_idle)(struct clk *clk);
  160. void (*clk_disable_unused)(struct clk *clk);
  161. };
  162. extern int mpurate;
  163. extern int clk_init(struct clk_functions *custom_clocks);
  164. extern void clk_preinit(struct clk *clk);
  165. extern int clk_register(struct clk *clk);
  166. extern void clk_reparent(struct clk *child, struct clk *parent);
  167. extern void clk_unregister(struct clk *clk);
  168. extern void propagate_rate(struct clk *clk);
  169. extern void recalculate_root_clocks(void);
  170. extern unsigned long followparent_recalc(struct clk *clk);
  171. extern void clk_enable_init_clocks(void);
  172. unsigned long omap_fixed_divisor_recalc(struct clk *clk);
  173. extern struct clk *omap_clk_get_by_name(const char *name);
  174. extern int omap_clk_enable_autoidle_all(void);
  175. extern int omap_clk_disable_autoidle_all(void);
  176. extern const struct clkops clkops_null;
  177. extern struct clk dummy_ck;
  178. int omap1_clk_init(void);
  179. void omap1_clk_late_init(void);
  180. extern int omap1_clk_enable(struct clk *clk);
  181. extern void omap1_clk_disable(struct clk *clk);
  182. extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate);
  183. extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate);
  184. extern unsigned long omap1_ckctl_recalc(struct clk *clk);
  185. extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
  186. extern unsigned long omap1_sossi_recalc(struct clk *clk);
  187. extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk);
  188. extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate);
  189. extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate);
  190. extern unsigned long omap1_uart_recalc(struct clk *clk);
  191. extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate);
  192. extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate);
  193. extern void omap1_init_ext_clk(struct clk *clk);
  194. extern int omap1_select_table_rate(struct clk *clk, unsigned long rate);
  195. extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate);
  196. extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate);
  197. extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate);
  198. extern unsigned long omap1_watchdog_recalc(struct clk *clk);
  199. #ifdef CONFIG_OMAP_RESET_CLOCKS
  200. extern void omap1_clk_disable_unused(struct clk *clk);
  201. #else
  202. #define omap1_clk_disable_unused NULL
  203. #endif
  204. struct uart_clk {
  205. struct clk clk;
  206. unsigned long sysc_addr;
  207. };
  208. /* Provide a method for preventing idling some ARM IDLECT clocks */
  209. struct arm_idlect1_clk {
  210. struct clk clk;
  211. unsigned long no_idle_count;
  212. __u8 idlect_shift;
  213. };
  214. /* ARM_CKCTL bit shifts */
  215. #define CKCTL_PERDIV_OFFSET 0
  216. #define CKCTL_LCDDIV_OFFSET 2
  217. #define CKCTL_ARMDIV_OFFSET 4
  218. #define CKCTL_DSPDIV_OFFSET 6
  219. #define CKCTL_TCDIV_OFFSET 8
  220. #define CKCTL_DSPMMUDIV_OFFSET 10
  221. /*#define ARM_TIMXO 12*/
  222. #define EN_DSPCK 13
  223. /*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */
  224. /* DSP_CKCTL bit shifts */
  225. #define CKCTL_DSPPERDIV_OFFSET 0
  226. /* ARM_IDLECT2 bit shifts */
  227. #define EN_WDTCK 0
  228. #define EN_XORPCK 1
  229. #define EN_PERCK 2
  230. #define EN_LCDCK 3
  231. #define EN_LBCK 4 /* Not on 1610/1710 */
  232. /*#define EN_HSABCK 5*/
  233. #define EN_APICK 6
  234. #define EN_TIMCK 7
  235. #define DMACK_REQ 8
  236. #define EN_GPIOCK 9 /* Not on 1610/1710 */
  237. /*#define EN_LBFREECK 10*/
  238. #define EN_CKOUT_ARM 11
  239. /* ARM_IDLECT3 bit shifts */
  240. #define EN_OCPI_CK 0
  241. #define EN_TC1_CK 2
  242. #define EN_TC2_CK 4
  243. /* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
  244. #define EN_DSPTIMCK 5
  245. /* Various register defines for clock controls scattered around OMAP chip */
  246. #define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */
  247. #define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */
  248. #define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */
  249. #define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */
  250. #define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */
  251. #define SWD_CLK_DIV_CTRL_SEL 0xfffe0874
  252. #define COM_CLK_DIV_CTRL_SEL 0xfffe0878
  253. #define SOFT_REQ_REG 0xfffe0834
  254. #define SOFT_REQ_REG2 0xfffe0880
  255. extern __u32 arm_idlect1_mask;
  256. extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
  257. extern const struct clkops clkops_dspck;
  258. extern const struct clkops clkops_dummy;
  259. extern const struct clkops clkops_uart_16xx;
  260. extern const struct clkops clkops_generic;
  261. /* used for passing SoC type to omap1_{select,round_to}_table_rate() */
  262. extern u32 cpu_mask;
  263. #endif