head-sa1100.S 1.2 KB

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  1. /*
  2. * linux/arch/arm/boot/compressed/head-sa1100.S
  3. *
  4. * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net>
  5. *
  6. * SA1100 specific tweaks. This is merged into head.S by the linker.
  7. *
  8. */
  9. #include <linux/linkage.h>
  10. #include <asm/mach-types.h>
  11. .section ".start", "ax"
  12. .arch armv4
  13. __SA1100_start:
  14. @ Preserve r8/r7 i.e. kernel entry values
  15. #ifdef CONFIG_SA1100_COLLIE
  16. mov r7, #MACH_TYPE_COLLIE
  17. #endif
  18. #ifdef CONFIG_SA1100_SIMPAD
  19. @ UNTIL we've something like an open bootldr
  20. mov r7, #MACH_TYPE_SIMPAD @should be 87
  21. #endif
  22. mrc p15, 0, r0, c1, c0, 0 @ read control reg
  23. ands r0, r0, #0x0d
  24. beq 99f
  25. @ Data cache might be active.
  26. @ Be sure to flush kernel binary out of the cache,
  27. @ whatever state it is, before it is turned off.
  28. @ This is done by fetching through currently executed
  29. @ memory to be sure we hit the same cache.
  30. bic r2, pc, #0x1f
  31. add r3, r2, #0x4000 @ 16 kb is quite enough...
  32. 1: ldr r0, [r2], #32
  33. teq r2, r3
  34. bne 1b
  35. mcr p15, 0, r0, c7, c10, 4 @ drain WB
  36. mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
  37. @ disabling MMU and caches
  38. mrc p15, 0, r0, c1, c0, 0 @ read control reg
  39. bic r0, r0, #0x0d @ clear WB, DC, MMU
  40. bic r0, r0, #0x1000 @ clear Icache
  41. mcr p15, 0, r0, c1, c0, 0
  42. 99: