mt9v011.c 15 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/slab.h>
  9. #include <linux/videodev2.h>
  10. #include <linux/delay.h>
  11. #include <linux/module.h>
  12. #include <asm/div64.h>
  13. #include <media/v4l2-device.h>
  14. #include <media/v4l2-ctrls.h>
  15. #include <media/i2c/mt9v011.h>
  16. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  17. MODULE_AUTHOR("Mauro Carvalho Chehab");
  18. MODULE_LICENSE("GPL");
  19. static int debug;
  20. module_param(debug, int, 0);
  21. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  22. #define R00_MT9V011_CHIP_VERSION 0x00
  23. #define R01_MT9V011_ROWSTART 0x01
  24. #define R02_MT9V011_COLSTART 0x02
  25. #define R03_MT9V011_HEIGHT 0x03
  26. #define R04_MT9V011_WIDTH 0x04
  27. #define R05_MT9V011_HBLANK 0x05
  28. #define R06_MT9V011_VBLANK 0x06
  29. #define R07_MT9V011_OUT_CTRL 0x07
  30. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  31. #define R0A_MT9V011_CLK_SPEED 0x0a
  32. #define R0B_MT9V011_RESTART 0x0b
  33. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  34. #define R0D_MT9V011_RESET 0x0d
  35. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  36. #define R20_MT9V011_READ_MODE 0x20
  37. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  38. #define R2C_MT9V011_BLUE_GAIN 0x2c
  39. #define R2D_MT9V011_RED_GAIN 0x2d
  40. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  41. #define R35_MT9V011_GLOBAL_GAIN 0x35
  42. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  43. #define MT9V011_VERSION 0x8232
  44. #define MT9V011_REV_B_VERSION 0x8243
  45. struct mt9v011 {
  46. struct v4l2_subdev sd;
  47. #ifdef CONFIG_MEDIA_CONTROLLER
  48. struct media_pad pad;
  49. #endif
  50. struct v4l2_ctrl_handler ctrls;
  51. unsigned width, height;
  52. unsigned xtal;
  53. unsigned hflip:1;
  54. unsigned vflip:1;
  55. u16 global_gain, exposure;
  56. s16 red_bal, blue_bal;
  57. };
  58. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  59. {
  60. return container_of(sd, struct mt9v011, sd);
  61. }
  62. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  63. {
  64. struct i2c_client *c = v4l2_get_subdevdata(sd);
  65. __be16 buffer;
  66. int rc, val;
  67. rc = i2c_master_send(c, &addr, 1);
  68. if (rc != 1)
  69. v4l2_dbg(0, debug, sd,
  70. "i2c i/o error: rc == %d (should be 1)\n", rc);
  71. msleep(10);
  72. rc = i2c_master_recv(c, (char *)&buffer, 2);
  73. if (rc != 2)
  74. v4l2_dbg(0, debug, sd,
  75. "i2c i/o error: rc == %d (should be 2)\n", rc);
  76. val = be16_to_cpu(buffer);
  77. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  78. return val;
  79. }
  80. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  81. u16 value)
  82. {
  83. struct i2c_client *c = v4l2_get_subdevdata(sd);
  84. unsigned char buffer[3];
  85. int rc;
  86. buffer[0] = addr;
  87. buffer[1] = value >> 8;
  88. buffer[2] = value & 0xff;
  89. v4l2_dbg(2, debug, sd,
  90. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  91. rc = i2c_master_send(c, buffer, 3);
  92. if (rc != 3)
  93. v4l2_dbg(0, debug, sd,
  94. "i2c i/o error: rc == %d (should be 3)\n", rc);
  95. }
  96. struct i2c_reg_value {
  97. unsigned char reg;
  98. u16 value;
  99. };
  100. /*
  101. * Values used at the original driver
  102. * Some values are marked as Reserved at the datasheet
  103. */
  104. static const struct i2c_reg_value mt9v011_init_default[] = {
  105. { R0D_MT9V011_RESET, 0x0001 },
  106. { R0D_MT9V011_RESET, 0x0000 },
  107. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  108. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  109. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  110. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  111. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  112. };
  113. static u16 calc_mt9v011_gain(s16 lineargain)
  114. {
  115. u16 digitalgain = 0;
  116. u16 analogmult = 0;
  117. u16 analoginit = 0;
  118. if (lineargain < 0)
  119. lineargain = 0;
  120. /* recommended minimum */
  121. lineargain += 0x0020;
  122. if (lineargain > 2047)
  123. lineargain = 2047;
  124. if (lineargain > 1023) {
  125. digitalgain = 3;
  126. analogmult = 3;
  127. analoginit = lineargain / 16;
  128. } else if (lineargain > 511) {
  129. digitalgain = 1;
  130. analogmult = 3;
  131. analoginit = lineargain / 8;
  132. } else if (lineargain > 255) {
  133. analogmult = 3;
  134. analoginit = lineargain / 4;
  135. } else if (lineargain > 127) {
  136. analogmult = 1;
  137. analoginit = lineargain / 2;
  138. } else
  139. analoginit = lineargain;
  140. return analoginit + (analogmult << 7) + (digitalgain << 9);
  141. }
  142. static void set_balance(struct v4l2_subdev *sd)
  143. {
  144. struct mt9v011 *core = to_mt9v011(sd);
  145. u16 green_gain, blue_gain, red_gain;
  146. u16 exposure;
  147. s16 bal;
  148. exposure = core->exposure;
  149. green_gain = calc_mt9v011_gain(core->global_gain);
  150. bal = core->global_gain;
  151. bal += (core->blue_bal * core->global_gain / (1 << 7));
  152. blue_gain = calc_mt9v011_gain(bal);
  153. bal = core->global_gain;
  154. bal += (core->red_bal * core->global_gain / (1 << 7));
  155. red_gain = calc_mt9v011_gain(bal);
  156. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
  157. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
  158. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  159. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  160. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  161. }
  162. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  163. {
  164. struct mt9v011 *core = to_mt9v011(sd);
  165. unsigned height, width, hblank, vblank, speed;
  166. unsigned row_time, t_time;
  167. u64 frames_per_ms;
  168. unsigned tmp;
  169. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  170. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  171. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  172. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  173. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  174. row_time = (width + 113 + hblank) * (speed + 2);
  175. t_time = row_time * (height + vblank + 1);
  176. frames_per_ms = core->xtal * 1000l;
  177. do_div(frames_per_ms, t_time);
  178. tmp = frames_per_ms;
  179. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  180. tmp / 1000, tmp % 1000, t_time);
  181. if (numerator && denominator) {
  182. *numerator = 1000;
  183. *denominator = (u32)frames_per_ms;
  184. }
  185. }
  186. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  187. {
  188. struct mt9v011 *core = to_mt9v011(sd);
  189. unsigned height, width, hblank, vblank;
  190. unsigned row_time, line_time;
  191. u64 t_time, speed;
  192. /* Avoid bogus calculus */
  193. if (!numerator || !denominator)
  194. return 0;
  195. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  196. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  197. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  198. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  199. row_time = width + 113 + hblank;
  200. line_time = height + vblank + 1;
  201. t_time = core->xtal * ((u64)numerator);
  202. /* round to the closest value */
  203. t_time += denominator / 2;
  204. do_div(t_time, denominator);
  205. speed = t_time;
  206. do_div(speed, row_time * line_time);
  207. /* Avoid having a negative value for speed */
  208. if (speed < 2)
  209. speed = 0;
  210. else
  211. speed -= 2;
  212. /* Avoid speed overflow */
  213. if (speed > 15)
  214. return 15;
  215. return (u16)speed;
  216. }
  217. static void set_res(struct v4l2_subdev *sd)
  218. {
  219. struct mt9v011 *core = to_mt9v011(sd);
  220. unsigned vstart, hstart;
  221. /*
  222. * The mt9v011 doesn't have scaling. So, in order to select the desired
  223. * resolution, we're cropping at the middle of the sensor.
  224. * hblank and vblank should be adjusted, in order to warrant that
  225. * we'll preserve the line timings for 30 fps, no matter what resolution
  226. * is selected.
  227. * NOTE: datasheet says that width (and height) should be filled with
  228. * width-1. However, this doesn't work, since one pixel per line will
  229. * be missing.
  230. */
  231. hstart = 20 + (640 - core->width) / 2;
  232. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  233. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  234. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  235. vstart = 8 + (480 - core->height) / 2;
  236. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  237. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  238. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  239. calc_fps(sd, NULL, NULL);
  240. };
  241. static void set_read_mode(struct v4l2_subdev *sd)
  242. {
  243. struct mt9v011 *core = to_mt9v011(sd);
  244. unsigned mode = 0x1000;
  245. if (core->hflip)
  246. mode |= 0x4000;
  247. if (core->vflip)
  248. mode |= 0x8000;
  249. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  250. }
  251. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  252. {
  253. int i;
  254. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  255. mt9v011_write(sd, mt9v011_init_default[i].reg,
  256. mt9v011_init_default[i].value);
  257. set_balance(sd);
  258. set_res(sd);
  259. set_read_mode(sd);
  260. return 0;
  261. }
  262. static int mt9v011_enum_mbus_code(struct v4l2_subdev *sd,
  263. struct v4l2_subdev_pad_config *cfg,
  264. struct v4l2_subdev_mbus_code_enum *code)
  265. {
  266. if (code->pad || code->index > 0)
  267. return -EINVAL;
  268. code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
  269. return 0;
  270. }
  271. static int mt9v011_set_fmt(struct v4l2_subdev *sd,
  272. struct v4l2_subdev_pad_config *cfg,
  273. struct v4l2_subdev_format *format)
  274. {
  275. struct v4l2_mbus_framefmt *fmt = &format->format;
  276. struct mt9v011 *core = to_mt9v011(sd);
  277. if (format->pad || fmt->code != MEDIA_BUS_FMT_SGRBG8_1X8)
  278. return -EINVAL;
  279. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  280. &fmt->height, 32, 480, 1, 0);
  281. fmt->field = V4L2_FIELD_NONE;
  282. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  283. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  284. core->width = fmt->width;
  285. core->height = fmt->height;
  286. set_res(sd);
  287. } else {
  288. cfg->try_fmt = *fmt;
  289. }
  290. return 0;
  291. }
  292. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  293. {
  294. struct v4l2_captureparm *cp = &parms->parm.capture;
  295. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  296. return -EINVAL;
  297. memset(cp, 0, sizeof(struct v4l2_captureparm));
  298. cp->capability = V4L2_CAP_TIMEPERFRAME;
  299. calc_fps(sd,
  300. &cp->timeperframe.numerator,
  301. &cp->timeperframe.denominator);
  302. return 0;
  303. }
  304. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  305. {
  306. struct v4l2_captureparm *cp = &parms->parm.capture;
  307. struct v4l2_fract *tpf = &cp->timeperframe;
  308. u16 speed;
  309. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  310. return -EINVAL;
  311. if (cp->extendedmode != 0)
  312. return -EINVAL;
  313. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  314. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  315. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  316. /* Recalculate and update fps info */
  317. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  318. return 0;
  319. }
  320. #ifdef CONFIG_VIDEO_ADV_DEBUG
  321. static int mt9v011_g_register(struct v4l2_subdev *sd,
  322. struct v4l2_dbg_register *reg)
  323. {
  324. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  325. reg->size = 2;
  326. return 0;
  327. }
  328. static int mt9v011_s_register(struct v4l2_subdev *sd,
  329. const struct v4l2_dbg_register *reg)
  330. {
  331. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  332. return 0;
  333. }
  334. #endif
  335. static int mt9v011_s_ctrl(struct v4l2_ctrl *ctrl)
  336. {
  337. struct mt9v011 *core =
  338. container_of(ctrl->handler, struct mt9v011, ctrls);
  339. struct v4l2_subdev *sd = &core->sd;
  340. switch (ctrl->id) {
  341. case V4L2_CID_GAIN:
  342. core->global_gain = ctrl->val;
  343. break;
  344. case V4L2_CID_EXPOSURE:
  345. core->exposure = ctrl->val;
  346. break;
  347. case V4L2_CID_RED_BALANCE:
  348. core->red_bal = ctrl->val;
  349. break;
  350. case V4L2_CID_BLUE_BALANCE:
  351. core->blue_bal = ctrl->val;
  352. break;
  353. case V4L2_CID_HFLIP:
  354. core->hflip = ctrl->val;
  355. set_read_mode(sd);
  356. return 0;
  357. case V4L2_CID_VFLIP:
  358. core->vflip = ctrl->val;
  359. set_read_mode(sd);
  360. return 0;
  361. default:
  362. return -EINVAL;
  363. }
  364. set_balance(sd);
  365. return 0;
  366. }
  367. static const struct v4l2_ctrl_ops mt9v011_ctrl_ops = {
  368. .s_ctrl = mt9v011_s_ctrl,
  369. };
  370. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  371. .reset = mt9v011_reset,
  372. #ifdef CONFIG_VIDEO_ADV_DEBUG
  373. .g_register = mt9v011_g_register,
  374. .s_register = mt9v011_s_register,
  375. #endif
  376. };
  377. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  378. .g_parm = mt9v011_g_parm,
  379. .s_parm = mt9v011_s_parm,
  380. };
  381. static const struct v4l2_subdev_pad_ops mt9v011_pad_ops = {
  382. .enum_mbus_code = mt9v011_enum_mbus_code,
  383. .set_fmt = mt9v011_set_fmt,
  384. };
  385. static const struct v4l2_subdev_ops mt9v011_ops = {
  386. .core = &mt9v011_core_ops,
  387. .video = &mt9v011_video_ops,
  388. .pad = &mt9v011_pad_ops,
  389. };
  390. /****************************************************************************
  391. I2C Client & Driver
  392. ****************************************************************************/
  393. static int mt9v011_probe(struct i2c_client *c,
  394. const struct i2c_device_id *id)
  395. {
  396. u16 version;
  397. struct mt9v011 *core;
  398. struct v4l2_subdev *sd;
  399. #ifdef CONFIG_MEDIA_CONTROLLER
  400. int ret;
  401. #endif
  402. /* Check if the adapter supports the needed features */
  403. if (!i2c_check_functionality(c->adapter,
  404. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  405. return -EIO;
  406. core = devm_kzalloc(&c->dev, sizeof(struct mt9v011), GFP_KERNEL);
  407. if (!core)
  408. return -ENOMEM;
  409. sd = &core->sd;
  410. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  411. #ifdef CONFIG_MEDIA_CONTROLLER
  412. core->pad.flags = MEDIA_PAD_FL_SOURCE;
  413. sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
  414. ret = media_entity_pads_init(&sd->entity, 1, &core->pad);
  415. if (ret < 0)
  416. return ret;
  417. #endif
  418. /* Check if the sensor is really a MT9V011 */
  419. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  420. if ((version != MT9V011_VERSION) &&
  421. (version != MT9V011_REV_B_VERSION)) {
  422. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  423. version);
  424. return -EINVAL;
  425. }
  426. v4l2_ctrl_handler_init(&core->ctrls, 5);
  427. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  428. V4L2_CID_GAIN, 0, (1 << 12) - 1 - 0x20, 1, 0x20);
  429. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  430. V4L2_CID_EXPOSURE, 0, 2047, 1, 0x01fc);
  431. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  432. V4L2_CID_RED_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  433. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  434. V4L2_CID_BLUE_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  435. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  436. V4L2_CID_HFLIP, 0, 1, 1, 0);
  437. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  438. V4L2_CID_VFLIP, 0, 1, 1, 0);
  439. if (core->ctrls.error) {
  440. int ret = core->ctrls.error;
  441. v4l2_err(sd, "control initialization error %d\n", ret);
  442. v4l2_ctrl_handler_free(&core->ctrls);
  443. return ret;
  444. }
  445. core->sd.ctrl_handler = &core->ctrls;
  446. core->global_gain = 0x0024;
  447. core->exposure = 0x01fc;
  448. core->width = 640;
  449. core->height = 480;
  450. core->xtal = 27000000; /* Hz */
  451. if (c->dev.platform_data) {
  452. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  453. core->xtal = pdata->xtal;
  454. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  455. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  456. }
  457. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  458. c->addr << 1, c->adapter->name, version);
  459. return 0;
  460. }
  461. static int mt9v011_remove(struct i2c_client *c)
  462. {
  463. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  464. struct mt9v011 *core = to_mt9v011(sd);
  465. v4l2_dbg(1, debug, sd,
  466. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  467. c->addr << 1);
  468. v4l2_device_unregister_subdev(sd);
  469. v4l2_ctrl_handler_free(&core->ctrls);
  470. return 0;
  471. }
  472. /* ----------------------------------------------------------------------- */
  473. static const struct i2c_device_id mt9v011_id[] = {
  474. { "mt9v011", 0 },
  475. { }
  476. };
  477. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  478. static struct i2c_driver mt9v011_driver = {
  479. .driver = {
  480. .name = "mt9v011",
  481. },
  482. .probe = mt9v011_probe,
  483. .remove = mt9v011_remove,
  484. .id_table = mt9v011_id,
  485. };
  486. module_i2c_driver(mt9v011_driver);