qib_uc.c 14 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
  3. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include "qib.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_UC_##x
  37. /**
  38. * qib_make_uc_req - construct a request packet (SEND, RDMA write)
  39. * @qp: a pointer to the QP
  40. *
  41. * Assumes the s_lock is held.
  42. *
  43. * Return 1 if constructed; otherwise, return 0.
  44. */
  45. int qib_make_uc_req(struct rvt_qp *qp, unsigned long *flags)
  46. {
  47. struct qib_qp_priv *priv = qp->priv;
  48. struct ib_other_headers *ohdr;
  49. struct rvt_swqe *wqe;
  50. u32 hwords;
  51. u32 bth0;
  52. u32 len;
  53. u32 pmtu = qp->pmtu;
  54. int ret = 0;
  55. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  56. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  57. goto bail;
  58. /* We are in the error state, flush the work request. */
  59. smp_read_barrier_depends(); /* see post_one_send() */
  60. if (qp->s_last == ACCESS_ONCE(qp->s_head))
  61. goto bail;
  62. /* If DMAs are in progress, we can't flush immediately. */
  63. if (atomic_read(&priv->s_dma_busy)) {
  64. qp->s_flags |= RVT_S_WAIT_DMA;
  65. goto bail;
  66. }
  67. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  68. qib_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
  69. goto done;
  70. }
  71. ohdr = &priv->s_hdr->u.oth;
  72. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  73. ohdr = &priv->s_hdr->u.l.oth;
  74. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  75. hwords = 5;
  76. bth0 = 0;
  77. /* Get the next send request. */
  78. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  79. qp->s_wqe = NULL;
  80. switch (qp->s_state) {
  81. default:
  82. if (!(ib_rvt_state_ops[qp->state] &
  83. RVT_PROCESS_NEXT_SEND_OK))
  84. goto bail;
  85. /* Check if send work queue is empty. */
  86. smp_read_barrier_depends(); /* see post_one_send() */
  87. if (qp->s_cur == ACCESS_ONCE(qp->s_head))
  88. goto bail;
  89. /*
  90. * Start a new request.
  91. */
  92. qp->s_psn = wqe->psn;
  93. qp->s_sge.sge = wqe->sg_list[0];
  94. qp->s_sge.sg_list = wqe->sg_list + 1;
  95. qp->s_sge.num_sge = wqe->wr.num_sge;
  96. qp->s_sge.total_len = wqe->length;
  97. len = wqe->length;
  98. qp->s_len = len;
  99. switch (wqe->wr.opcode) {
  100. case IB_WR_SEND:
  101. case IB_WR_SEND_WITH_IMM:
  102. if (len > pmtu) {
  103. qp->s_state = OP(SEND_FIRST);
  104. len = pmtu;
  105. break;
  106. }
  107. if (wqe->wr.opcode == IB_WR_SEND)
  108. qp->s_state = OP(SEND_ONLY);
  109. else {
  110. qp->s_state =
  111. OP(SEND_ONLY_WITH_IMMEDIATE);
  112. /* Immediate data comes after the BTH */
  113. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  114. hwords += 1;
  115. }
  116. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  117. bth0 |= IB_BTH_SOLICITED;
  118. qp->s_wqe = wqe;
  119. if (++qp->s_cur >= qp->s_size)
  120. qp->s_cur = 0;
  121. break;
  122. case IB_WR_RDMA_WRITE:
  123. case IB_WR_RDMA_WRITE_WITH_IMM:
  124. ohdr->u.rc.reth.vaddr =
  125. cpu_to_be64(wqe->rdma_wr.remote_addr);
  126. ohdr->u.rc.reth.rkey =
  127. cpu_to_be32(wqe->rdma_wr.rkey);
  128. ohdr->u.rc.reth.length = cpu_to_be32(len);
  129. hwords += sizeof(struct ib_reth) / 4;
  130. if (len > pmtu) {
  131. qp->s_state = OP(RDMA_WRITE_FIRST);
  132. len = pmtu;
  133. break;
  134. }
  135. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  136. qp->s_state = OP(RDMA_WRITE_ONLY);
  137. else {
  138. qp->s_state =
  139. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  140. /* Immediate data comes after the RETH */
  141. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  142. hwords += 1;
  143. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  144. bth0 |= IB_BTH_SOLICITED;
  145. }
  146. qp->s_wqe = wqe;
  147. if (++qp->s_cur >= qp->s_size)
  148. qp->s_cur = 0;
  149. break;
  150. default:
  151. goto bail;
  152. }
  153. break;
  154. case OP(SEND_FIRST):
  155. qp->s_state = OP(SEND_MIDDLE);
  156. /* FALLTHROUGH */
  157. case OP(SEND_MIDDLE):
  158. len = qp->s_len;
  159. if (len > pmtu) {
  160. len = pmtu;
  161. break;
  162. }
  163. if (wqe->wr.opcode == IB_WR_SEND)
  164. qp->s_state = OP(SEND_LAST);
  165. else {
  166. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  167. /* Immediate data comes after the BTH */
  168. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  169. hwords += 1;
  170. }
  171. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  172. bth0 |= IB_BTH_SOLICITED;
  173. qp->s_wqe = wqe;
  174. if (++qp->s_cur >= qp->s_size)
  175. qp->s_cur = 0;
  176. break;
  177. case OP(RDMA_WRITE_FIRST):
  178. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  179. /* FALLTHROUGH */
  180. case OP(RDMA_WRITE_MIDDLE):
  181. len = qp->s_len;
  182. if (len > pmtu) {
  183. len = pmtu;
  184. break;
  185. }
  186. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  187. qp->s_state = OP(RDMA_WRITE_LAST);
  188. else {
  189. qp->s_state =
  190. OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  191. /* Immediate data comes after the BTH */
  192. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  193. hwords += 1;
  194. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  195. bth0 |= IB_BTH_SOLICITED;
  196. }
  197. qp->s_wqe = wqe;
  198. if (++qp->s_cur >= qp->s_size)
  199. qp->s_cur = 0;
  200. break;
  201. }
  202. qp->s_len -= len;
  203. qp->s_hdrwords = hwords;
  204. qp->s_cur_sge = &qp->s_sge;
  205. qp->s_cur_size = len;
  206. qib_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24),
  207. qp->s_psn++ & QIB_PSN_MASK);
  208. done:
  209. return 1;
  210. bail:
  211. qp->s_flags &= ~RVT_S_BUSY;
  212. return ret;
  213. }
  214. /**
  215. * qib_uc_rcv - handle an incoming UC packet
  216. * @ibp: the port the packet came in on
  217. * @hdr: the header of the packet
  218. * @has_grh: true if the packet has a GRH
  219. * @data: the packet data
  220. * @tlen: the length of the packet
  221. * @qp: the QP for this packet.
  222. *
  223. * This is called from qib_qp_rcv() to process an incoming UC packet
  224. * for the given QP.
  225. * Called at interrupt level.
  226. */
  227. void qib_uc_rcv(struct qib_ibport *ibp, struct ib_header *hdr,
  228. int has_grh, void *data, u32 tlen, struct rvt_qp *qp)
  229. {
  230. struct ib_other_headers *ohdr;
  231. u32 opcode;
  232. u32 hdrsize;
  233. u32 psn;
  234. u32 pad;
  235. struct ib_wc wc;
  236. u32 pmtu = qp->pmtu;
  237. struct ib_reth *reth;
  238. int ret;
  239. /* Check for GRH */
  240. if (!has_grh) {
  241. ohdr = &hdr->u.oth;
  242. hdrsize = 8 + 12; /* LRH + BTH */
  243. } else {
  244. ohdr = &hdr->u.l.oth;
  245. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  246. }
  247. opcode = be32_to_cpu(ohdr->bth[0]);
  248. if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
  249. return;
  250. psn = be32_to_cpu(ohdr->bth[2]);
  251. opcode >>= 24;
  252. /* Compare the PSN verses the expected PSN. */
  253. if (unlikely(qib_cmp24(psn, qp->r_psn) != 0)) {
  254. /*
  255. * Handle a sequence error.
  256. * Silently drop any current message.
  257. */
  258. qp->r_psn = psn;
  259. inv:
  260. if (qp->r_state == OP(SEND_FIRST) ||
  261. qp->r_state == OP(SEND_MIDDLE)) {
  262. set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
  263. qp->r_sge.num_sge = 0;
  264. } else
  265. rvt_put_ss(&qp->r_sge);
  266. qp->r_state = OP(SEND_LAST);
  267. switch (opcode) {
  268. case OP(SEND_FIRST):
  269. case OP(SEND_ONLY):
  270. case OP(SEND_ONLY_WITH_IMMEDIATE):
  271. goto send_first;
  272. case OP(RDMA_WRITE_FIRST):
  273. case OP(RDMA_WRITE_ONLY):
  274. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  275. goto rdma_first;
  276. default:
  277. goto drop;
  278. }
  279. }
  280. /* Check for opcode sequence errors. */
  281. switch (qp->r_state) {
  282. case OP(SEND_FIRST):
  283. case OP(SEND_MIDDLE):
  284. if (opcode == OP(SEND_MIDDLE) ||
  285. opcode == OP(SEND_LAST) ||
  286. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  287. break;
  288. goto inv;
  289. case OP(RDMA_WRITE_FIRST):
  290. case OP(RDMA_WRITE_MIDDLE):
  291. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  292. opcode == OP(RDMA_WRITE_LAST) ||
  293. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  294. break;
  295. goto inv;
  296. default:
  297. if (opcode == OP(SEND_FIRST) ||
  298. opcode == OP(SEND_ONLY) ||
  299. opcode == OP(SEND_ONLY_WITH_IMMEDIATE) ||
  300. opcode == OP(RDMA_WRITE_FIRST) ||
  301. opcode == OP(RDMA_WRITE_ONLY) ||
  302. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  303. break;
  304. goto inv;
  305. }
  306. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST)) {
  307. qp->r_flags |= RVT_R_COMM_EST;
  308. if (qp->ibqp.event_handler) {
  309. struct ib_event ev;
  310. ev.device = qp->ibqp.device;
  311. ev.element.qp = &qp->ibqp;
  312. ev.event = IB_EVENT_COMM_EST;
  313. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  314. }
  315. }
  316. /* OK, process the packet. */
  317. switch (opcode) {
  318. case OP(SEND_FIRST):
  319. case OP(SEND_ONLY):
  320. case OP(SEND_ONLY_WITH_IMMEDIATE):
  321. send_first:
  322. if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags))
  323. qp->r_sge = qp->s_rdma_read_sge;
  324. else {
  325. ret = qib_get_rwqe(qp, 0);
  326. if (ret < 0)
  327. goto op_err;
  328. if (!ret)
  329. goto drop;
  330. /*
  331. * qp->s_rdma_read_sge will be the owner
  332. * of the mr references.
  333. */
  334. qp->s_rdma_read_sge = qp->r_sge;
  335. }
  336. qp->r_rcv_len = 0;
  337. if (opcode == OP(SEND_ONLY))
  338. goto no_immediate_data;
  339. else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
  340. goto send_last_imm;
  341. /* FALLTHROUGH */
  342. case OP(SEND_MIDDLE):
  343. /* Check for invalid length PMTU or posted rwqe len. */
  344. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  345. goto rewind;
  346. qp->r_rcv_len += pmtu;
  347. if (unlikely(qp->r_rcv_len > qp->r_len))
  348. goto rewind;
  349. qib_copy_sge(&qp->r_sge, data, pmtu, 0);
  350. break;
  351. case OP(SEND_LAST_WITH_IMMEDIATE):
  352. send_last_imm:
  353. wc.ex.imm_data = ohdr->u.imm_data;
  354. hdrsize += 4;
  355. wc.wc_flags = IB_WC_WITH_IMM;
  356. goto send_last;
  357. case OP(SEND_LAST):
  358. no_immediate_data:
  359. wc.ex.imm_data = 0;
  360. wc.wc_flags = 0;
  361. send_last:
  362. /* Get the number of bytes the message was padded by. */
  363. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  364. /* Check for invalid length. */
  365. /* XXX LAST len should be >= 1 */
  366. if (unlikely(tlen < (hdrsize + pad + 4)))
  367. goto rewind;
  368. /* Don't count the CRC. */
  369. tlen -= (hdrsize + pad + 4);
  370. wc.byte_len = tlen + qp->r_rcv_len;
  371. if (unlikely(wc.byte_len > qp->r_len))
  372. goto rewind;
  373. wc.opcode = IB_WC_RECV;
  374. qib_copy_sge(&qp->r_sge, data, tlen, 0);
  375. rvt_put_ss(&qp->s_rdma_read_sge);
  376. last_imm:
  377. wc.wr_id = qp->r_wr_id;
  378. wc.status = IB_WC_SUCCESS;
  379. wc.qp = &qp->ibqp;
  380. wc.src_qp = qp->remote_qpn;
  381. wc.slid = qp->remote_ah_attr.dlid;
  382. wc.sl = qp->remote_ah_attr.sl;
  383. /* zero fields that are N/A */
  384. wc.vendor_err = 0;
  385. wc.pkey_index = 0;
  386. wc.dlid_path_bits = 0;
  387. wc.port_num = 0;
  388. /* Signal completion event if the solicited bit is set. */
  389. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  390. (ohdr->bth[0] &
  391. cpu_to_be32(IB_BTH_SOLICITED)) != 0);
  392. break;
  393. case OP(RDMA_WRITE_FIRST):
  394. case OP(RDMA_WRITE_ONLY):
  395. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */
  396. rdma_first:
  397. if (unlikely(!(qp->qp_access_flags &
  398. IB_ACCESS_REMOTE_WRITE))) {
  399. goto drop;
  400. }
  401. reth = &ohdr->u.rc.reth;
  402. hdrsize += sizeof(*reth);
  403. qp->r_len = be32_to_cpu(reth->length);
  404. qp->r_rcv_len = 0;
  405. qp->r_sge.sg_list = NULL;
  406. if (qp->r_len != 0) {
  407. u32 rkey = be32_to_cpu(reth->rkey);
  408. u64 vaddr = be64_to_cpu(reth->vaddr);
  409. int ok;
  410. /* Check rkey */
  411. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len,
  412. vaddr, rkey, IB_ACCESS_REMOTE_WRITE);
  413. if (unlikely(!ok))
  414. goto drop;
  415. qp->r_sge.num_sge = 1;
  416. } else {
  417. qp->r_sge.num_sge = 0;
  418. qp->r_sge.sge.mr = NULL;
  419. qp->r_sge.sge.vaddr = NULL;
  420. qp->r_sge.sge.length = 0;
  421. qp->r_sge.sge.sge_length = 0;
  422. }
  423. if (opcode == OP(RDMA_WRITE_ONLY))
  424. goto rdma_last;
  425. else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
  426. wc.ex.imm_data = ohdr->u.rc.imm_data;
  427. goto rdma_last_imm;
  428. }
  429. /* FALLTHROUGH */
  430. case OP(RDMA_WRITE_MIDDLE):
  431. /* Check for invalid length PMTU or posted rwqe len. */
  432. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  433. goto drop;
  434. qp->r_rcv_len += pmtu;
  435. if (unlikely(qp->r_rcv_len > qp->r_len))
  436. goto drop;
  437. qib_copy_sge(&qp->r_sge, data, pmtu, 1);
  438. break;
  439. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  440. wc.ex.imm_data = ohdr->u.imm_data;
  441. rdma_last_imm:
  442. hdrsize += 4;
  443. wc.wc_flags = IB_WC_WITH_IMM;
  444. /* Get the number of bytes the message was padded by. */
  445. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  446. /* Check for invalid length. */
  447. /* XXX LAST len should be >= 1 */
  448. if (unlikely(tlen < (hdrsize + pad + 4)))
  449. goto drop;
  450. /* Don't count the CRC. */
  451. tlen -= (hdrsize + pad + 4);
  452. if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
  453. goto drop;
  454. if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags))
  455. rvt_put_ss(&qp->s_rdma_read_sge);
  456. else {
  457. ret = qib_get_rwqe(qp, 1);
  458. if (ret < 0)
  459. goto op_err;
  460. if (!ret)
  461. goto drop;
  462. }
  463. wc.byte_len = qp->r_len;
  464. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  465. qib_copy_sge(&qp->r_sge, data, tlen, 1);
  466. rvt_put_ss(&qp->r_sge);
  467. goto last_imm;
  468. case OP(RDMA_WRITE_LAST):
  469. rdma_last:
  470. /* Get the number of bytes the message was padded by. */
  471. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  472. /* Check for invalid length. */
  473. /* XXX LAST len should be >= 1 */
  474. if (unlikely(tlen < (hdrsize + pad + 4)))
  475. goto drop;
  476. /* Don't count the CRC. */
  477. tlen -= (hdrsize + pad + 4);
  478. if (unlikely(tlen + qp->r_rcv_len != qp->r_len))
  479. goto drop;
  480. qib_copy_sge(&qp->r_sge, data, tlen, 1);
  481. rvt_put_ss(&qp->r_sge);
  482. break;
  483. default:
  484. /* Drop packet for unknown opcodes. */
  485. goto drop;
  486. }
  487. qp->r_psn++;
  488. qp->r_state = opcode;
  489. return;
  490. rewind:
  491. set_bit(RVT_R_REWIND_SGE, &qp->r_aflags);
  492. qp->r_sge.num_sge = 0;
  493. drop:
  494. ibp->rvp.n_pkt_drops++;
  495. return;
  496. op_err:
  497. qib_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  498. return;
  499. }