mad.c 17 KB

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  1. /*
  2. * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/mlx5/cmd.h>
  33. #include <linux/mlx5/vport.h>
  34. #include <rdma/ib_mad.h>
  35. #include <rdma/ib_smi.h>
  36. #include <rdma/ib_pma.h>
  37. #include "mlx5_ib.h"
  38. enum {
  39. MLX5_IB_VENDOR_CLASS1 = 0x9,
  40. MLX5_IB_VENDOR_CLASS2 = 0xa
  41. };
  42. int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
  43. u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  44. const void *in_mad, void *response_mad)
  45. {
  46. u8 op_modifier = 0;
  47. /* Key check traps can't be generated unless we have in_wc to
  48. * tell us where to send the trap.
  49. */
  50. if (ignore_mkey || !in_wc)
  51. op_modifier |= 0x1;
  52. if (ignore_bkey || !in_wc)
  53. op_modifier |= 0x2;
  54. return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
  55. }
  56. static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  57. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  58. const struct ib_mad *in_mad, struct ib_mad *out_mad)
  59. {
  60. u16 slid;
  61. int err;
  62. slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
  63. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
  64. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  65. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  66. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
  67. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  68. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
  69. in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
  70. return IB_MAD_RESULT_SUCCESS;
  71. /* Don't process SMInfo queries -- the SMA can't handle them.
  72. */
  73. if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
  74. return IB_MAD_RESULT_SUCCESS;
  75. } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
  76. in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
  77. in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
  78. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
  79. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  80. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
  81. return IB_MAD_RESULT_SUCCESS;
  82. } else {
  83. return IB_MAD_RESULT_SUCCESS;
  84. }
  85. err = mlx5_MAD_IFC(to_mdev(ibdev),
  86. mad_flags & IB_MAD_IGNORE_MKEY,
  87. mad_flags & IB_MAD_IGNORE_BKEY,
  88. port_num, in_wc, in_grh, in_mad, out_mad);
  89. if (err)
  90. return IB_MAD_RESULT_FAILURE;
  91. /* set return bit in status of directed route responses */
  92. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  93. out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
  94. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
  95. /* no response for trap repress */
  96. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  97. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  98. }
  99. static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
  100. void *out)
  101. {
  102. #define MLX5_SUM_CNT(p, cntr1, cntr2) \
  103. (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
  104. MLX5_GET64(query_vport_counter_out, p, cntr2))
  105. pma_cnt_ext->port_xmit_data =
  106. cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
  107. transmitted_ib_multicast.octets) >> 2);
  108. pma_cnt_ext->port_rcv_data =
  109. cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
  110. received_ib_multicast.octets) >> 2);
  111. pma_cnt_ext->port_xmit_packets =
  112. cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
  113. transmitted_ib_multicast.packets));
  114. pma_cnt_ext->port_rcv_packets =
  115. cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
  116. received_ib_multicast.packets));
  117. pma_cnt_ext->port_unicast_xmit_packets =
  118. MLX5_GET64_BE(query_vport_counter_out,
  119. out, transmitted_ib_unicast.packets);
  120. pma_cnt_ext->port_unicast_rcv_packets =
  121. MLX5_GET64_BE(query_vport_counter_out,
  122. out, received_ib_unicast.packets);
  123. pma_cnt_ext->port_multicast_xmit_packets =
  124. MLX5_GET64_BE(query_vport_counter_out,
  125. out, transmitted_ib_multicast.packets);
  126. pma_cnt_ext->port_multicast_rcv_packets =
  127. MLX5_GET64_BE(query_vport_counter_out,
  128. out, received_ib_multicast.packets);
  129. }
  130. static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
  131. void *out)
  132. {
  133. /* Traffic counters will be reported in
  134. * their 64bit form via ib_pma_portcounters_ext by default.
  135. */
  136. void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
  137. counter_set);
  138. #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
  139. counter_var = MLX5_GET_BE(typeof(counter_var), \
  140. ib_port_cntrs_grp_data_layout, \
  141. out_pma, counter_name); \
  142. }
  143. MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
  144. symbol_error_counter);
  145. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
  146. link_error_recovery_counter);
  147. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
  148. link_downed_counter);
  149. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
  150. port_rcv_errors);
  151. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
  152. port_rcv_remote_physical_errors);
  153. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
  154. port_rcv_switch_relay_errors);
  155. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
  156. port_xmit_discards);
  157. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
  158. port_xmit_constraint_errors);
  159. MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
  160. port_rcv_constraint_errors);
  161. MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
  162. link_overrun_errors);
  163. MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
  164. vl_15_dropped);
  165. }
  166. static int process_pma_cmd(struct ib_device *ibdev, u8 port_num,
  167. const struct ib_mad *in_mad, struct ib_mad *out_mad)
  168. {
  169. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  170. int err;
  171. void *out_cnt;
  172. /* Decalring support of extended counters */
  173. if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
  174. struct ib_class_port_info cpi = {};
  175. cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
  176. memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
  177. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  178. }
  179. if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
  180. struct ib_pma_portcounters_ext *pma_cnt_ext =
  181. (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
  182. int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
  183. out_cnt = mlx5_vzalloc(sz);
  184. if (!out_cnt)
  185. return IB_MAD_RESULT_FAILURE;
  186. err = mlx5_core_query_vport_counter(dev->mdev, 0, 0,
  187. port_num, out_cnt, sz);
  188. if (!err)
  189. pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
  190. } else {
  191. struct ib_pma_portcounters *pma_cnt =
  192. (struct ib_pma_portcounters *)(out_mad->data + 40);
  193. int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
  194. out_cnt = mlx5_vzalloc(sz);
  195. if (!out_cnt)
  196. return IB_MAD_RESULT_FAILURE;
  197. err = mlx5_core_query_ib_ppcnt(dev->mdev, port_num,
  198. out_cnt, sz);
  199. if (!err)
  200. pma_cnt_assign(pma_cnt, out_cnt);
  201. }
  202. kvfree(out_cnt);
  203. if (err)
  204. return IB_MAD_RESULT_FAILURE;
  205. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  206. }
  207. int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  208. const struct ib_wc *in_wc, const struct ib_grh *in_grh,
  209. const struct ib_mad_hdr *in, size_t in_mad_size,
  210. struct ib_mad_hdr *out, size_t *out_mad_size,
  211. u16 *out_mad_pkey_index)
  212. {
  213. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  214. struct mlx5_core_dev *mdev = dev->mdev;
  215. const struct ib_mad *in_mad = (const struct ib_mad *)in;
  216. struct ib_mad *out_mad = (struct ib_mad *)out;
  217. if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
  218. *out_mad_size != sizeof(*out_mad)))
  219. return IB_MAD_RESULT_FAILURE;
  220. memset(out_mad->data, 0, sizeof(out_mad->data));
  221. if (MLX5_CAP_GEN(mdev, vport_counters) &&
  222. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
  223. in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
  224. return process_pma_cmd(ibdev, port_num, in_mad, out_mad);
  225. } else {
  226. return process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
  227. in_mad, out_mad);
  228. }
  229. }
  230. int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
  231. {
  232. struct ib_smp *in_mad = NULL;
  233. struct ib_smp *out_mad = NULL;
  234. int err = -ENOMEM;
  235. u16 packet_error;
  236. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  237. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  238. if (!in_mad || !out_mad)
  239. goto out;
  240. init_query_mad(in_mad);
  241. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  242. in_mad->attr_mod = cpu_to_be32(port);
  243. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  244. packet_error = be16_to_cpu(out_mad->status);
  245. dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
  246. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
  247. out:
  248. kfree(in_mad);
  249. kfree(out_mad);
  250. return err;
  251. }
  252. int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
  253. struct ib_smp *out_mad)
  254. {
  255. struct ib_smp *in_mad = NULL;
  256. int err = -ENOMEM;
  257. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  258. if (!in_mad)
  259. return -ENOMEM;
  260. init_query_mad(in_mad);
  261. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  262. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
  263. out_mad);
  264. kfree(in_mad);
  265. return err;
  266. }
  267. int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
  268. __be64 *sys_image_guid)
  269. {
  270. struct ib_smp *out_mad = NULL;
  271. int err = -ENOMEM;
  272. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  273. if (!out_mad)
  274. return -ENOMEM;
  275. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  276. if (err)
  277. goto out;
  278. memcpy(sys_image_guid, out_mad->data + 4, 8);
  279. out:
  280. kfree(out_mad);
  281. return err;
  282. }
  283. int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
  284. u16 *max_pkeys)
  285. {
  286. struct ib_smp *out_mad = NULL;
  287. int err = -ENOMEM;
  288. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  289. if (!out_mad)
  290. return -ENOMEM;
  291. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  292. if (err)
  293. goto out;
  294. *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
  295. out:
  296. kfree(out_mad);
  297. return err;
  298. }
  299. int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
  300. u32 *vendor_id)
  301. {
  302. struct ib_smp *out_mad = NULL;
  303. int err = -ENOMEM;
  304. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  305. if (!out_mad)
  306. return -ENOMEM;
  307. err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
  308. if (err)
  309. goto out;
  310. *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
  311. out:
  312. kfree(out_mad);
  313. return err;
  314. }
  315. int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
  316. {
  317. struct ib_smp *in_mad = NULL;
  318. struct ib_smp *out_mad = NULL;
  319. int err = -ENOMEM;
  320. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  321. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  322. if (!in_mad || !out_mad)
  323. goto out;
  324. init_query_mad(in_mad);
  325. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  326. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  327. if (err)
  328. goto out;
  329. memcpy(node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
  330. out:
  331. kfree(in_mad);
  332. kfree(out_mad);
  333. return err;
  334. }
  335. int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
  336. {
  337. struct ib_smp *in_mad = NULL;
  338. struct ib_smp *out_mad = NULL;
  339. int err = -ENOMEM;
  340. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  341. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  342. if (!in_mad || !out_mad)
  343. goto out;
  344. init_query_mad(in_mad);
  345. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  346. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  347. if (err)
  348. goto out;
  349. memcpy(node_guid, out_mad->data + 12, 8);
  350. out:
  351. kfree(in_mad);
  352. kfree(out_mad);
  353. return err;
  354. }
  355. int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
  356. u16 *pkey)
  357. {
  358. struct ib_smp *in_mad = NULL;
  359. struct ib_smp *out_mad = NULL;
  360. int err = -ENOMEM;
  361. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  362. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  363. if (!in_mad || !out_mad)
  364. goto out;
  365. init_query_mad(in_mad);
  366. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  367. in_mad->attr_mod = cpu_to_be32(index / 32);
  368. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  369. out_mad);
  370. if (err)
  371. goto out;
  372. *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
  373. out:
  374. kfree(in_mad);
  375. kfree(out_mad);
  376. return err;
  377. }
  378. int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
  379. union ib_gid *gid)
  380. {
  381. struct ib_smp *in_mad = NULL;
  382. struct ib_smp *out_mad = NULL;
  383. int err = -ENOMEM;
  384. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  385. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  386. if (!in_mad || !out_mad)
  387. goto out;
  388. init_query_mad(in_mad);
  389. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  390. in_mad->attr_mod = cpu_to_be32(port);
  391. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  392. out_mad);
  393. if (err)
  394. goto out;
  395. memcpy(gid->raw, out_mad->data + 8, 8);
  396. init_query_mad(in_mad);
  397. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  398. in_mad->attr_mod = cpu_to_be32(index / 8);
  399. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
  400. out_mad);
  401. if (err)
  402. goto out;
  403. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  404. out:
  405. kfree(in_mad);
  406. kfree(out_mad);
  407. return err;
  408. }
  409. int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
  410. struct ib_port_attr *props)
  411. {
  412. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  413. struct mlx5_core_dev *mdev = dev->mdev;
  414. struct ib_smp *in_mad = NULL;
  415. struct ib_smp *out_mad = NULL;
  416. int ext_active_speed;
  417. int err = -ENOMEM;
  418. if (port < 1 || port > MLX5_CAP_GEN(mdev, num_ports)) {
  419. mlx5_ib_warn(dev, "invalid port number %d\n", port);
  420. return -EINVAL;
  421. }
  422. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  423. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  424. if (!in_mad || !out_mad)
  425. goto out;
  426. memset(props, 0, sizeof(*props));
  427. init_query_mad(in_mad);
  428. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  429. in_mad->attr_mod = cpu_to_be32(port);
  430. err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
  431. if (err) {
  432. mlx5_ib_warn(dev, "err %d\n", err);
  433. goto out;
  434. }
  435. props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
  436. props->lmc = out_mad->data[34] & 0x7;
  437. props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
  438. props->sm_sl = out_mad->data[36] & 0xf;
  439. props->state = out_mad->data[32] & 0xf;
  440. props->phys_state = out_mad->data[33] >> 4;
  441. props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
  442. props->gid_tbl_len = out_mad->data[50];
  443. props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
  444. props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
  445. props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
  446. props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
  447. props->active_width = out_mad->data[31] & 0xf;
  448. props->active_speed = out_mad->data[35] >> 4;
  449. props->max_mtu = out_mad->data[41] & 0xf;
  450. props->active_mtu = out_mad->data[36] >> 4;
  451. props->subnet_timeout = out_mad->data[51] & 0x1f;
  452. props->max_vl_num = out_mad->data[37] >> 4;
  453. props->init_type_reply = out_mad->data[41] >> 4;
  454. /* Check if extended speeds (EDR/FDR/...) are supported */
  455. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  456. ext_active_speed = out_mad->data[62] >> 4;
  457. switch (ext_active_speed) {
  458. case 1:
  459. props->active_speed = 16; /* FDR */
  460. break;
  461. case 2:
  462. props->active_speed = 32; /* EDR */
  463. break;
  464. }
  465. }
  466. /* If reported active speed is QDR, check if is FDR-10 */
  467. if (props->active_speed == 4) {
  468. if (mdev->port_caps[port - 1].ext_port_cap &
  469. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
  470. init_query_mad(in_mad);
  471. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  472. in_mad->attr_mod = cpu_to_be32(port);
  473. err = mlx5_MAD_IFC(dev, 1, 1, port,
  474. NULL, NULL, in_mad, out_mad);
  475. if (err)
  476. goto out;
  477. /* Checking LinkSpeedActive for FDR-10 */
  478. if (out_mad->data[15] & 0x1)
  479. props->active_speed = 8;
  480. }
  481. }
  482. out:
  483. kfree(in_mad);
  484. kfree(out_mad);
  485. return err;
  486. }