pci_clp.c 13 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. */
  7. #define KMSG_COMPONENT "zpci"
  8. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  9. #include <linux/compat.h>
  10. #include <linux/kernel.h>
  11. #include <linux/miscdevice.h>
  12. #include <linux/slab.h>
  13. #include <linux/err.h>
  14. #include <linux/delay.h>
  15. #include <linux/pci.h>
  16. #include <linux/uaccess.h>
  17. #include <asm/pci_debug.h>
  18. #include <asm/pci_clp.h>
  19. #include <asm/compat.h>
  20. #include <asm/clp.h>
  21. #include <uapi/asm/clp.h>
  22. static inline void zpci_err_clp(unsigned int rsp, int rc)
  23. {
  24. struct {
  25. unsigned int rsp;
  26. int rc;
  27. } __packed data = {rsp, rc};
  28. zpci_err_hex(&data, sizeof(data));
  29. }
  30. /*
  31. * Call Logical Processor with c=1, lps=0 and command 1
  32. * to get the bit mask of installed logical processors
  33. */
  34. static inline int clp_get_ilp(unsigned long *ilp)
  35. {
  36. unsigned long mask;
  37. int cc = 3;
  38. asm volatile (
  39. " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
  40. "0: ipm %[cc]\n"
  41. " srl %[cc],28\n"
  42. "1:\n"
  43. EX_TABLE(0b, 1b)
  44. : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
  45. : "cc");
  46. *ilp = mask;
  47. return cc;
  48. }
  49. /*
  50. * Call Logical Processor with c=0, the give constant lps and an lpcb request.
  51. */
  52. static inline int clp_req(void *data, unsigned int lps)
  53. {
  54. struct { u8 _[CLP_BLK_SIZE]; } *req = data;
  55. u64 ignored;
  56. int cc = 3;
  57. asm volatile (
  58. " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
  59. "0: ipm %[cc]\n"
  60. " srl %[cc],28\n"
  61. "1:\n"
  62. EX_TABLE(0b, 1b)
  63. : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
  64. : [req] "a" (req), [lps] "i" (lps)
  65. : "cc");
  66. return cc;
  67. }
  68. static void *clp_alloc_block(gfp_t gfp_mask)
  69. {
  70. return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
  71. }
  72. static void clp_free_block(void *ptr)
  73. {
  74. free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
  75. }
  76. static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
  77. struct clp_rsp_query_pci_grp *response)
  78. {
  79. zdev->tlb_refresh = response->refresh;
  80. zdev->dma_mask = response->dasm;
  81. zdev->msi_addr = response->msia;
  82. zdev->max_msi = response->noi;
  83. zdev->fmb_update = response->mui;
  84. switch (response->version) {
  85. case 1:
  86. zdev->max_bus_speed = PCIE_SPEED_5_0GT;
  87. break;
  88. default:
  89. zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
  90. break;
  91. }
  92. }
  93. static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
  94. {
  95. struct clp_req_rsp_query_pci_grp *rrb;
  96. int rc;
  97. rrb = clp_alloc_block(GFP_KERNEL);
  98. if (!rrb)
  99. return -ENOMEM;
  100. memset(rrb, 0, sizeof(*rrb));
  101. rrb->request.hdr.len = sizeof(rrb->request);
  102. rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
  103. rrb->response.hdr.len = sizeof(rrb->response);
  104. rrb->request.pfgid = pfgid;
  105. rc = clp_req(rrb, CLP_LPS_PCI);
  106. if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
  107. clp_store_query_pci_fngrp(zdev, &rrb->response);
  108. else {
  109. zpci_err("Q PCI FGRP:\n");
  110. zpci_err_clp(rrb->response.hdr.rsp, rc);
  111. rc = -EIO;
  112. }
  113. clp_free_block(rrb);
  114. return rc;
  115. }
  116. static int clp_store_query_pci_fn(struct zpci_dev *zdev,
  117. struct clp_rsp_query_pci *response)
  118. {
  119. int i;
  120. for (i = 0; i < PCI_BAR_COUNT; i++) {
  121. zdev->bars[i].val = le32_to_cpu(response->bar[i]);
  122. zdev->bars[i].size = response->bar_size[i];
  123. }
  124. zdev->start_dma = response->sdma;
  125. zdev->end_dma = response->edma;
  126. zdev->pchid = response->pchid;
  127. zdev->pfgid = response->pfgid;
  128. zdev->pft = response->pft;
  129. zdev->vfn = response->vfn;
  130. zdev->uid = response->uid;
  131. memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
  132. if (response->util_str_avail) {
  133. memcpy(zdev->util_str, response->util_str,
  134. sizeof(zdev->util_str));
  135. }
  136. return 0;
  137. }
  138. static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
  139. {
  140. struct clp_req_rsp_query_pci *rrb;
  141. int rc;
  142. rrb = clp_alloc_block(GFP_KERNEL);
  143. if (!rrb)
  144. return -ENOMEM;
  145. memset(rrb, 0, sizeof(*rrb));
  146. rrb->request.hdr.len = sizeof(rrb->request);
  147. rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
  148. rrb->response.hdr.len = sizeof(rrb->response);
  149. rrb->request.fh = fh;
  150. rc = clp_req(rrb, CLP_LPS_PCI);
  151. if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
  152. rc = clp_store_query_pci_fn(zdev, &rrb->response);
  153. if (rc)
  154. goto out;
  155. rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
  156. } else {
  157. zpci_err("Q PCI FN:\n");
  158. zpci_err_clp(rrb->response.hdr.rsp, rc);
  159. rc = -EIO;
  160. }
  161. out:
  162. clp_free_block(rrb);
  163. return rc;
  164. }
  165. int clp_add_pci_device(u32 fid, u32 fh, int configured)
  166. {
  167. struct zpci_dev *zdev;
  168. int rc;
  169. zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
  170. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  171. if (!zdev)
  172. return -ENOMEM;
  173. zdev->fh = fh;
  174. zdev->fid = fid;
  175. /* Query function properties and update zdev */
  176. rc = clp_query_pci_fn(zdev, fh);
  177. if (rc)
  178. goto error;
  179. if (configured)
  180. zdev->state = ZPCI_FN_STATE_CONFIGURED;
  181. else
  182. zdev->state = ZPCI_FN_STATE_STANDBY;
  183. rc = zpci_create_device(zdev);
  184. if (rc)
  185. goto error;
  186. return 0;
  187. error:
  188. kfree(zdev);
  189. return rc;
  190. }
  191. /*
  192. * Enable/Disable a given PCI function defined by its function handle.
  193. */
  194. static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
  195. {
  196. struct clp_req_rsp_set_pci *rrb;
  197. int rc, retries = 100;
  198. rrb = clp_alloc_block(GFP_KERNEL);
  199. if (!rrb)
  200. return -ENOMEM;
  201. do {
  202. memset(rrb, 0, sizeof(*rrb));
  203. rrb->request.hdr.len = sizeof(rrb->request);
  204. rrb->request.hdr.cmd = CLP_SET_PCI_FN;
  205. rrb->response.hdr.len = sizeof(rrb->response);
  206. rrb->request.fh = *fh;
  207. rrb->request.oc = command;
  208. rrb->request.ndas = nr_dma_as;
  209. rc = clp_req(rrb, CLP_LPS_PCI);
  210. if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
  211. retries--;
  212. if (retries < 0)
  213. break;
  214. msleep(20);
  215. }
  216. } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
  217. if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
  218. *fh = rrb->response.fh;
  219. else {
  220. zpci_err("Set PCI FN:\n");
  221. zpci_err_clp(rrb->response.hdr.rsp, rc);
  222. rc = -EIO;
  223. }
  224. clp_free_block(rrb);
  225. return rc;
  226. }
  227. int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
  228. {
  229. u32 fh = zdev->fh;
  230. int rc;
  231. rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
  232. if (!rc)
  233. /* Success -> store enabled handle in zdev */
  234. zdev->fh = fh;
  235. zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
  236. return rc;
  237. }
  238. int clp_disable_fh(struct zpci_dev *zdev)
  239. {
  240. u32 fh = zdev->fh;
  241. int rc;
  242. if (!zdev_enabled(zdev))
  243. return 0;
  244. rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
  245. if (!rc)
  246. /* Success -> store disabled handle in zdev */
  247. zdev->fh = fh;
  248. zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
  249. return rc;
  250. }
  251. static int clp_list_pci(struct clp_req_rsp_list_pci *rrb,
  252. void (*cb)(struct clp_fh_list_entry *entry))
  253. {
  254. u64 resume_token = 0;
  255. int entries, i, rc;
  256. do {
  257. memset(rrb, 0, sizeof(*rrb));
  258. rrb->request.hdr.len = sizeof(rrb->request);
  259. rrb->request.hdr.cmd = CLP_LIST_PCI;
  260. /* store as many entries as possible */
  261. rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
  262. rrb->request.resume_token = resume_token;
  263. /* Get PCI function handle list */
  264. rc = clp_req(rrb, CLP_LPS_PCI);
  265. if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
  266. zpci_err("List PCI FN:\n");
  267. zpci_err_clp(rrb->response.hdr.rsp, rc);
  268. rc = -EIO;
  269. goto out;
  270. }
  271. WARN_ON_ONCE(rrb->response.entry_size !=
  272. sizeof(struct clp_fh_list_entry));
  273. entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
  274. rrb->response.entry_size;
  275. resume_token = rrb->response.resume_token;
  276. for (i = 0; i < entries; i++)
  277. cb(&rrb->response.fh_list[i]);
  278. } while (resume_token);
  279. out:
  280. return rc;
  281. }
  282. static void __clp_add(struct clp_fh_list_entry *entry)
  283. {
  284. if (!entry->vendor_id)
  285. return;
  286. clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
  287. }
  288. static void __clp_rescan(struct clp_fh_list_entry *entry)
  289. {
  290. struct zpci_dev *zdev;
  291. if (!entry->vendor_id)
  292. return;
  293. zdev = get_zdev_by_fid(entry->fid);
  294. if (!zdev) {
  295. clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
  296. return;
  297. }
  298. if (!entry->config_state) {
  299. /*
  300. * The handle is already disabled, that means no iota/irq freeing via
  301. * the firmware interfaces anymore. Need to free resources manually
  302. * (DMA memory, debug, sysfs)...
  303. */
  304. zpci_stop_device(zdev);
  305. }
  306. }
  307. static void __clp_update(struct clp_fh_list_entry *entry)
  308. {
  309. struct zpci_dev *zdev;
  310. if (!entry->vendor_id)
  311. return;
  312. zdev = get_zdev_by_fid(entry->fid);
  313. if (!zdev)
  314. return;
  315. zdev->fh = entry->fh;
  316. }
  317. int clp_scan_pci_devices(void)
  318. {
  319. struct clp_req_rsp_list_pci *rrb;
  320. int rc;
  321. rrb = clp_alloc_block(GFP_KERNEL);
  322. if (!rrb)
  323. return -ENOMEM;
  324. rc = clp_list_pci(rrb, __clp_add);
  325. clp_free_block(rrb);
  326. return rc;
  327. }
  328. int clp_rescan_pci_devices(void)
  329. {
  330. struct clp_req_rsp_list_pci *rrb;
  331. int rc;
  332. rrb = clp_alloc_block(GFP_KERNEL);
  333. if (!rrb)
  334. return -ENOMEM;
  335. rc = clp_list_pci(rrb, __clp_rescan);
  336. clp_free_block(rrb);
  337. return rc;
  338. }
  339. int clp_rescan_pci_devices_simple(void)
  340. {
  341. struct clp_req_rsp_list_pci *rrb;
  342. int rc;
  343. rrb = clp_alloc_block(GFP_NOWAIT);
  344. if (!rrb)
  345. return -ENOMEM;
  346. rc = clp_list_pci(rrb, __clp_update);
  347. clp_free_block(rrb);
  348. return rc;
  349. }
  350. static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
  351. {
  352. unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
  353. if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
  354. lpcb->response.hdr.len > limit)
  355. return -EINVAL;
  356. return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
  357. }
  358. static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
  359. {
  360. switch (lpcb->cmd) {
  361. case 0x0001: /* store logical-processor characteristics */
  362. return clp_base_slpc(req, (void *) lpcb);
  363. default:
  364. return -EINVAL;
  365. }
  366. }
  367. static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
  368. {
  369. unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
  370. if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
  371. lpcb->response.hdr.len > limit)
  372. return -EINVAL;
  373. return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
  374. }
  375. static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
  376. {
  377. unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
  378. if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
  379. lpcb->response.hdr.len > limit)
  380. return -EINVAL;
  381. if (lpcb->request.reserved2 != 0)
  382. return -EINVAL;
  383. return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
  384. }
  385. static int clp_pci_query(struct clp_req *req,
  386. struct clp_req_rsp_query_pci *lpcb)
  387. {
  388. unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
  389. if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
  390. lpcb->response.hdr.len > limit)
  391. return -EINVAL;
  392. if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
  393. return -EINVAL;
  394. return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
  395. }
  396. static int clp_pci_query_grp(struct clp_req *req,
  397. struct clp_req_rsp_query_pci_grp *lpcb)
  398. {
  399. unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
  400. if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
  401. lpcb->response.hdr.len > limit)
  402. return -EINVAL;
  403. if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
  404. lpcb->request.reserved4 != 0)
  405. return -EINVAL;
  406. return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
  407. }
  408. static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
  409. {
  410. switch (lpcb->cmd) {
  411. case 0x0001: /* store logical-processor characteristics */
  412. return clp_pci_slpc(req, (void *) lpcb);
  413. case 0x0002: /* list PCI functions */
  414. return clp_pci_list(req, (void *) lpcb);
  415. case 0x0003: /* query PCI function */
  416. return clp_pci_query(req, (void *) lpcb);
  417. case 0x0004: /* query PCI function group */
  418. return clp_pci_query_grp(req, (void *) lpcb);
  419. default:
  420. return -EINVAL;
  421. }
  422. }
  423. static int clp_normal_command(struct clp_req *req)
  424. {
  425. struct clp_req_hdr *lpcb;
  426. void __user *uptr;
  427. int rc;
  428. rc = -EINVAL;
  429. if (req->lps != 0 && req->lps != 2)
  430. goto out;
  431. rc = -ENOMEM;
  432. lpcb = clp_alloc_block(GFP_KERNEL);
  433. if (!lpcb)
  434. goto out;
  435. rc = -EFAULT;
  436. uptr = (void __force __user *)(unsigned long) req->data_p;
  437. if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
  438. goto out_free;
  439. rc = -EINVAL;
  440. if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
  441. goto out_free;
  442. switch (req->lps) {
  443. case 0:
  444. rc = clp_base_command(req, lpcb);
  445. break;
  446. case 2:
  447. rc = clp_pci_command(req, lpcb);
  448. break;
  449. }
  450. if (rc)
  451. goto out_free;
  452. rc = -EFAULT;
  453. if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
  454. goto out_free;
  455. rc = 0;
  456. out_free:
  457. clp_free_block(lpcb);
  458. out:
  459. return rc;
  460. }
  461. static int clp_immediate_command(struct clp_req *req)
  462. {
  463. void __user *uptr;
  464. unsigned long ilp;
  465. int exists;
  466. if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
  467. return -EINVAL;
  468. uptr = (void __force __user *)(unsigned long) req->data_p;
  469. if (req->cmd == 0) {
  470. /* Command code 0: test for a specific processor */
  471. exists = test_bit_inv(req->lps, &ilp);
  472. return put_user(exists, (int __user *) uptr);
  473. }
  474. /* Command code 1: return bit mask of installed processors */
  475. return put_user(ilp, (unsigned long __user *) uptr);
  476. }
  477. static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
  478. unsigned long arg)
  479. {
  480. struct clp_req req;
  481. void __user *argp;
  482. if (cmd != CLP_SYNC)
  483. return -EINVAL;
  484. argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
  485. if (copy_from_user(&req, argp, sizeof(req)))
  486. return -EFAULT;
  487. if (req.r != 0)
  488. return -EINVAL;
  489. return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
  490. }
  491. static int clp_misc_release(struct inode *inode, struct file *filp)
  492. {
  493. return 0;
  494. }
  495. static const struct file_operations clp_misc_fops = {
  496. .owner = THIS_MODULE,
  497. .open = nonseekable_open,
  498. .release = clp_misc_release,
  499. .unlocked_ioctl = clp_misc_ioctl,
  500. .compat_ioctl = clp_misc_ioctl,
  501. .llseek = no_llseek,
  502. };
  503. static struct miscdevice clp_misc_device = {
  504. .minor = MISC_DYNAMIC_MINOR,
  505. .name = "clp",
  506. .fops = &clp_misc_fops,
  507. };
  508. static int __init clp_misc_init(void)
  509. {
  510. return misc_register(&clp_misc_device);
  511. }
  512. device_initcall(clp_misc_init);