rtc_xicor1241.c 5.2 KB

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  1. /*
  2. * Copyright (C) 2000, 2001 Broadcom Corporation
  3. *
  4. * Copyright (C) 2002 MontaVista Software Inc.
  5. * Author: jsun@mvista.com or jsun@junsun.net
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/bcd.h>
  13. #include <linux/types.h>
  14. #include <linux/time.h>
  15. #include <asm/time.h>
  16. #include <asm/addrspace.h>
  17. #include <asm/io.h>
  18. #include <asm/sibyte/sb1250.h>
  19. #include <asm/sibyte/sb1250_regs.h>
  20. #include <asm/sibyte/sb1250_smbus.h>
  21. /* Xicor 1241 definitions */
  22. /*
  23. * Register bits
  24. */
  25. #define X1241REG_SR_BAT 0x80 /* currently on battery power */
  26. #define X1241REG_SR_RWEL 0x04 /* r/w latch is enabled, can write RTC */
  27. #define X1241REG_SR_WEL 0x02 /* r/w latch is unlocked, can enable r/w now */
  28. #define X1241REG_SR_RTCF 0x01 /* clock failed */
  29. #define X1241REG_BL_BP2 0x80 /* block protect 2 */
  30. #define X1241REG_BL_BP1 0x40 /* block protect 1 */
  31. #define X1241REG_BL_BP0 0x20 /* block protect 0 */
  32. #define X1241REG_BL_WD1 0x10
  33. #define X1241REG_BL_WD0 0x08
  34. #define X1241REG_HR_MIL 0x80 /* military time format */
  35. /*
  36. * Register numbers
  37. */
  38. #define X1241REG_BL 0x10 /* block protect bits */
  39. #define X1241REG_INT 0x11 /* */
  40. #define X1241REG_SC 0x30 /* Seconds */
  41. #define X1241REG_MN 0x31 /* Minutes */
  42. #define X1241REG_HR 0x32 /* Hours */
  43. #define X1241REG_DT 0x33 /* Day of month */
  44. #define X1241REG_MO 0x34 /* Month */
  45. #define X1241REG_YR 0x35 /* Year */
  46. #define X1241REG_DW 0x36 /* Day of Week */
  47. #define X1241REG_Y2K 0x37 /* Year 2K */
  48. #define X1241REG_SR 0x3F /* Status register */
  49. #define X1241_CCR_ADDRESS 0x6F
  50. #define SMB_CSR(reg) IOADDR(A_SMB_REGISTER(1, reg))
  51. static int xicor_read(uint8_t addr)
  52. {
  53. while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
  54. ;
  55. __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
  56. __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
  57. __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
  58. SMB_CSR(R_SMB_START));
  59. while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
  60. ;
  61. __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
  62. SMB_CSR(R_SMB_START));
  63. while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
  64. ;
  65. if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
  66. /* Clear error bit by writing a 1 */
  67. __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
  68. return -1;
  69. }
  70. return __raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff;
  71. }
  72. static int xicor_write(uint8_t addr, int b)
  73. {
  74. while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
  75. ;
  76. __raw_writeq(addr, SMB_CSR(R_SMB_CMD));
  77. __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
  78. __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
  79. SMB_CSR(R_SMB_START));
  80. while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
  81. ;
  82. if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
  83. /* Clear error bit by writing a 1 */
  84. __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
  85. return -1;
  86. } else {
  87. return 0;
  88. }
  89. }
  90. int xicor_set_time(unsigned long t)
  91. {
  92. struct rtc_time tm;
  93. int tmp;
  94. unsigned long flags;
  95. rtc_time_to_tm(t, &tm);
  96. tm.tm_year += 1900;
  97. spin_lock_irqsave(&rtc_lock, flags);
  98. /* unlock writes to the CCR */
  99. xicor_write(X1241REG_SR, X1241REG_SR_WEL);
  100. xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL);
  101. /* trivial ones */
  102. tm.tm_sec = bin2bcd(tm.tm_sec);
  103. xicor_write(X1241REG_SC, tm.tm_sec);
  104. tm.tm_min = bin2bcd(tm.tm_min);
  105. xicor_write(X1241REG_MN, tm.tm_min);
  106. tm.tm_mday = bin2bcd(tm.tm_mday);
  107. xicor_write(X1241REG_DT, tm.tm_mday);
  108. /* tm_mon starts from 0, *ick* */
  109. tm.tm_mon ++;
  110. tm.tm_mon = bin2bcd(tm.tm_mon);
  111. xicor_write(X1241REG_MO, tm.tm_mon);
  112. /* year is split */
  113. tmp = tm.tm_year / 100;
  114. tm.tm_year %= 100;
  115. xicor_write(X1241REG_YR, tm.tm_year);
  116. xicor_write(X1241REG_Y2K, tmp);
  117. /* hour is the most tricky one */
  118. tmp = xicor_read(X1241REG_HR);
  119. if (tmp & X1241REG_HR_MIL) {
  120. /* 24 hour format */
  121. tm.tm_hour = bin2bcd(tm.tm_hour);
  122. tmp = (tmp & ~0x3f) | (tm.tm_hour & 0x3f);
  123. } else {
  124. /* 12 hour format, with 0x2 for pm */
  125. tmp = tmp & ~0x3f;
  126. if (tm.tm_hour >= 12) {
  127. tmp |= 0x20;
  128. tm.tm_hour -= 12;
  129. }
  130. tm.tm_hour = bin2bcd(tm.tm_hour);
  131. tmp |= tm.tm_hour;
  132. }
  133. xicor_write(X1241REG_HR, tmp);
  134. xicor_write(X1241REG_SR, 0);
  135. spin_unlock_irqrestore(&rtc_lock, flags);
  136. return 0;
  137. }
  138. unsigned long xicor_get_time(void)
  139. {
  140. unsigned int year, mon, day, hour, min, sec, y2k;
  141. unsigned long flags;
  142. spin_lock_irqsave(&rtc_lock, flags);
  143. sec = xicor_read(X1241REG_SC);
  144. min = xicor_read(X1241REG_MN);
  145. hour = xicor_read(X1241REG_HR);
  146. if (hour & X1241REG_HR_MIL) {
  147. hour &= 0x3f;
  148. } else {
  149. if (hour & 0x20)
  150. hour = (hour & 0xf) + 0x12;
  151. }
  152. day = xicor_read(X1241REG_DT);
  153. mon = xicor_read(X1241REG_MO);
  154. year = xicor_read(X1241REG_YR);
  155. y2k = xicor_read(X1241REG_Y2K);
  156. spin_unlock_irqrestore(&rtc_lock, flags);
  157. sec = bcd2bin(sec);
  158. min = bcd2bin(min);
  159. hour = bcd2bin(hour);
  160. day = bcd2bin(day);
  161. mon = bcd2bin(mon);
  162. year = bcd2bin(year);
  163. y2k = bcd2bin(y2k);
  164. year += (y2k * 100);
  165. return mktime(year, mon, day, hour, min, sec);
  166. }
  167. int xicor_probe(void)
  168. {
  169. return xicor_read(X1241REG_SC) != -1;
  170. }