db1300.c 22 KB

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  1. /*
  2. * DBAu1300 init and platform device setup.
  3. *
  4. * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/gpio.h>
  9. #include <linux/gpio_keys.h>
  10. #include <linux/init.h>
  11. #include <linux/input.h> /* KEY_* codes */
  12. #include <linux/i2c.h>
  13. #include <linux/io.h>
  14. #include <linux/leds.h>
  15. #include <linux/ata_platform.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/module.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/nand.h>
  20. #include <linux/mtd/partitions.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/smsc911x.h>
  23. #include <linux/wm97xx.h>
  24. #include <asm/mach-au1x00/au1000.h>
  25. #include <asm/mach-au1x00/gpio-au1300.h>
  26. #include <asm/mach-au1x00/au1100_mmc.h>
  27. #include <asm/mach-au1x00/au1200fb.h>
  28. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  29. #include <asm/mach-au1x00/au1xxx_psc.h>
  30. #include <asm/mach-db1x00/bcsr.h>
  31. #include <asm/mach-au1x00/prom.h>
  32. #include "platform.h"
  33. /* FPGA (external mux) interrupt sources */
  34. #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
  35. #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
  36. #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
  37. #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
  38. #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
  39. #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
  40. #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
  41. #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
  42. #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
  43. #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
  44. #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
  45. #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
  46. #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
  47. #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
  48. #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
  49. #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
  50. #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
  51. /* SMSC9210 CS */
  52. #define DB1300_ETH_PHYS_ADDR 0x19000000
  53. #define DB1300_ETH_PHYS_END 0x197fffff
  54. /* ATA CS */
  55. #define DB1300_IDE_PHYS_ADDR 0x18800000
  56. #define DB1300_IDE_REG_SHIFT 5
  57. #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
  58. /* NAND CS */
  59. #define DB1300_NAND_PHYS_ADDR 0x20000000
  60. #define DB1300_NAND_PHYS_END 0x20000fff
  61. static struct i2c_board_info db1300_i2c_devs[] __initdata = {
  62. { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
  63. { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
  64. };
  65. /* multifunction pins to assign to GPIO controller */
  66. static int db1300_gpio_pins[] __initdata = {
  67. AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
  68. AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
  69. AU1300_PIN_EXTCLK1,
  70. -1, /* terminator */
  71. };
  72. /* multifunction pins to assign to device functions */
  73. static int db1300_dev_pins[] __initdata = {
  74. /* wake-from-str pins 0-3 */
  75. AU1300_PIN_WAKE0,
  76. /* external clock sources for PSC0 */
  77. AU1300_PIN_EXTCLK0,
  78. /* 8bit MMC interface on SD0: 6-9 */
  79. AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
  80. AU1300_PIN_SD0DAT7,
  81. /* UART1 pins: 11-18 */
  82. AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
  83. AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
  84. AU1300_PIN_U1RX, AU1300_PIN_U1TX,
  85. /* UART0 pins: 19-24 */
  86. AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
  87. AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
  88. /* UART2: 25-26 */
  89. AU1300_PIN_U2RX, AU1300_PIN_U2TX,
  90. /* UART3: 27-28 */
  91. AU1300_PIN_U3RX, AU1300_PIN_U3TX,
  92. /* LCD controller PWMs, ext pixclock: 30-31 */
  93. AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
  94. /* SD1 interface: 32-37 */
  95. AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
  96. AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
  97. /* SD2 interface: 38-43 */
  98. AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
  99. AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
  100. /* PSC0/1 clocks: 44-45 */
  101. AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
  102. /* PSCs: 46-49/50-53/54-57/58-61 */
  103. AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
  104. AU1300_PIN_PSC0D1,
  105. AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
  106. AU1300_PIN_PSC1D1,
  107. AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
  108. AU1300_PIN_PSC2D1,
  109. AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
  110. AU1300_PIN_PSC3D1,
  111. /* PCMCIA interface: 62-70 */
  112. AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
  113. AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
  114. AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
  115. /* camera interface H/V sync inputs: 71-72 */
  116. AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
  117. /* PSC2/3 clocks: 73-74 */
  118. AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
  119. -1, /* terminator */
  120. };
  121. static void __init db1300_gpio_config(void)
  122. {
  123. int *i;
  124. i = &db1300_dev_pins[0];
  125. while (*i != -1)
  126. au1300_pinfunc_to_dev(*i++);
  127. i = &db1300_gpio_pins[0];
  128. while (*i != -1)
  129. au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
  130. au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
  131. }
  132. /**********************************************************************/
  133. static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  134. unsigned int ctrl)
  135. {
  136. struct nand_chip *this = mtd_to_nand(mtd);
  137. unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
  138. ioaddr &= 0xffffff00;
  139. if (ctrl & NAND_CLE) {
  140. ioaddr += MEM_STNAND_CMD;
  141. } else if (ctrl & NAND_ALE) {
  142. ioaddr += MEM_STNAND_ADDR;
  143. } else {
  144. /* assume we want to r/w real data by default */
  145. ioaddr += MEM_STNAND_DATA;
  146. }
  147. this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
  148. if (cmd != NAND_CMD_NONE) {
  149. __raw_writeb(cmd, this->IO_ADDR_W);
  150. wmb();
  151. }
  152. }
  153. static int au1300_nand_device_ready(struct mtd_info *mtd)
  154. {
  155. return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
  156. }
  157. static struct mtd_partition db1300_nand_parts[] = {
  158. {
  159. .name = "NAND FS 0",
  160. .offset = 0,
  161. .size = 8 * 1024 * 1024,
  162. },
  163. {
  164. .name = "NAND FS 1",
  165. .offset = MTDPART_OFS_APPEND,
  166. .size = MTDPART_SIZ_FULL
  167. },
  168. };
  169. struct platform_nand_data db1300_nand_platdata = {
  170. .chip = {
  171. .nr_chips = 1,
  172. .chip_offset = 0,
  173. .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
  174. .partitions = db1300_nand_parts,
  175. .chip_delay = 20,
  176. },
  177. .ctrl = {
  178. .dev_ready = au1300_nand_device_ready,
  179. .cmd_ctrl = au1300_nand_cmd_ctrl,
  180. },
  181. };
  182. static struct resource db1300_nand_res[] = {
  183. [0] = {
  184. .start = DB1300_NAND_PHYS_ADDR,
  185. .end = DB1300_NAND_PHYS_ADDR + 0xff,
  186. .flags = IORESOURCE_MEM,
  187. },
  188. };
  189. static struct platform_device db1300_nand_dev = {
  190. .name = "gen_nand",
  191. .num_resources = ARRAY_SIZE(db1300_nand_res),
  192. .resource = db1300_nand_res,
  193. .id = -1,
  194. .dev = {
  195. .platform_data = &db1300_nand_platdata,
  196. }
  197. };
  198. /**********************************************************************/
  199. static struct resource db1300_eth_res[] = {
  200. [0] = {
  201. .start = DB1300_ETH_PHYS_ADDR,
  202. .end = DB1300_ETH_PHYS_END,
  203. .flags = IORESOURCE_MEM,
  204. },
  205. [1] = {
  206. .start = DB1300_ETH_INT,
  207. .end = DB1300_ETH_INT,
  208. .flags = IORESOURCE_IRQ,
  209. },
  210. };
  211. static struct smsc911x_platform_config db1300_eth_config = {
  212. .phy_interface = PHY_INTERFACE_MODE_MII,
  213. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  214. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  215. .flags = SMSC911X_USE_32BIT,
  216. };
  217. static struct platform_device db1300_eth_dev = {
  218. .name = "smsc911x",
  219. .id = -1,
  220. .num_resources = ARRAY_SIZE(db1300_eth_res),
  221. .resource = db1300_eth_res,
  222. .dev = {
  223. .platform_data = &db1300_eth_config,
  224. },
  225. };
  226. /**********************************************************************/
  227. static struct resource au1300_psc1_res[] = {
  228. [0] = {
  229. .start = AU1300_PSC1_PHYS_ADDR,
  230. .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
  231. .flags = IORESOURCE_MEM,
  232. },
  233. [1] = {
  234. .start = AU1300_PSC1_INT,
  235. .end = AU1300_PSC1_INT,
  236. .flags = IORESOURCE_IRQ,
  237. },
  238. [2] = {
  239. .start = AU1300_DSCR_CMD0_PSC1_TX,
  240. .end = AU1300_DSCR_CMD0_PSC1_TX,
  241. .flags = IORESOURCE_DMA,
  242. },
  243. [3] = {
  244. .start = AU1300_DSCR_CMD0_PSC1_RX,
  245. .end = AU1300_DSCR_CMD0_PSC1_RX,
  246. .flags = IORESOURCE_DMA,
  247. },
  248. };
  249. static struct platform_device db1300_ac97_dev = {
  250. .name = "au1xpsc_ac97",
  251. .id = 1, /* PSC ID. match with AC97 codec ID! */
  252. .num_resources = ARRAY_SIZE(au1300_psc1_res),
  253. .resource = au1300_psc1_res,
  254. };
  255. /**********************************************************************/
  256. static struct resource au1300_psc2_res[] = {
  257. [0] = {
  258. .start = AU1300_PSC2_PHYS_ADDR,
  259. .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
  260. .flags = IORESOURCE_MEM,
  261. },
  262. [1] = {
  263. .start = AU1300_PSC2_INT,
  264. .end = AU1300_PSC2_INT,
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. [2] = {
  268. .start = AU1300_DSCR_CMD0_PSC2_TX,
  269. .end = AU1300_DSCR_CMD0_PSC2_TX,
  270. .flags = IORESOURCE_DMA,
  271. },
  272. [3] = {
  273. .start = AU1300_DSCR_CMD0_PSC2_RX,
  274. .end = AU1300_DSCR_CMD0_PSC2_RX,
  275. .flags = IORESOURCE_DMA,
  276. },
  277. };
  278. static struct platform_device db1300_i2s_dev = {
  279. .name = "au1xpsc_i2s",
  280. .id = 2, /* PSC ID */
  281. .num_resources = ARRAY_SIZE(au1300_psc2_res),
  282. .resource = au1300_psc2_res,
  283. };
  284. /**********************************************************************/
  285. static struct resource au1300_psc3_res[] = {
  286. [0] = {
  287. .start = AU1300_PSC3_PHYS_ADDR,
  288. .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
  289. .flags = IORESOURCE_MEM,
  290. },
  291. [1] = {
  292. .start = AU1300_PSC3_INT,
  293. .end = AU1300_PSC3_INT,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. [2] = {
  297. .start = AU1300_DSCR_CMD0_PSC3_TX,
  298. .end = AU1300_DSCR_CMD0_PSC3_TX,
  299. .flags = IORESOURCE_DMA,
  300. },
  301. [3] = {
  302. .start = AU1300_DSCR_CMD0_PSC3_RX,
  303. .end = AU1300_DSCR_CMD0_PSC3_RX,
  304. .flags = IORESOURCE_DMA,
  305. },
  306. };
  307. static struct platform_device db1300_i2c_dev = {
  308. .name = "au1xpsc_smbus",
  309. .id = 0, /* bus number */
  310. .num_resources = ARRAY_SIZE(au1300_psc3_res),
  311. .resource = au1300_psc3_res,
  312. };
  313. /**********************************************************************/
  314. /* proper key assignments when facing the LCD panel. For key assignments
  315. * according to the schematics swap up with down and left with right.
  316. * I chose to use it to emulate the arrow keys of a keyboard.
  317. */
  318. static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
  319. {
  320. .code = KEY_DOWN,
  321. .gpio = AU1300_PIN_LCDPWM0,
  322. .type = EV_KEY,
  323. .debounce_interval = 1,
  324. .active_low = 1,
  325. .desc = "5waysw-down",
  326. },
  327. {
  328. .code = KEY_UP,
  329. .gpio = AU1300_PIN_PSC2SYNC1,
  330. .type = EV_KEY,
  331. .debounce_interval = 1,
  332. .active_low = 1,
  333. .desc = "5waysw-up",
  334. },
  335. {
  336. .code = KEY_RIGHT,
  337. .gpio = AU1300_PIN_WAKE3,
  338. .type = EV_KEY,
  339. .debounce_interval = 1,
  340. .active_low = 1,
  341. .desc = "5waysw-right",
  342. },
  343. {
  344. .code = KEY_LEFT,
  345. .gpio = AU1300_PIN_WAKE2,
  346. .type = EV_KEY,
  347. .debounce_interval = 1,
  348. .active_low = 1,
  349. .desc = "5waysw-left",
  350. },
  351. {
  352. .code = KEY_ENTER,
  353. .gpio = AU1300_PIN_WAKE1,
  354. .type = EV_KEY,
  355. .debounce_interval = 1,
  356. .active_low = 1,
  357. .desc = "5waysw-push",
  358. },
  359. };
  360. static struct gpio_keys_platform_data db1300_5waysw_data = {
  361. .buttons = db1300_5waysw_arrowkeys,
  362. .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
  363. .rep = 1,
  364. .name = "db1300-5wayswitch",
  365. };
  366. static struct platform_device db1300_5waysw_dev = {
  367. .name = "gpio-keys",
  368. .dev = {
  369. .platform_data = &db1300_5waysw_data,
  370. },
  371. };
  372. /**********************************************************************/
  373. static struct pata_platform_info db1300_ide_info = {
  374. .ioport_shift = DB1300_IDE_REG_SHIFT,
  375. };
  376. #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
  377. static struct resource db1300_ide_res[] = {
  378. [0] = {
  379. .start = DB1300_IDE_PHYS_ADDR,
  380. .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
  381. .flags = IORESOURCE_MEM,
  382. },
  383. [1] = {
  384. .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
  385. .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
  386. .flags = IORESOURCE_MEM,
  387. },
  388. [2] = {
  389. .start = DB1300_IDE_INT,
  390. .end = DB1300_IDE_INT,
  391. .flags = IORESOURCE_IRQ,
  392. },
  393. };
  394. static struct platform_device db1300_ide_dev = {
  395. .dev = {
  396. .platform_data = &db1300_ide_info,
  397. },
  398. .name = "pata_platform",
  399. .resource = db1300_ide_res,
  400. .num_resources = ARRAY_SIZE(db1300_ide_res),
  401. };
  402. /**********************************************************************/
  403. static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
  404. {
  405. void(*mmc_cd)(struct mmc_host *, unsigned long);
  406. /* disable the one currently screaming. No other way to shut it up */
  407. if (irq == DB1300_SD1_INSERT_INT) {
  408. disable_irq_nosync(DB1300_SD1_INSERT_INT);
  409. enable_irq(DB1300_SD1_EJECT_INT);
  410. } else {
  411. disable_irq_nosync(DB1300_SD1_EJECT_INT);
  412. enable_irq(DB1300_SD1_INSERT_INT);
  413. }
  414. /* link against CONFIG_MMC=m. We can only be called once MMC core has
  415. * initialized the controller, so symbol_get() should always succeed.
  416. */
  417. mmc_cd = symbol_get(mmc_detect_change);
  418. mmc_cd(ptr, msecs_to_jiffies(500));
  419. symbol_put(mmc_detect_change);
  420. return IRQ_HANDLED;
  421. }
  422. static int db1300_mmc_card_readonly(void *mmc_host)
  423. {
  424. /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
  425. return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
  426. }
  427. static int db1300_mmc_card_inserted(void *mmc_host)
  428. {
  429. return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
  430. }
  431. static int db1300_mmc_cd_setup(void *mmc_host, int en)
  432. {
  433. int ret;
  434. if (en) {
  435. ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
  436. "sd_insert", mmc_host);
  437. if (ret)
  438. goto out;
  439. ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
  440. "sd_eject", mmc_host);
  441. if (ret) {
  442. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  443. goto out;
  444. }
  445. if (db1300_mmc_card_inserted(mmc_host))
  446. enable_irq(DB1300_SD1_EJECT_INT);
  447. else
  448. enable_irq(DB1300_SD1_INSERT_INT);
  449. } else {
  450. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  451. free_irq(DB1300_SD1_EJECT_INT, mmc_host);
  452. }
  453. ret = 0;
  454. out:
  455. return ret;
  456. }
  457. static void db1300_mmcled_set(struct led_classdev *led,
  458. enum led_brightness brightness)
  459. {
  460. if (brightness != LED_OFF)
  461. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
  462. else
  463. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
  464. }
  465. static struct led_classdev db1300_mmc_led = {
  466. .brightness_set = db1300_mmcled_set,
  467. };
  468. struct au1xmmc_platform_data db1300_sd1_platdata = {
  469. .cd_setup = db1300_mmc_cd_setup,
  470. .card_inserted = db1300_mmc_card_inserted,
  471. .card_readonly = db1300_mmc_card_readonly,
  472. .led = &db1300_mmc_led,
  473. };
  474. static struct resource au1300_sd1_res[] = {
  475. [0] = {
  476. .start = AU1300_SD1_PHYS_ADDR,
  477. .end = AU1300_SD1_PHYS_ADDR,
  478. .flags = IORESOURCE_MEM,
  479. },
  480. [1] = {
  481. .start = AU1300_SD1_INT,
  482. .end = AU1300_SD1_INT,
  483. .flags = IORESOURCE_IRQ,
  484. },
  485. [2] = {
  486. .start = AU1300_DSCR_CMD0_SDMS_TX1,
  487. .end = AU1300_DSCR_CMD0_SDMS_TX1,
  488. .flags = IORESOURCE_DMA,
  489. },
  490. [3] = {
  491. .start = AU1300_DSCR_CMD0_SDMS_RX1,
  492. .end = AU1300_DSCR_CMD0_SDMS_RX1,
  493. .flags = IORESOURCE_DMA,
  494. },
  495. };
  496. static struct platform_device db1300_sd1_dev = {
  497. .dev = {
  498. .platform_data = &db1300_sd1_platdata,
  499. },
  500. .name = "au1xxx-mmc",
  501. .id = 1,
  502. .resource = au1300_sd1_res,
  503. .num_resources = ARRAY_SIZE(au1300_sd1_res),
  504. };
  505. /**********************************************************************/
  506. static int db1300_movinand_inserted(void *mmc_host)
  507. {
  508. return 0; /* disable for now, it doesn't work yet */
  509. }
  510. static int db1300_movinand_readonly(void *mmc_host)
  511. {
  512. return 0;
  513. }
  514. static void db1300_movinand_led_set(struct led_classdev *led,
  515. enum led_brightness brightness)
  516. {
  517. if (brightness != LED_OFF)
  518. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
  519. else
  520. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
  521. }
  522. static struct led_classdev db1300_movinand_led = {
  523. .brightness_set = db1300_movinand_led_set,
  524. };
  525. struct au1xmmc_platform_data db1300_sd0_platdata = {
  526. .card_inserted = db1300_movinand_inserted,
  527. .card_readonly = db1300_movinand_readonly,
  528. .led = &db1300_movinand_led,
  529. .mask_host_caps = MMC_CAP_NEEDS_POLL,
  530. };
  531. static struct resource au1300_sd0_res[] = {
  532. [0] = {
  533. .start = AU1100_SD0_PHYS_ADDR,
  534. .end = AU1100_SD0_PHYS_ADDR,
  535. .flags = IORESOURCE_MEM,
  536. },
  537. [1] = {
  538. .start = AU1300_SD0_INT,
  539. .end = AU1300_SD0_INT,
  540. .flags = IORESOURCE_IRQ,
  541. },
  542. [2] = {
  543. .start = AU1300_DSCR_CMD0_SDMS_TX0,
  544. .end = AU1300_DSCR_CMD0_SDMS_TX0,
  545. .flags = IORESOURCE_DMA,
  546. },
  547. [3] = {
  548. .start = AU1300_DSCR_CMD0_SDMS_RX0,
  549. .end = AU1300_DSCR_CMD0_SDMS_RX0,
  550. .flags = IORESOURCE_DMA,
  551. },
  552. };
  553. static struct platform_device db1300_sd0_dev = {
  554. .dev = {
  555. .platform_data = &db1300_sd0_platdata,
  556. },
  557. .name = "au1xxx-mmc",
  558. .id = 0,
  559. .resource = au1300_sd0_res,
  560. .num_resources = ARRAY_SIZE(au1300_sd0_res),
  561. };
  562. /**********************************************************************/
  563. static struct platform_device db1300_wm9715_dev = {
  564. .name = "wm9712-codec",
  565. .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
  566. };
  567. static struct platform_device db1300_ac97dma_dev = {
  568. .name = "au1xpsc-pcm",
  569. .id = 1, /* PSC ID */
  570. };
  571. static struct platform_device db1300_i2sdma_dev = {
  572. .name = "au1xpsc-pcm",
  573. .id = 2, /* PSC ID */
  574. };
  575. static struct platform_device db1300_sndac97_dev = {
  576. .name = "db1300-ac97",
  577. };
  578. static struct platform_device db1300_sndi2s_dev = {
  579. .name = "db1300-i2s",
  580. };
  581. /**********************************************************************/
  582. static int db1300fb_panel_index(void)
  583. {
  584. return 9; /* DB1300_800x480 */
  585. }
  586. static int db1300fb_panel_init(void)
  587. {
  588. /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  589. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
  590. BCSR_BOARD_LCDBL);
  591. return 0;
  592. }
  593. static int db1300fb_panel_shutdown(void)
  594. {
  595. /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  596. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
  597. BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
  598. return 0;
  599. }
  600. static struct au1200fb_platdata db1300fb_pd = {
  601. .panel_index = db1300fb_panel_index,
  602. .panel_init = db1300fb_panel_init,
  603. .panel_shutdown = db1300fb_panel_shutdown,
  604. };
  605. static struct resource au1300_lcd_res[] = {
  606. [0] = {
  607. .start = AU1200_LCD_PHYS_ADDR,
  608. .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
  609. .flags = IORESOURCE_MEM,
  610. },
  611. [1] = {
  612. .start = AU1300_LCD_INT,
  613. .end = AU1300_LCD_INT,
  614. .flags = IORESOURCE_IRQ,
  615. }
  616. };
  617. static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
  618. static struct platform_device db1300_lcd_dev = {
  619. .name = "au1200-lcd",
  620. .id = 0,
  621. .dev = {
  622. .dma_mask = &au1300_lcd_dmamask,
  623. .coherent_dma_mask = DMA_BIT_MASK(32),
  624. .platform_data = &db1300fb_pd,
  625. },
  626. .num_resources = ARRAY_SIZE(au1300_lcd_res),
  627. .resource = au1300_lcd_res,
  628. };
  629. /**********************************************************************/
  630. static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
  631. {
  632. if (enable)
  633. enable_irq(DB1300_AC97_PEN_INT);
  634. else
  635. disable_irq_nosync(DB1300_AC97_PEN_INT);
  636. }
  637. static struct wm97xx_mach_ops db1300_wm97xx_ops = {
  638. .irq_enable = db1300_wm97xx_irqen,
  639. .irq_gpio = WM97XX_GPIO_3,
  640. };
  641. static int db1300_wm97xx_probe(struct platform_device *pdev)
  642. {
  643. struct wm97xx *wm = platform_get_drvdata(pdev);
  644. /* external pendown indicator */
  645. wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
  646. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
  647. WM97XX_GPIO_WAKE);
  648. /* internal "virtual" pendown gpio */
  649. wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
  650. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
  651. WM97XX_GPIO_NOWAKE);
  652. wm->pen_irq = DB1300_AC97_PEN_INT;
  653. return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
  654. }
  655. static struct platform_driver db1300_wm97xx_driver = {
  656. .driver.name = "wm97xx-touch",
  657. .driver.owner = THIS_MODULE,
  658. .probe = db1300_wm97xx_probe,
  659. };
  660. /**********************************************************************/
  661. static struct platform_device *db1300_dev[] __initdata = {
  662. &db1300_eth_dev,
  663. &db1300_i2c_dev,
  664. &db1300_5waysw_dev,
  665. &db1300_nand_dev,
  666. &db1300_ide_dev,
  667. &db1300_sd0_dev,
  668. &db1300_sd1_dev,
  669. &db1300_lcd_dev,
  670. &db1300_ac97_dev,
  671. &db1300_i2s_dev,
  672. &db1300_wm9715_dev,
  673. &db1300_ac97dma_dev,
  674. &db1300_i2sdma_dev,
  675. &db1300_sndac97_dev,
  676. &db1300_sndi2s_dev,
  677. };
  678. int __init db1300_dev_setup(void)
  679. {
  680. int swapped, cpldirq;
  681. struct clk *c;
  682. /* setup CPLD IRQ muxer */
  683. cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
  684. irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
  685. bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
  686. /* insert/eject IRQs: one always triggers so don't enable them
  687. * when doing request_irq() on them. DB1200 has this bug too.
  688. */
  689. irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
  690. irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
  691. irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
  692. irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
  693. /*
  694. * setup board
  695. */
  696. prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
  697. i2c_register_board_info(0, db1300_i2c_devs,
  698. ARRAY_SIZE(db1300_i2c_devs));
  699. if (platform_driver_register(&db1300_wm97xx_driver))
  700. pr_warn("DB1300: failed to init touch pen irq support!\n");
  701. /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  702. __raw_writel(PSC_SEL_CLK_SERCLK,
  703. (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
  704. wmb();
  705. __raw_writel(PSC_SEL_CLK_SERCLK,
  706. (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
  707. wmb();
  708. /* I2C driver wants 50MHz, get as close as possible */
  709. c = clk_get(NULL, "psc3_intclk");
  710. if (!IS_ERR(c)) {
  711. clk_set_rate(c, 50000000);
  712. clk_prepare_enable(c);
  713. clk_put(c);
  714. }
  715. __raw_writel(PSC_SEL_CLK_INTCLK,
  716. (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
  717. wmb();
  718. /* enable power to USB ports */
  719. bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
  720. /* although it is socket #0, it uses the CPLD bits which previous boards
  721. * have used for socket #1.
  722. */
  723. db1x_register_pcmcia_socket(
  724. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  725. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
  726. AU1000_PCMCIA_MEM_PHYS_ADDR,
  727. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
  728. AU1000_PCMCIA_IO_PHYS_ADDR,
  729. AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
  730. DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
  731. swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
  732. db1x_register_norflash(64 << 20, 2, swapped);
  733. return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
  734. }
  735. int __init db1300_board_setup(void)
  736. {
  737. unsigned short whoami;
  738. bcsr_init(DB1300_BCSR_PHYS_ADDR,
  739. DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
  740. whoami = bcsr_read(BCSR_WHOAMI);
  741. if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
  742. return -ENODEV;
  743. db1300_gpio_config();
  744. printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
  745. "BoardID %d CPLD Rev %d DaughtercardID %d\n",
  746. BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
  747. BCSR_WHOAMI_DCID(whoami));
  748. /* enable UARTs, YAMON only enables #2 */
  749. alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
  750. alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
  751. alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
  752. return 0;
  753. }