dma.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579
  1. /*
  2. * Meta version derived from arch/powerpc/lib/dma-noncoherent.c
  3. * Copyright (C) 2008 Imagination Technologies Ltd.
  4. *
  5. * PowerPC version derived from arch/arm/mm/consistent.c
  6. * Copyright (C) 2001 Dan Malek (dmalek@jlc.net)
  7. *
  8. * Copyright (C) 2000 Russell King
  9. *
  10. * Consistent memory allocators. Used for DMA devices that want to
  11. * share uncached memory with the processor core. The function return
  12. * is the virtual address and 'dma_handle' is the physical address.
  13. * Mostly stolen from the ARM port, with some changes for PowerPC.
  14. * -- Dan
  15. *
  16. * Reorganized to get rid of the arch-specific consistent_* functions
  17. * and provide non-coherent implementations for the DMA API. -Matt
  18. *
  19. * Added in_interrupt() safe dma_alloc_coherent()/dma_free_coherent()
  20. * implementation. This is pulled straight from ARM and barely
  21. * modified. -Matt
  22. *
  23. * This program is free software; you can redistribute it and/or modify
  24. * it under the terms of the GNU General Public License version 2 as
  25. * published by the Free Software Foundation.
  26. */
  27. #include <linux/sched.h>
  28. #include <linux/kernel.h>
  29. #include <linux/errno.h>
  30. #include <linux/export.h>
  31. #include <linux/string.h>
  32. #include <linux/types.h>
  33. #include <linux/highmem.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/slab.h>
  36. #include <asm/tlbflush.h>
  37. #include <asm/mmu.h>
  38. #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - CONSISTENT_START) \
  39. >> PAGE_SHIFT)
  40. static u64 get_coherent_dma_mask(struct device *dev)
  41. {
  42. u64 mask = ~0ULL;
  43. if (dev) {
  44. mask = dev->coherent_dma_mask;
  45. /*
  46. * Sanity check the DMA mask - it must be non-zero, and
  47. * must be able to be satisfied by a DMA allocation.
  48. */
  49. if (mask == 0) {
  50. dev_warn(dev, "coherent DMA mask is unset\n");
  51. return 0;
  52. }
  53. }
  54. return mask;
  55. }
  56. /*
  57. * This is the page table (2MB) covering uncached, DMA consistent allocations
  58. */
  59. static pte_t *consistent_pte;
  60. static DEFINE_SPINLOCK(consistent_lock);
  61. /*
  62. * VM region handling support.
  63. *
  64. * This should become something generic, handling VM region allocations for
  65. * vmalloc and similar (ioremap, module space, etc).
  66. *
  67. * I envisage vmalloc()'s supporting vm_struct becoming:
  68. *
  69. * struct vm_struct {
  70. * struct metag_vm_region region;
  71. * unsigned long flags;
  72. * struct page **pages;
  73. * unsigned int nr_pages;
  74. * unsigned long phys_addr;
  75. * };
  76. *
  77. * get_vm_area() would then call metag_vm_region_alloc with an appropriate
  78. * struct metag_vm_region head (eg):
  79. *
  80. * struct metag_vm_region vmalloc_head = {
  81. * .vm_list = LIST_HEAD_INIT(vmalloc_head.vm_list),
  82. * .vm_start = VMALLOC_START,
  83. * .vm_end = VMALLOC_END,
  84. * };
  85. *
  86. * However, vmalloc_head.vm_start is variable (typically, it is dependent on
  87. * the amount of RAM found at boot time.) I would imagine that get_vm_area()
  88. * would have to initialise this each time prior to calling
  89. * metag_vm_region_alloc().
  90. */
  91. struct metag_vm_region {
  92. struct list_head vm_list;
  93. unsigned long vm_start;
  94. unsigned long vm_end;
  95. struct page *vm_pages;
  96. int vm_active;
  97. };
  98. static struct metag_vm_region consistent_head = {
  99. .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
  100. .vm_start = CONSISTENT_START,
  101. .vm_end = CONSISTENT_END,
  102. };
  103. static struct metag_vm_region *metag_vm_region_alloc(struct metag_vm_region
  104. *head, size_t size,
  105. gfp_t gfp)
  106. {
  107. unsigned long addr = head->vm_start, end = head->vm_end - size;
  108. unsigned long flags;
  109. struct metag_vm_region *c, *new;
  110. new = kmalloc(sizeof(struct metag_vm_region), gfp);
  111. if (!new)
  112. goto out;
  113. spin_lock_irqsave(&consistent_lock, flags);
  114. list_for_each_entry(c, &head->vm_list, vm_list) {
  115. if ((addr + size) < addr)
  116. goto nospc;
  117. if ((addr + size) <= c->vm_start)
  118. goto found;
  119. addr = c->vm_end;
  120. if (addr > end)
  121. goto nospc;
  122. }
  123. found:
  124. /*
  125. * Insert this entry _before_ the one we found.
  126. */
  127. list_add_tail(&new->vm_list, &c->vm_list);
  128. new->vm_start = addr;
  129. new->vm_end = addr + size;
  130. new->vm_active = 1;
  131. spin_unlock_irqrestore(&consistent_lock, flags);
  132. return new;
  133. nospc:
  134. spin_unlock_irqrestore(&consistent_lock, flags);
  135. kfree(new);
  136. out:
  137. return NULL;
  138. }
  139. static struct metag_vm_region *metag_vm_region_find(struct metag_vm_region
  140. *head, unsigned long addr)
  141. {
  142. struct metag_vm_region *c;
  143. list_for_each_entry(c, &head->vm_list, vm_list) {
  144. if (c->vm_active && c->vm_start == addr)
  145. goto out;
  146. }
  147. c = NULL;
  148. out:
  149. return c;
  150. }
  151. /*
  152. * Allocate DMA-coherent memory space and return both the kernel remapped
  153. * virtual and bus address for that space.
  154. */
  155. static void *metag_dma_alloc(struct device *dev, size_t size,
  156. dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
  157. {
  158. struct page *page;
  159. struct metag_vm_region *c;
  160. unsigned long order;
  161. u64 mask = get_coherent_dma_mask(dev);
  162. u64 limit;
  163. if (!consistent_pte) {
  164. pr_err("%s: not initialised\n", __func__);
  165. dump_stack();
  166. return NULL;
  167. }
  168. if (!mask)
  169. goto no_page;
  170. size = PAGE_ALIGN(size);
  171. limit = (mask + 1) & ~mask;
  172. if ((limit && size >= limit)
  173. || size >= (CONSISTENT_END - CONSISTENT_START)) {
  174. pr_warn("coherent allocation too big (requested %#x mask %#Lx)\n",
  175. size, mask);
  176. return NULL;
  177. }
  178. order = get_order(size);
  179. if (mask != 0xffffffff)
  180. gfp |= GFP_DMA;
  181. page = alloc_pages(gfp, order);
  182. if (!page)
  183. goto no_page;
  184. /*
  185. * Invalidate any data that might be lurking in the
  186. * kernel direct-mapped region for device DMA.
  187. */
  188. {
  189. void *kaddr = page_address(page);
  190. memset(kaddr, 0, size);
  191. flush_dcache_region(kaddr, size);
  192. }
  193. /*
  194. * Allocate a virtual address in the consistent mapping region.
  195. */
  196. c = metag_vm_region_alloc(&consistent_head, size,
  197. gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
  198. if (c) {
  199. unsigned long vaddr = c->vm_start;
  200. pte_t *pte = consistent_pte + CONSISTENT_OFFSET(vaddr);
  201. struct page *end = page + (1 << order);
  202. c->vm_pages = page;
  203. split_page(page, order);
  204. /*
  205. * Set the "dma handle"
  206. */
  207. *handle = page_to_bus(page);
  208. do {
  209. BUG_ON(!pte_none(*pte));
  210. SetPageReserved(page);
  211. set_pte_at(&init_mm, vaddr,
  212. pte, mk_pte(page,
  213. pgprot_writecombine
  214. (PAGE_KERNEL)));
  215. page++;
  216. pte++;
  217. vaddr += PAGE_SIZE;
  218. } while (size -= PAGE_SIZE);
  219. /*
  220. * Free the otherwise unused pages.
  221. */
  222. while (page < end) {
  223. __free_page(page);
  224. page++;
  225. }
  226. return (void *)c->vm_start;
  227. }
  228. if (page)
  229. __free_pages(page, order);
  230. no_page:
  231. return NULL;
  232. }
  233. /*
  234. * free a page as defined by the above mapping.
  235. */
  236. static void metag_dma_free(struct device *dev, size_t size, void *vaddr,
  237. dma_addr_t dma_handle, unsigned long attrs)
  238. {
  239. struct metag_vm_region *c;
  240. unsigned long flags, addr;
  241. pte_t *ptep;
  242. size = PAGE_ALIGN(size);
  243. spin_lock_irqsave(&consistent_lock, flags);
  244. c = metag_vm_region_find(&consistent_head, (unsigned long)vaddr);
  245. if (!c)
  246. goto no_area;
  247. c->vm_active = 0;
  248. if ((c->vm_end - c->vm_start) != size) {
  249. pr_err("%s: freeing wrong coherent size (%ld != %d)\n",
  250. __func__, c->vm_end - c->vm_start, size);
  251. dump_stack();
  252. size = c->vm_end - c->vm_start;
  253. }
  254. ptep = consistent_pte + CONSISTENT_OFFSET(c->vm_start);
  255. addr = c->vm_start;
  256. do {
  257. pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
  258. unsigned long pfn;
  259. ptep++;
  260. addr += PAGE_SIZE;
  261. if (!pte_none(pte) && pte_present(pte)) {
  262. pfn = pte_pfn(pte);
  263. if (pfn_valid(pfn)) {
  264. struct page *page = pfn_to_page(pfn);
  265. __free_reserved_page(page);
  266. continue;
  267. }
  268. }
  269. pr_crit("%s: bad page in kernel page table\n",
  270. __func__);
  271. } while (size -= PAGE_SIZE);
  272. flush_tlb_kernel_range(c->vm_start, c->vm_end);
  273. list_del(&c->vm_list);
  274. spin_unlock_irqrestore(&consistent_lock, flags);
  275. kfree(c);
  276. return;
  277. no_area:
  278. spin_unlock_irqrestore(&consistent_lock, flags);
  279. pr_err("%s: trying to free invalid coherent area: %p\n",
  280. __func__, vaddr);
  281. dump_stack();
  282. }
  283. static int metag_dma_mmap(struct device *dev, struct vm_area_struct *vma,
  284. void *cpu_addr, dma_addr_t dma_addr, size_t size,
  285. unsigned long attrs)
  286. {
  287. unsigned long flags, user_size, kern_size;
  288. struct metag_vm_region *c;
  289. int ret = -ENXIO;
  290. if (attrs & DMA_ATTR_WRITE_COMBINE)
  291. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  292. else
  293. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  294. user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  295. spin_lock_irqsave(&consistent_lock, flags);
  296. c = metag_vm_region_find(&consistent_head, (unsigned long)cpu_addr);
  297. spin_unlock_irqrestore(&consistent_lock, flags);
  298. if (c) {
  299. unsigned long off = vma->vm_pgoff;
  300. kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
  301. if (off < kern_size &&
  302. user_size <= (kern_size - off)) {
  303. ret = remap_pfn_range(vma, vma->vm_start,
  304. page_to_pfn(c->vm_pages) + off,
  305. user_size << PAGE_SHIFT,
  306. vma->vm_page_prot);
  307. }
  308. }
  309. return ret;
  310. }
  311. /*
  312. * Initialise the consistent memory allocation.
  313. */
  314. static int __init dma_alloc_init(void)
  315. {
  316. pgd_t *pgd, *pgd_k;
  317. pud_t *pud, *pud_k;
  318. pmd_t *pmd, *pmd_k;
  319. pte_t *pte;
  320. int ret = 0;
  321. do {
  322. int offset = pgd_index(CONSISTENT_START);
  323. pgd = pgd_offset(&init_mm, CONSISTENT_START);
  324. pud = pud_alloc(&init_mm, pgd, CONSISTENT_START);
  325. pmd = pmd_alloc(&init_mm, pud, CONSISTENT_START);
  326. WARN_ON(!pmd_none(*pmd));
  327. pte = pte_alloc_kernel(pmd, CONSISTENT_START);
  328. if (!pte) {
  329. pr_err("%s: no pte tables\n", __func__);
  330. ret = -ENOMEM;
  331. break;
  332. }
  333. pgd_k = ((pgd_t *) mmu_get_base()) + offset;
  334. pud_k = pud_offset(pgd_k, CONSISTENT_START);
  335. pmd_k = pmd_offset(pud_k, CONSISTENT_START);
  336. set_pmd(pmd_k, *pmd);
  337. consistent_pte = pte;
  338. } while (0);
  339. return ret;
  340. }
  341. early_initcall(dma_alloc_init);
  342. /*
  343. * make an area consistent to devices.
  344. */
  345. static void dma_sync_for_device(void *vaddr, size_t size, int dma_direction)
  346. {
  347. /*
  348. * Ensure any writes get through the write combiner. This is necessary
  349. * even with DMA_FROM_DEVICE, or the write may dirty the cache after
  350. * we've invalidated it and get written back during the DMA.
  351. */
  352. barrier();
  353. switch (dma_direction) {
  354. case DMA_BIDIRECTIONAL:
  355. /*
  356. * Writeback to ensure the device can see our latest changes and
  357. * so that we have no dirty lines, and invalidate the cache
  358. * lines too in preparation for receiving the buffer back
  359. * (dma_sync_for_cpu) later.
  360. */
  361. flush_dcache_region(vaddr, size);
  362. break;
  363. case DMA_TO_DEVICE:
  364. /*
  365. * Writeback to ensure the device can see our latest changes.
  366. * There's no need to invalidate as the device shouldn't write
  367. * to the buffer.
  368. */
  369. writeback_dcache_region(vaddr, size);
  370. break;
  371. case DMA_FROM_DEVICE:
  372. /*
  373. * Invalidate to ensure we have no dirty lines that could get
  374. * written back during the DMA. It's also safe to flush
  375. * (writeback) here if necessary.
  376. */
  377. invalidate_dcache_region(vaddr, size);
  378. break;
  379. case DMA_NONE:
  380. BUG();
  381. }
  382. wmb();
  383. }
  384. /*
  385. * make an area consistent to the core.
  386. */
  387. static void dma_sync_for_cpu(void *vaddr, size_t size, int dma_direction)
  388. {
  389. /*
  390. * Hardware L2 cache prefetch doesn't occur across 4K physical
  391. * boundaries, however according to Documentation/DMA-API-HOWTO.txt
  392. * kmalloc'd memory is DMA'able, so accesses in nearby memory could
  393. * trigger a cache fill in the DMA buffer.
  394. *
  395. * This should never cause dirty lines, so a flush or invalidate should
  396. * be safe to allow us to see data from the device.
  397. */
  398. if (_meta_l2c_pf_is_enabled()) {
  399. switch (dma_direction) {
  400. case DMA_BIDIRECTIONAL:
  401. case DMA_FROM_DEVICE:
  402. invalidate_dcache_region(vaddr, size);
  403. break;
  404. case DMA_TO_DEVICE:
  405. /* The device shouldn't have written to the buffer */
  406. break;
  407. case DMA_NONE:
  408. BUG();
  409. }
  410. }
  411. rmb();
  412. }
  413. static dma_addr_t metag_dma_map_page(struct device *dev, struct page *page,
  414. unsigned long offset, size_t size,
  415. enum dma_data_direction direction, unsigned long attrs)
  416. {
  417. dma_sync_for_device((void *)(page_to_phys(page) + offset), size,
  418. direction);
  419. return page_to_phys(page) + offset;
  420. }
  421. static void metag_dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  422. size_t size, enum dma_data_direction direction,
  423. unsigned long attrs)
  424. {
  425. dma_sync_for_cpu(phys_to_virt(dma_address), size, direction);
  426. }
  427. static int metag_dma_map_sg(struct device *dev, struct scatterlist *sglist,
  428. int nents, enum dma_data_direction direction,
  429. unsigned long attrs)
  430. {
  431. struct scatterlist *sg;
  432. int i;
  433. for_each_sg(sglist, sg, nents, i) {
  434. BUG_ON(!sg_page(sg));
  435. sg->dma_address = sg_phys(sg);
  436. dma_sync_for_device(sg_virt(sg), sg->length, direction);
  437. }
  438. return nents;
  439. }
  440. static void metag_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
  441. int nhwentries, enum dma_data_direction direction,
  442. unsigned long attrs)
  443. {
  444. struct scatterlist *sg;
  445. int i;
  446. for_each_sg(sglist, sg, nhwentries, i) {
  447. BUG_ON(!sg_page(sg));
  448. sg->dma_address = sg_phys(sg);
  449. dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
  450. }
  451. }
  452. static void metag_dma_sync_single_for_cpu(struct device *dev,
  453. dma_addr_t dma_handle, size_t size,
  454. enum dma_data_direction direction)
  455. {
  456. dma_sync_for_cpu(phys_to_virt(dma_handle), size, direction);
  457. }
  458. static void metag_dma_sync_single_for_device(struct device *dev,
  459. dma_addr_t dma_handle, size_t size,
  460. enum dma_data_direction direction)
  461. {
  462. dma_sync_for_device(phys_to_virt(dma_handle), size, direction);
  463. }
  464. static void metag_dma_sync_sg_for_cpu(struct device *dev,
  465. struct scatterlist *sglist, int nelems,
  466. enum dma_data_direction direction)
  467. {
  468. int i;
  469. struct scatterlist *sg;
  470. for_each_sg(sglist, sg, nelems, i)
  471. dma_sync_for_cpu(sg_virt(sg), sg->length, direction);
  472. }
  473. static void metag_dma_sync_sg_for_device(struct device *dev,
  474. struct scatterlist *sglist, int nelems,
  475. enum dma_data_direction direction)
  476. {
  477. int i;
  478. struct scatterlist *sg;
  479. for_each_sg(sglist, sg, nelems, i)
  480. dma_sync_for_device(sg_virt(sg), sg->length, direction);
  481. }
  482. struct dma_map_ops metag_dma_ops = {
  483. .alloc = metag_dma_alloc,
  484. .free = metag_dma_free,
  485. .map_page = metag_dma_map_page,
  486. .map_sg = metag_dma_map_sg,
  487. .sync_single_for_device = metag_dma_sync_single_for_device,
  488. .sync_single_for_cpu = metag_dma_sync_single_for_cpu,
  489. .sync_sg_for_cpu = metag_dma_sync_sg_for_cpu,
  490. .mmap = metag_dma_mmap,
  491. };
  492. EXPORT_SYMBOL(metag_dma_ops);