io_init.c 8.0 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <linux/slab.h>
  9. #include <linux/export.h>
  10. #include <asm/sn/types.h>
  11. #include <asm/sn/addrs.h>
  12. #include <asm/sn/io.h>
  13. #include <asm/sn/module.h>
  14. #include <asm/sn/intr.h>
  15. #include <asm/sn/pcibus_provider_defs.h>
  16. #include <asm/sn/pcidev.h>
  17. #include <asm/sn/sn_sal.h>
  18. #include "xtalk/hubdev.h"
  19. /*
  20. * The code in this file will only be executed when running with
  21. * a PROM that does _not_ have base ACPI IO support.
  22. * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
  23. */
  24. static int max_segment_number; /* Default highest segment number */
  25. static int max_pcibus_number = 255; /* Default highest pci bus number */
  26. /*
  27. * Retrieve the hub device info structure for the given nasid.
  28. */
  29. static inline u64 sal_get_hubdev_info(u64 handle, u64 address)
  30. {
  31. struct ia64_sal_retval ret_stuff;
  32. ret_stuff.status = 0;
  33. ret_stuff.v0 = 0;
  34. SAL_CALL_NOLOCK(ret_stuff,
  35. (u64) SN_SAL_IOIF_GET_HUBDEV_INFO,
  36. (u64) handle, (u64) address, 0, 0, 0, 0, 0);
  37. return ret_stuff.v0;
  38. }
  39. /*
  40. * Retrieve the pci bus information given the bus number.
  41. */
  42. static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
  43. {
  44. struct ia64_sal_retval ret_stuff;
  45. ret_stuff.status = 0;
  46. ret_stuff.v0 = 0;
  47. SAL_CALL_NOLOCK(ret_stuff,
  48. (u64) SN_SAL_IOIF_GET_PCIBUS_INFO,
  49. (u64) segment, (u64) busnum, (u64) address, 0, 0, 0, 0);
  50. return ret_stuff.v0;
  51. }
  52. /*
  53. * Retrieve the pci device information given the bus and device|function number.
  54. */
  55. static inline u64
  56. sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
  57. u64 sn_irq_info)
  58. {
  59. struct ia64_sal_retval ret_stuff;
  60. ret_stuff.status = 0;
  61. ret_stuff.v0 = 0;
  62. SAL_CALL_NOLOCK(ret_stuff,
  63. (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
  64. (u64) segment, (u64) bus_number, (u64) devfn,
  65. (u64) pci_dev,
  66. sn_irq_info, 0, 0);
  67. return ret_stuff.v0;
  68. }
  69. /*
  70. * sn_fixup_ionodes() - This routine initializes the HUB data structure for
  71. * each node in the system. This function is only
  72. * executed when running with a non-ACPI capable PROM.
  73. */
  74. static void __init sn_fixup_ionodes(void)
  75. {
  76. struct hubdev_info *hubdev;
  77. u64 status;
  78. u64 nasid;
  79. int i;
  80. extern void sn_common_hubdev_init(struct hubdev_info *);
  81. /*
  82. * Get SGI Specific HUB chipset information.
  83. * Inform Prom that this kernel can support domain bus numbering.
  84. */
  85. for (i = 0; i < num_cnodes; i++) {
  86. hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
  87. nasid = cnodeid_to_nasid(i);
  88. hubdev->max_segment_number = 0xffffffff;
  89. hubdev->max_pcibus_number = 0xff;
  90. status = sal_get_hubdev_info(nasid, (u64) __pa(hubdev));
  91. if (status)
  92. continue;
  93. /* Save the largest Domain and pcibus numbers found. */
  94. if (hubdev->max_segment_number) {
  95. /*
  96. * Dealing with a Prom that supports segments.
  97. */
  98. max_segment_number = hubdev->max_segment_number;
  99. max_pcibus_number = hubdev->max_pcibus_number;
  100. }
  101. sn_common_hubdev_init(hubdev);
  102. }
  103. }
  104. /*
  105. * sn_pci_legacy_window_fixup - Setup PCI resources for
  106. * legacy IO and MEM space. This needs to
  107. * be done here, as the PROM does not have
  108. * ACPI support defining the root buses
  109. * and their resources (_CRS),
  110. */
  111. static void
  112. sn_legacy_pci_window_fixup(struct resource *res,
  113. u64 legacy_io, u64 legacy_mem)
  114. {
  115. res[0].name = "legacy_io";
  116. res[0].flags = IORESOURCE_IO;
  117. res[0].start = legacy_io;
  118. res[0].end = res[0].start + 0xffff;
  119. res[0].parent = &ioport_resource;
  120. res[1].name = "legacy_mem";
  121. res[1].flags = IORESOURCE_MEM;
  122. res[1].start = legacy_mem;
  123. res[1].end = res[1].start + (1024 * 1024) - 1;
  124. res[1].parent = &iomem_resource;
  125. }
  126. /*
  127. * sn_io_slot_fixup() - We are not running with an ACPI capable PROM,
  128. * and need to convert the pci_dev->resource
  129. * 'start' and 'end' addresses to mapped addresses,
  130. * and setup the pci_controller->window array entries.
  131. */
  132. void
  133. sn_io_slot_fixup(struct pci_dev *dev)
  134. {
  135. int idx;
  136. struct resource *res;
  137. unsigned long size;
  138. struct pcidev_info *pcidev_info;
  139. struct sn_irq_info *sn_irq_info;
  140. int status;
  141. pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
  142. if (!pcidev_info)
  143. panic("%s: Unable to alloc memory for pcidev_info", __func__);
  144. sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
  145. if (!sn_irq_info)
  146. panic("%s: Unable to alloc memory for sn_irq_info", __func__);
  147. /* Call to retrieve pci device information needed by kernel. */
  148. status = sal_get_pcidev_info((u64) pci_domain_nr(dev),
  149. (u64) dev->bus->number,
  150. dev->devfn,
  151. (u64) __pa(pcidev_info),
  152. (u64) __pa(sn_irq_info));
  153. BUG_ON(status); /* Cannot get platform pci device information */
  154. /* Copy over PIO Mapped Addresses */
  155. for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
  156. if (!pcidev_info->pdi_pio_mapped_addr[idx])
  157. continue;
  158. res = &dev->resource[idx];
  159. size = res->end - res->start;
  160. if (size == 0)
  161. continue;
  162. res->start = pcidev_info->pdi_pio_mapped_addr[idx];
  163. res->end = res->start + size;
  164. /*
  165. * if it's already in the device structure, remove it before
  166. * inserting
  167. */
  168. if (res->parent && res->parent->child)
  169. release_resource(res);
  170. if (res->flags & IORESOURCE_IO)
  171. insert_resource(&ioport_resource, res);
  172. else
  173. insert_resource(&iomem_resource, res);
  174. /*
  175. * If ROM, mark as shadowed in PROM.
  176. */
  177. if (idx == PCI_ROM_RESOURCE) {
  178. pci_disable_rom(dev);
  179. res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW |
  180. IORESOURCE_PCI_FIXED;
  181. }
  182. }
  183. sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
  184. }
  185. EXPORT_SYMBOL(sn_io_slot_fixup);
  186. /*
  187. * sn_pci_controller_fixup() - This routine sets up a bus's resources
  188. * consistent with the Linux PCI abstraction layer.
  189. */
  190. static void __init
  191. sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
  192. {
  193. s64 status = 0;
  194. struct pci_controller *controller;
  195. struct pcibus_bussoft *prom_bussoft_ptr;
  196. struct resource *res;
  197. LIST_HEAD(resources);
  198. status = sal_get_pcibus_info((u64) segment, (u64) busnum,
  199. (u64) ia64_tpa(&prom_bussoft_ptr));
  200. if (status > 0)
  201. return; /*bus # does not exist */
  202. prom_bussoft_ptr = __va(prom_bussoft_ptr);
  203. controller = kzalloc(sizeof(*controller), GFP_KERNEL);
  204. BUG_ON(!controller);
  205. controller->segment = segment;
  206. res = kcalloc(2, sizeof(struct resource), GFP_KERNEL);
  207. BUG_ON(!res);
  208. /*
  209. * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
  210. * (platform_data will be overwritten later in sn_common_bus_fixup())
  211. */
  212. controller->platform_data = prom_bussoft_ptr;
  213. sn_legacy_pci_window_fixup(res,
  214. prom_bussoft_ptr->bs_legacy_io,
  215. prom_bussoft_ptr->bs_legacy_mem);
  216. pci_add_resource_offset(&resources, &res[0],
  217. prom_bussoft_ptr->bs_legacy_io);
  218. pci_add_resource_offset(&resources, &res[1],
  219. prom_bussoft_ptr->bs_legacy_mem);
  220. bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, controller,
  221. &resources);
  222. if (bus == NULL) {
  223. kfree(res);
  224. kfree(controller);
  225. return;
  226. }
  227. pci_bus_add_devices(bus);
  228. }
  229. /*
  230. * sn_bus_fixup
  231. */
  232. void
  233. sn_bus_fixup(struct pci_bus *bus)
  234. {
  235. struct pci_dev *pci_dev = NULL;
  236. struct pcibus_bussoft *prom_bussoft_ptr;
  237. if (!bus->parent) { /* If root bus */
  238. prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
  239. if (prom_bussoft_ptr == NULL) {
  240. printk(KERN_ERR
  241. "sn_bus_fixup: 0x%04x:0x%02x Unable to "
  242. "obtain prom_bussoft_ptr\n",
  243. pci_domain_nr(bus), bus->number);
  244. return;
  245. }
  246. sn_common_bus_fixup(bus, prom_bussoft_ptr);
  247. }
  248. list_for_each_entry(pci_dev, &bus->devices, bus_list) {
  249. sn_io_slot_fixup(pci_dev);
  250. }
  251. }
  252. /*
  253. * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
  254. * so we need to do things the hard way, including initiating the
  255. * bus scanning ourselves.
  256. */
  257. void __init sn_io_init(void)
  258. {
  259. int i, j;
  260. sn_fixup_ionodes();
  261. /* busses are not known yet ... */
  262. for (i = 0; i <= max_segment_number; i++)
  263. for (j = 0; j <= max_pcibus_number; j++)
  264. sn_pci_controller_fixup(i, j, NULL);
  265. }