oxygen_io.c 7.9 KB

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  1. /*
  2. * C-Media CMI8788 driver - helper functions
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/export.h>
  22. #include <linux/io.h>
  23. #include <sound/core.h>
  24. #include <sound/mpu401.h>
  25. #include "oxygen.h"
  26. u8 oxygen_read8(struct oxygen *chip, unsigned int reg)
  27. {
  28. return inb(chip->addr + reg);
  29. }
  30. EXPORT_SYMBOL(oxygen_read8);
  31. u16 oxygen_read16(struct oxygen *chip, unsigned int reg)
  32. {
  33. return inw(chip->addr + reg);
  34. }
  35. EXPORT_SYMBOL(oxygen_read16);
  36. u32 oxygen_read32(struct oxygen *chip, unsigned int reg)
  37. {
  38. return inl(chip->addr + reg);
  39. }
  40. EXPORT_SYMBOL(oxygen_read32);
  41. void oxygen_write8(struct oxygen *chip, unsigned int reg, u8 value)
  42. {
  43. outb(value, chip->addr + reg);
  44. chip->saved_registers._8[reg] = value;
  45. }
  46. EXPORT_SYMBOL(oxygen_write8);
  47. void oxygen_write16(struct oxygen *chip, unsigned int reg, u16 value)
  48. {
  49. outw(value, chip->addr + reg);
  50. chip->saved_registers._16[reg / 2] = cpu_to_le16(value);
  51. }
  52. EXPORT_SYMBOL(oxygen_write16);
  53. void oxygen_write32(struct oxygen *chip, unsigned int reg, u32 value)
  54. {
  55. outl(value, chip->addr + reg);
  56. chip->saved_registers._32[reg / 4] = cpu_to_le32(value);
  57. }
  58. EXPORT_SYMBOL(oxygen_write32);
  59. void oxygen_write8_masked(struct oxygen *chip, unsigned int reg,
  60. u8 value, u8 mask)
  61. {
  62. u8 tmp = inb(chip->addr + reg);
  63. tmp &= ~mask;
  64. tmp |= value & mask;
  65. outb(tmp, chip->addr + reg);
  66. chip->saved_registers._8[reg] = tmp;
  67. }
  68. EXPORT_SYMBOL(oxygen_write8_masked);
  69. void oxygen_write16_masked(struct oxygen *chip, unsigned int reg,
  70. u16 value, u16 mask)
  71. {
  72. u16 tmp = inw(chip->addr + reg);
  73. tmp &= ~mask;
  74. tmp |= value & mask;
  75. outw(tmp, chip->addr + reg);
  76. chip->saved_registers._16[reg / 2] = cpu_to_le16(tmp);
  77. }
  78. EXPORT_SYMBOL(oxygen_write16_masked);
  79. void oxygen_write32_masked(struct oxygen *chip, unsigned int reg,
  80. u32 value, u32 mask)
  81. {
  82. u32 tmp = inl(chip->addr + reg);
  83. tmp &= ~mask;
  84. tmp |= value & mask;
  85. outl(tmp, chip->addr + reg);
  86. chip->saved_registers._32[reg / 4] = cpu_to_le32(tmp);
  87. }
  88. EXPORT_SYMBOL(oxygen_write32_masked);
  89. static int oxygen_ac97_wait(struct oxygen *chip, unsigned int mask)
  90. {
  91. u8 status = 0;
  92. /*
  93. * Reading the status register also clears the bits, so we have to save
  94. * the read bits in status.
  95. */
  96. wait_event_timeout(chip->ac97_waitqueue,
  97. ({ status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
  98. status & mask; }),
  99. msecs_to_jiffies(1) + 1);
  100. /*
  101. * Check even after a timeout because this function should not require
  102. * the AC'97 interrupt to be enabled.
  103. */
  104. status |= oxygen_read8(chip, OXYGEN_AC97_INTERRUPT_STATUS);
  105. return status & mask ? 0 : -EIO;
  106. }
  107. /*
  108. * About 10% of AC'97 register reads or writes fail to complete, but even those
  109. * where the controller indicates completion aren't guaranteed to have actually
  110. * happened.
  111. *
  112. * It's hard to assign blame to either the controller or the codec because both
  113. * were made by C-Media ...
  114. */
  115. void oxygen_write_ac97(struct oxygen *chip, unsigned int codec,
  116. unsigned int index, u16 data)
  117. {
  118. unsigned int count, succeeded;
  119. u32 reg;
  120. reg = data;
  121. reg |= index << OXYGEN_AC97_REG_ADDR_SHIFT;
  122. reg |= OXYGEN_AC97_REG_DIR_WRITE;
  123. reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
  124. succeeded = 0;
  125. for (count = 5; count > 0; --count) {
  126. udelay(5);
  127. oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
  128. /* require two "completed" writes, just to be sure */
  129. if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_WRITE_DONE) >= 0 &&
  130. ++succeeded >= 2) {
  131. chip->saved_ac97_registers[codec][index / 2] = data;
  132. return;
  133. }
  134. }
  135. dev_err(chip->card->dev, "AC'97 write timeout\n");
  136. }
  137. EXPORT_SYMBOL(oxygen_write_ac97);
  138. u16 oxygen_read_ac97(struct oxygen *chip, unsigned int codec,
  139. unsigned int index)
  140. {
  141. unsigned int count;
  142. unsigned int last_read = UINT_MAX;
  143. u32 reg;
  144. reg = index << OXYGEN_AC97_REG_ADDR_SHIFT;
  145. reg |= OXYGEN_AC97_REG_DIR_READ;
  146. reg |= codec << OXYGEN_AC97_REG_CODEC_SHIFT;
  147. for (count = 5; count > 0; --count) {
  148. udelay(5);
  149. oxygen_write32(chip, OXYGEN_AC97_REGS, reg);
  150. udelay(10);
  151. if (oxygen_ac97_wait(chip, OXYGEN_AC97_INT_READ_DONE) >= 0) {
  152. u16 value = oxygen_read16(chip, OXYGEN_AC97_REGS);
  153. /* we require two consecutive reads of the same value */
  154. if (value == last_read)
  155. return value;
  156. last_read = value;
  157. /*
  158. * Invert the register value bits to make sure that two
  159. * consecutive unsuccessful reads do not return the same
  160. * value.
  161. */
  162. reg ^= 0xffff;
  163. }
  164. }
  165. dev_err(chip->card->dev, "AC'97 read timeout on codec %u\n", codec);
  166. return 0;
  167. }
  168. EXPORT_SYMBOL(oxygen_read_ac97);
  169. void oxygen_write_ac97_masked(struct oxygen *chip, unsigned int codec,
  170. unsigned int index, u16 data, u16 mask)
  171. {
  172. u16 value = oxygen_read_ac97(chip, codec, index);
  173. value &= ~mask;
  174. value |= data & mask;
  175. oxygen_write_ac97(chip, codec, index, value);
  176. }
  177. EXPORT_SYMBOL(oxygen_write_ac97_masked);
  178. static int oxygen_wait_spi(struct oxygen *chip)
  179. {
  180. unsigned int count;
  181. /*
  182. * Higher timeout to be sure: 200 us;
  183. * actual transaction should not need more than 40 us.
  184. */
  185. for (count = 50; count > 0; count--) {
  186. udelay(4);
  187. if ((oxygen_read8(chip, OXYGEN_SPI_CONTROL) &
  188. OXYGEN_SPI_BUSY) == 0)
  189. return 0;
  190. }
  191. dev_err(chip->card->dev, "oxygen: SPI wait timeout\n");
  192. return -EIO;
  193. }
  194. int oxygen_write_spi(struct oxygen *chip, u8 control, unsigned int data)
  195. {
  196. /*
  197. * We need to wait AFTER initiating the SPI transaction,
  198. * otherwise read operations will not work.
  199. */
  200. oxygen_write8(chip, OXYGEN_SPI_DATA1, data);
  201. oxygen_write8(chip, OXYGEN_SPI_DATA2, data >> 8);
  202. if (control & OXYGEN_SPI_DATA_LENGTH_3)
  203. oxygen_write8(chip, OXYGEN_SPI_DATA3, data >> 16);
  204. oxygen_write8(chip, OXYGEN_SPI_CONTROL, control);
  205. return oxygen_wait_spi(chip);
  206. }
  207. EXPORT_SYMBOL(oxygen_write_spi);
  208. void oxygen_write_i2c(struct oxygen *chip, u8 device, u8 map, u8 data)
  209. {
  210. /* should not need more than about 300 us */
  211. msleep(1);
  212. oxygen_write8(chip, OXYGEN_2WIRE_MAP, map);
  213. oxygen_write8(chip, OXYGEN_2WIRE_DATA, data);
  214. oxygen_write8(chip, OXYGEN_2WIRE_CONTROL,
  215. device | OXYGEN_2WIRE_DIR_WRITE);
  216. }
  217. EXPORT_SYMBOL(oxygen_write_i2c);
  218. static void _write_uart(struct oxygen *chip, unsigned int port, u8 data)
  219. {
  220. if (oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_TX_FULL)
  221. msleep(1);
  222. oxygen_write8(chip, OXYGEN_MPU401 + port, data);
  223. }
  224. void oxygen_reset_uart(struct oxygen *chip)
  225. {
  226. _write_uart(chip, 1, MPU401_RESET);
  227. msleep(1); /* wait for ACK */
  228. _write_uart(chip, 1, MPU401_ENTER_UART);
  229. }
  230. EXPORT_SYMBOL(oxygen_reset_uart);
  231. void oxygen_write_uart(struct oxygen *chip, u8 data)
  232. {
  233. _write_uart(chip, 0, data);
  234. }
  235. EXPORT_SYMBOL(oxygen_write_uart);
  236. u16 oxygen_read_eeprom(struct oxygen *chip, unsigned int index)
  237. {
  238. unsigned int timeout;
  239. oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
  240. index | OXYGEN_EEPROM_DIR_READ);
  241. for (timeout = 0; timeout < 100; ++timeout) {
  242. udelay(1);
  243. if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
  244. & OXYGEN_EEPROM_BUSY))
  245. break;
  246. }
  247. return oxygen_read16(chip, OXYGEN_EEPROM_DATA);
  248. }
  249. void oxygen_write_eeprom(struct oxygen *chip, unsigned int index, u16 value)
  250. {
  251. unsigned int timeout;
  252. oxygen_write16(chip, OXYGEN_EEPROM_DATA, value);
  253. oxygen_write8(chip, OXYGEN_EEPROM_CONTROL,
  254. index | OXYGEN_EEPROM_DIR_WRITE);
  255. for (timeout = 0; timeout < 10; ++timeout) {
  256. msleep(1);
  257. if (!(oxygen_read8(chip, OXYGEN_EEPROM_STATUS)
  258. & OXYGEN_EEPROM_BUSY))
  259. return;
  260. }
  261. dev_err(chip->card->dev, "EEPROM write timeout\n");
  262. }