lx_core.h 6.5 KB

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  1. /* -*- linux-c -*- *
  2. *
  3. * ALSA driver for the digigram lx6464es interface
  4. * low-level interface
  5. *
  6. * Copyright (c) 2009 Tim Blechmann <tim@klingt.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; see the file COPYING. If not, write to
  20. * the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  21. * Boston, MA 02111-1307, USA.
  22. *
  23. */
  24. #ifndef LX_CORE_H
  25. #define LX_CORE_H
  26. #include <linux/interrupt.h>
  27. #include "lx_defs.h"
  28. #define REG_CRM_NUMBER 12
  29. struct lx6464es;
  30. /* low-level register access */
  31. /* dsp register access */
  32. enum {
  33. eReg_BASE,
  34. eReg_CSM,
  35. eReg_CRM1,
  36. eReg_CRM2,
  37. eReg_CRM3,
  38. eReg_CRM4,
  39. eReg_CRM5,
  40. eReg_CRM6,
  41. eReg_CRM7,
  42. eReg_CRM8,
  43. eReg_CRM9,
  44. eReg_CRM10,
  45. eReg_CRM11,
  46. eReg_CRM12,
  47. eReg_ICR,
  48. eReg_CVR,
  49. eReg_ISR,
  50. eReg_RXHTXH,
  51. eReg_RXMTXM,
  52. eReg_RHLTXL,
  53. eReg_RESETDSP,
  54. eReg_CSUF,
  55. eReg_CSES,
  56. eReg_CRESMSB,
  57. eReg_CRESLSB,
  58. eReg_ADMACESMSB,
  59. eReg_ADMACESLSB,
  60. eReg_CONFES,
  61. eMaxPortLx
  62. };
  63. unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port);
  64. void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data);
  65. /* plx register access */
  66. enum {
  67. ePLX_PCICR,
  68. ePLX_MBOX0,
  69. ePLX_MBOX1,
  70. ePLX_MBOX2,
  71. ePLX_MBOX3,
  72. ePLX_MBOX4,
  73. ePLX_MBOX5,
  74. ePLX_MBOX6,
  75. ePLX_MBOX7,
  76. ePLX_L2PCIDB,
  77. ePLX_IRQCS,
  78. ePLX_CHIPSC,
  79. eMaxPort
  80. };
  81. unsigned long lx_plx_reg_read(struct lx6464es *chip, int port);
  82. void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data);
  83. /* rhm */
  84. struct lx_rmh {
  85. u16 cmd_len; /* length of the command to send (WORDs) */
  86. u16 stat_len; /* length of the status received (WORDs) */
  87. u16 dsp_stat; /* status type, RMP_SSIZE_XXX */
  88. u16 cmd_idx; /* index of the command */
  89. u32 cmd[REG_CRM_NUMBER];
  90. u32 stat[REG_CRM_NUMBER];
  91. };
  92. /* low-level dsp access */
  93. int lx_dsp_get_version(struct lx6464es *chip, u32 *rdsp_version);
  94. int lx_dsp_get_clock_frequency(struct lx6464es *chip, u32 *rfreq);
  95. int lx_dsp_set_granularity(struct lx6464es *chip, u32 gran);
  96. int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data);
  97. int lx_dsp_get_mac(struct lx6464es *chip);
  98. /* low-level pipe handling */
  99. int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture,
  100. int channels);
  101. int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture);
  102. int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture,
  103. u64 *rsample_count);
  104. int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate);
  105. int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture);
  106. int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture);
  107. int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture);
  108. int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture);
  109. int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture);
  110. /* low-level stream handling */
  111. int lx_stream_set_format(struct lx6464es *chip, struct snd_pcm_runtime *runtime,
  112. u32 pipe, int is_capture);
  113. int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture,
  114. int *rstate);
  115. int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture,
  116. u64 *r_bytepos);
  117. int lx_stream_set_state(struct lx6464es *chip, u32 pipe,
  118. int is_capture, enum stream_state_t state);
  119. static inline int lx_stream_start(struct lx6464es *chip, u32 pipe,
  120. int is_capture)
  121. {
  122. snd_printdd("->lx_stream_start\n");
  123. return lx_stream_set_state(chip, pipe, is_capture, SSTATE_RUN);
  124. }
  125. static inline int lx_stream_pause(struct lx6464es *chip, u32 pipe,
  126. int is_capture)
  127. {
  128. snd_printdd("->lx_stream_pause\n");
  129. return lx_stream_set_state(chip, pipe, is_capture, SSTATE_PAUSE);
  130. }
  131. static inline int lx_stream_stop(struct lx6464es *chip, u32 pipe,
  132. int is_capture)
  133. {
  134. snd_printdd("->lx_stream_stop\n");
  135. return lx_stream_set_state(chip, pipe, is_capture, SSTATE_STOP);
  136. }
  137. /* low-level buffer handling */
  138. int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture,
  139. u32 *r_needed, u32 *r_freed, u32 *size_array);
  140. int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture,
  141. u32 buffer_size, u32 buf_address_lo, u32 buf_address_hi,
  142. u32 *r_buffer_index);
  143. int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture,
  144. u32 *r_buffer_size);
  145. int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture,
  146. u32 buffer_index);
  147. /* low-level gain/peak handling */
  148. int lx_level_unmute(struct lx6464es *chip, int is_capture, int unmute);
  149. int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels,
  150. u32 *r_levels);
  151. /* interrupt handling */
  152. irqreturn_t lx_interrupt(int irq, void *dev_id);
  153. irqreturn_t lx_threaded_irq(int irq, void *dev_id);
  154. void lx_irq_enable(struct lx6464es *chip);
  155. void lx_irq_disable(struct lx6464es *chip);
  156. /* Stream Format Header Defines (for LIN and IEEE754) */
  157. #define HEADER_FMT_BASE HEADER_FMT_BASE_LIN
  158. #define HEADER_FMT_BASE_LIN 0xFED00000
  159. #define HEADER_FMT_BASE_FLOAT 0xFAD00000
  160. #define HEADER_FMT_MONO 0x00000080 /* bit 23 in header_lo. WARNING: old
  161. * bit 22 is ignored in float
  162. * format */
  163. #define HEADER_FMT_INTEL 0x00008000
  164. #define HEADER_FMT_16BITS 0x00002000
  165. #define HEADER_FMT_24BITS 0x00004000
  166. #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.
  167. * */
  168. #define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less
  169. * then 32k.*/
  170. #define BIT_FMP_HEADER 23
  171. #define BIT_FMP_SD 22
  172. #define BIT_FMP_MULTICHANNEL 19
  173. #define START_STATE 1
  174. #define PAUSE_STATE 0
  175. /* from PcxAll_e.h */
  176. /* Start/Pause condition for pipes (PCXStartPipe, PCXPausePipe) */
  177. #define START_PAUSE_IMMEDIATE 0
  178. #define START_PAUSE_ON_SYNCHRO 1
  179. #define START_PAUSE_ON_TIME_CODE 2
  180. /* Pipe / Stream state */
  181. #define START_STATE 1
  182. #define PAUSE_STATE 0
  183. static inline void unpack_pointer(dma_addr_t ptr, u32 *r_low, u32 *r_high)
  184. {
  185. *r_low = (u32)(ptr & 0xffffffff);
  186. #if BITS_PER_LONG == 32
  187. *r_high = 0;
  188. #else
  189. *r_high = (u32)((u64)ptr>>32);
  190. #endif
  191. }
  192. #endif /* LX_CORE_H */