p16v.h 15 KB

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  1. /*
  2. * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
  3. * Driver p16v chips
  4. * Version: 0.21
  5. *
  6. * FEATURES currently supported:
  7. * Output fixed at S32_LE, 2 channel to hw:0,0
  8. * Rates: 44.1, 48, 96, 192.
  9. *
  10. * Changelog:
  11. * 0.8
  12. * Use separate card based buffer for periods table.
  13. * 0.9
  14. * Use 2 channel output streams instead of 8 channel.
  15. * (8 channel output streams might be good for ASIO type output)
  16. * Corrected speaker output, so Front -> Front etc.
  17. * 0.10
  18. * Fixed missed interrupts.
  19. * 0.11
  20. * Add Sound card model number and names.
  21. * Add Analog volume controls.
  22. * 0.12
  23. * Corrected playback interrupts. Now interrupt per period, instead of half period.
  24. * 0.13
  25. * Use single trigger for multichannel.
  26. * 0.14
  27. * Mic capture now works at fixed: S32_LE, 96000Hz, Stereo.
  28. * 0.15
  29. * Force buffer_size / period_size == INTEGER.
  30. * 0.16
  31. * Update p16v.c to work with changed alsa api.
  32. * 0.17
  33. * Update p16v.c to work with changed alsa api. Removed boot_devs.
  34. * 0.18
  35. * Merging with snd-emu10k1 driver.
  36. * 0.19
  37. * One stereo channel at 24bit now works.
  38. * 0.20
  39. * Added better register defines.
  40. * 0.21
  41. * Split from p16v.c
  42. *
  43. *
  44. * BUGS:
  45. * Some stability problems when unloading the snd-p16v kernel module.
  46. * --
  47. *
  48. * TODO:
  49. * SPDIF out.
  50. * Find out how to change capture sample rates. E.g. To record SPDIF at 48000Hz.
  51. * Currently capture fixed at 48000Hz.
  52. *
  53. * --
  54. * GENERAL INFO:
  55. * Model: SB0240
  56. * P16V Chip: CA0151-DBS
  57. * Audigy 2 Chip: CA0102-IAT
  58. * AC97 Codec: STAC 9721
  59. * ADC: Philips 1361T (Stereo 24bit)
  60. * DAC: CS4382-K (8-channel, 24bit, 192Khz)
  61. *
  62. * This code was initially based on code from ALSA's emu10k1x.c which is:
  63. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  64. *
  65. * This program is free software; you can redistribute it and/or modify
  66. * it under the terms of the GNU General Public License as published by
  67. * the Free Software Foundation; either version 2 of the License, or
  68. * (at your option) any later version.
  69. *
  70. * This program is distributed in the hope that it will be useful,
  71. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  72. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  73. * GNU General Public License for more details.
  74. *
  75. * You should have received a copy of the GNU General Public License
  76. * along with this program; if not, write to the Free Software
  77. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  78. *
  79. */
  80. /********************************************************************************************************/
  81. /* Audigy2 P16V pointer-offset register set, accessed through the PTR2 and DATA2 registers */
  82. /********************************************************************************************************/
  83. /* The sample rate of the SPDIF outputs is set by modifying a register in the EMU10K2 PTR register A_SPDIF_SAMPLERATE.
  84. * The sample rate is also controlled by the same registers that control the rate of the EMU10K2 sample rate converters.
  85. */
  86. /* Initially all registers from 0x00 to 0x3f have zero contents. */
  87. #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
  88. /* One list entry: 4 bytes for DMA address,
  89. * 4 bytes for period_size << 16.
  90. * One list entry is 8 bytes long.
  91. * One list entry for each period in the buffer.
  92. */
  93. #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
  94. #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
  95. #define PLAYBACK_UNKNOWN3 0x03 /* Not used */
  96. #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
  97. #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */
  98. #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Used with PLAYBACK_LIST_PTR to determine buffer position currently in DAC */
  99. #define PLAYBACK_FIFO_END_ADDRESS 0x07 /* Playback FIFO end address */
  100. #define PLAYBACK_FIFO_POINTER 0x08 /* Playback FIFO pointer and number of valid sound samples in cache */
  101. #define PLAYBACK_UNKNOWN9 0x09 /* Not used */
  102. #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
  103. #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
  104. #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
  105. #define CAPTURE_FIFO_POINTER 0x13 /* Capture FIFO pointer and number of valid sound samples in cache */
  106. #define CAPTURE_P16V_VOLUME1 0x14 /* Low: Capture volume 0xXXXX3030 */
  107. #define CAPTURE_P16V_VOLUME2 0x15 /* High:Has no effect on capture volume */
  108. #define CAPTURE_P16V_SOURCE 0x16 /* P16V source select. Set to 0x0700E4E5 for AC97 CAPTURE */
  109. /* [0:1] Capture input 0 channel select. 0 = Capture output 0.
  110. * 1 = Capture output 1.
  111. * 2 = Capture output 2.
  112. * 3 = Capture output 3.
  113. * [3:2] Capture input 1 channel select. 0 = Capture output 0.
  114. * 1 = Capture output 1.
  115. * 2 = Capture output 2.
  116. * 3 = Capture output 3.
  117. * [5:4] Capture input 2 channel select. 0 = Capture output 0.
  118. * 1 = Capture output 1.
  119. * 2 = Capture output 2.
  120. * 3 = Capture output 3.
  121. * [7:6] Capture input 3 channel select. 0 = Capture output 0.
  122. * 1 = Capture output 1.
  123. * 2 = Capture output 2.
  124. * 3 = Capture output 3.
  125. * [9:8] Playback input 0 channel select. 0 = Play output 0.
  126. * 1 = Play output 1.
  127. * 2 = Play output 2.
  128. * 3 = Play output 3.
  129. * [11:10] Playback input 1 channel select. 0 = Play output 0.
  130. * 1 = Play output 1.
  131. * 2 = Play output 2.
  132. * 3 = Play output 3.
  133. * [13:12] Playback input 2 channel select. 0 = Play output 0.
  134. * 1 = Play output 1.
  135. * 2 = Play output 2.
  136. * 3 = Play output 3.
  137. * [15:14] Playback input 3 channel select. 0 = Play output 0.
  138. * 1 = Play output 1.
  139. * 2 = Play output 2.
  140. * 3 = Play output 3.
  141. * [19:16] Playback mixer output enable. 1 bit per channel.
  142. * [23:20] Capture mixer output enable. 1 bit per channel.
  143. * [26:24] FX engine channel capture 0 = 0x60-0x67.
  144. * 1 = 0x68-0x6f.
  145. * 2 = 0x70-0x77.
  146. * 3 = 0x78-0x7f.
  147. * 4 = 0x80-0x87.
  148. * 5 = 0x88-0x8f.
  149. * 6 = 0x90-0x97.
  150. * 7 = 0x98-0x9f.
  151. * [31:27] Not used.
  152. */
  153. /* 0x1 = capture on.
  154. * 0x100 = capture off.
  155. * 0x200 = capture off.
  156. * 0x1000 = capture off.
  157. */
  158. #define CAPTURE_RATE_STATUS 0x17 /* Capture sample rate. Read only */
  159. /* [15:0] Not used.
  160. * [18:16] Channel 0 Detected sample rate. 0 - 44.1khz
  161. * 1 - 48 khz
  162. * 2 - 96 khz
  163. * 3 - 192 khz
  164. * 7 - undefined rate.
  165. * [19] Channel 0. 1 - Valid, 0 - Not Valid.
  166. * [22:20] Channel 1 Detected sample rate.
  167. * [23] Channel 1. 1 - Valid, 0 - Not Valid.
  168. * [26:24] Channel 2 Detected sample rate.
  169. * [27] Channel 2. 1 - Valid, 0 - Not Valid.
  170. * [30:28] Channel 3 Detected sample rate.
  171. * [31] Channel 3. 1 - Valid, 0 - Not Valid.
  172. */
  173. /* 0x18 - 0x1f unused */
  174. #define PLAYBACK_LAST_SAMPLE 0x20 /* The sample currently being played. Read only */
  175. /* 0x21 - 0x3f unused */
  176. #define BASIC_INTERRUPT 0x40 /* Used by both playback and capture interrupt handler */
  177. /* Playback (0x1<<channel_id) Don't touch high 16bits. */
  178. /* Capture (0x100<<channel_id). not tested */
  179. /* Start Playback [3:0] (one bit per channel)
  180. * Start Capture [11:8] (one bit per channel)
  181. * Record source select for channel 0 [18:16]
  182. * Record source select for channel 1 [22:20]
  183. * Record source select for channel 2 [26:24]
  184. * Record source select for channel 3 [30:28]
  185. * 0 - SPDIF channel.
  186. * 1 - I2S channel.
  187. * 2 - SRC48 channel.
  188. * 3 - SRCMulti_SPDIF channel.
  189. * 4 - SRCMulti_I2S channel.
  190. * 5 - SPDIF channel.
  191. * 6 - fxengine capture.
  192. * 7 - AC97 capture.
  193. */
  194. /* Default 41110000.
  195. * Writing 0xffffffff hangs the PC.
  196. * Writing 0xffff0000 -> 77770000 so it must be some sort of route.
  197. * bit 0x1 starts DMA playback on channel_id 0
  198. */
  199. /* 0x41,42 take values from 0 - 0xffffffff, but have no effect on playback */
  200. /* 0x43,0x48 do not remember settings */
  201. /* 0x41-45 unused */
  202. #define WATERMARK 0x46 /* Test bit to indicate cache level usage */
  203. /* Values it can have while playing on channel 0.
  204. * 0000f000, 0000f004, 0000f008, 0000f00c.
  205. * Readonly.
  206. */
  207. /* 0x47-0x4f unused */
  208. /* 0x50-0x5f Capture cache data */
  209. #define SRCSel 0x60 /* SRCSel. Default 0x4. Bypass P16V 0x14 */
  210. /* [0] 0 = 10K2 audio, 1 = SRC48 mixer output.
  211. * [2] 0 = 10K2 audio, 1 = SRCMulti SPDIF mixer output.
  212. * [4] 0 = 10K2 audio, 1 = SRCMulti I2S mixer output.
  213. */
  214. /* SRC48 converts samples rates 44.1, 48, 96, 192 to 48 khz. */
  215. /* SRCMulti converts 48khz samples rates to 44.1, 48, 96, 192 to 48. */
  216. /* SRC48 and SRCMULTI sample rate select and output select. */
  217. /* 0xffffffff -> 0xC0000015
  218. * 0xXXXXXXX4 = Enable Front Left/Right
  219. * Enable PCMs
  220. */
  221. /* 0x61 -> 0x6c are Volume controls */
  222. #define PLAYBACK_VOLUME_MIXER1 0x61 /* SRC48 Low to mixer input volume control. */
  223. #define PLAYBACK_VOLUME_MIXER2 0x62 /* SRC48 High to mixer input volume control. */
  224. #define PLAYBACK_VOLUME_MIXER3 0x63 /* SRCMULTI SPDIF Low to mixer input volume control. */
  225. #define PLAYBACK_VOLUME_MIXER4 0x64 /* SRCMULTI SPDIF High to mixer input volume control. */
  226. #define PLAYBACK_VOLUME_MIXER5 0x65 /* SRCMULTI I2S Low to mixer input volume control. */
  227. #define PLAYBACK_VOLUME_MIXER6 0x66 /* SRCMULTI I2S High to mixer input volume control. */
  228. #define PLAYBACK_VOLUME_MIXER7 0x67 /* P16V Low to SRCMULTI SPDIF mixer input volume control. */
  229. #define PLAYBACK_VOLUME_MIXER8 0x68 /* P16V High to SRCMULTI SPDIF mixer input volume control. */
  230. #define PLAYBACK_VOLUME_MIXER9 0x69 /* P16V Low to SRCMULTI I2S mixer input volume control. */
  231. /* 0xXXXX3030 = PCM0 Volume (Front).
  232. * 0x3030XXXX = PCM1 Volume (Center)
  233. */
  234. #define PLAYBACK_VOLUME_MIXER10 0x6a /* P16V High to SRCMULTI I2S mixer input volume control. */
  235. /* 0x3030XXXX = PCM3 Volume (Rear). */
  236. #define PLAYBACK_VOLUME_MIXER11 0x6b /* E10K2 Low to SRC48 mixer input volume control. */
  237. #define PLAYBACK_VOLUME_MIXER12 0x6c /* E10K2 High to SRC48 mixer input volume control. */
  238. #define SRC48_ENABLE 0x6d /* SRC48 input audio enable */
  239. /* SRC48 converts samples rates 44.1, 48, 96, 192 to 48 khz. */
  240. /* [23:16] The corresponding P16V channel to SRC48 enabled if == 1.
  241. * [31:24] The corresponding E10K2 channel to SRC48 enabled.
  242. */
  243. #define SRCMULTI_ENABLE 0x6e /* SRCMulti input audio enable. Default 0xffffffff */
  244. /* SRCMulti converts 48khz samples rates to 44.1, 48, 96, 192 to 48. */
  245. /* [7:0] The corresponding P16V channel to SRCMulti_I2S enabled if == 1.
  246. * [15:8] The corresponding E10K2 channel to SRCMulti I2S enabled.
  247. * [23:16] The corresponding P16V channel to SRCMulti SPDIF enabled.
  248. * [31:24] The corresponding E10K2 channel to SRCMulti SPDIF enabled.
  249. */
  250. /* Bypass P16V 0xff00ff00
  251. * Bitmap. 0 = Off, 1 = On.
  252. * P16V playback outputs:
  253. * 0xXXXXXXX1 = PCM0 Left. (Front)
  254. * 0xXXXXXXX2 = PCM0 Right.
  255. * 0xXXXXXXX4 = PCM1 Left. (Center/LFE)
  256. * 0xXXXXXXX8 = PCM1 Right.
  257. * 0xXXXXXX1X = PCM2 Left. (Unknown)
  258. * 0xXXXXXX2X = PCM2 Right.
  259. * 0xXXXXXX4X = PCM3 Left. (Rear)
  260. * 0xXXXXXX8X = PCM3 Right.
  261. */
  262. #define AUDIO_OUT_ENABLE 0x6f /* Default: 000100FF */
  263. /* [3:0] Does something, but not documented. Probably capture enable.
  264. * [7:4] Playback channels enable. not documented.
  265. * [16] AC97 output enable if == 1
  266. * [30] 0 = SRCMulti_I2S input from fxengine 0x68-0x6f.
  267. * 1 = SRCMulti_I2S input from SRC48 output.
  268. * [31] 0 = SRCMulti_SPDIF input from fxengine 0x60-0x67.
  269. * 1 = SRCMulti_SPDIF input from SRC48 output.
  270. */
  271. /* 0xffffffff -> C00100FF */
  272. /* 0 -> Not playback sound, irq still running */
  273. /* 0xXXXXXX10 = PCM0 Left/Right On. (Front)
  274. * 0xXXXXXX20 = PCM1 Left/Right On. (Center/LFE)
  275. * 0xXXXXXX40 = PCM2 Left/Right On. (Unknown)
  276. * 0xXXXXXX80 = PCM3 Left/Right On. (Rear)
  277. */
  278. #define PLAYBACK_SPDIF_SELECT 0x70 /* Default: 12030F00 */
  279. /* 0xffffffff -> 3FF30FFF */
  280. /* 0x00000001 pauses stream/irq fail. */
  281. /* All other bits do not effect playback */
  282. #define PLAYBACK_SPDIF_SRC_SELECT 0x71 /* Default: 0000E4E4 */
  283. /* 0xffffffff -> F33FFFFF */
  284. /* All bits do not effect playback */
  285. #define PLAYBACK_SPDIF_USER_DATA0 0x72 /* SPDIF out user data 0 */
  286. #define PLAYBACK_SPDIF_USER_DATA1 0x73 /* SPDIF out user data 1 */
  287. /* 0x74-0x75 unknown */
  288. #define CAPTURE_SPDIF_CONTROL 0x76 /* SPDIF in control setting */
  289. #define CAPTURE_SPDIF_STATUS 0x77 /* SPDIF in status */
  290. #define CAPURE_SPDIF_USER_DATA0 0x78 /* SPDIF in user data 0 */
  291. #define CAPURE_SPDIF_USER_DATA1 0x79 /* SPDIF in user data 1 */
  292. #define CAPURE_SPDIF_USER_DATA2 0x7a /* SPDIF in user data 2 */