emufx.c 99 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770
  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Creative Labs, Inc.
  4. * Routines for effect processor FX8010
  5. *
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
  7. * Added EMU 1010 support.
  8. *
  9. * BUGS:
  10. * --
  11. *
  12. * TODO:
  13. * --
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. *
  29. */
  30. #include <linux/pci.h>
  31. #include <linux/capability.h>
  32. #include <linux/delay.h>
  33. #include <linux/slab.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/init.h>
  36. #include <linux/mutex.h>
  37. #include <linux/moduleparam.h>
  38. #include <sound/core.h>
  39. #include <sound/tlv.h>
  40. #include <sound/emu10k1.h>
  41. #if 0 /* for testing purposes - digital out -> capture */
  42. #define EMU10K1_CAPTURE_DIGITAL_OUT
  43. #endif
  44. #if 0 /* for testing purposes - set S/PDIF to AC3 output */
  45. #define EMU10K1_SET_AC3_IEC958
  46. #endif
  47. #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
  48. #define EMU10K1_CENTER_LFE_FROM_FRONT
  49. #endif
  50. static bool high_res_gpr_volume;
  51. module_param(high_res_gpr_volume, bool, 0444);
  52. MODULE_PARM_DESC(high_res_gpr_volume, "GPR mixer controls use 31-bit range.");
  53. /*
  54. * Tables
  55. */
  56. static char *fxbuses[16] = {
  57. /* 0x00 */ "PCM Left",
  58. /* 0x01 */ "PCM Right",
  59. /* 0x02 */ "PCM Surround Left",
  60. /* 0x03 */ "PCM Surround Right",
  61. /* 0x04 */ "MIDI Left",
  62. /* 0x05 */ "MIDI Right",
  63. /* 0x06 */ "Center",
  64. /* 0x07 */ "LFE",
  65. /* 0x08 */ NULL,
  66. /* 0x09 */ NULL,
  67. /* 0x0a */ NULL,
  68. /* 0x0b */ NULL,
  69. /* 0x0c */ "MIDI Reverb",
  70. /* 0x0d */ "MIDI Chorus",
  71. /* 0x0e */ NULL,
  72. /* 0x0f */ NULL
  73. };
  74. static char *creative_ins[16] = {
  75. /* 0x00 */ "AC97 Left",
  76. /* 0x01 */ "AC97 Right",
  77. /* 0x02 */ "TTL IEC958 Left",
  78. /* 0x03 */ "TTL IEC958 Right",
  79. /* 0x04 */ "Zoom Video Left",
  80. /* 0x05 */ "Zoom Video Right",
  81. /* 0x06 */ "Optical IEC958 Left",
  82. /* 0x07 */ "Optical IEC958 Right",
  83. /* 0x08 */ "Line/Mic 1 Left",
  84. /* 0x09 */ "Line/Mic 1 Right",
  85. /* 0x0a */ "Coaxial IEC958 Left",
  86. /* 0x0b */ "Coaxial IEC958 Right",
  87. /* 0x0c */ "Line/Mic 2 Left",
  88. /* 0x0d */ "Line/Mic 2 Right",
  89. /* 0x0e */ NULL,
  90. /* 0x0f */ NULL
  91. };
  92. static char *audigy_ins[16] = {
  93. /* 0x00 */ "AC97 Left",
  94. /* 0x01 */ "AC97 Right",
  95. /* 0x02 */ "Audigy CD Left",
  96. /* 0x03 */ "Audigy CD Right",
  97. /* 0x04 */ "Optical IEC958 Left",
  98. /* 0x05 */ "Optical IEC958 Right",
  99. /* 0x06 */ NULL,
  100. /* 0x07 */ NULL,
  101. /* 0x08 */ "Line/Mic 2 Left",
  102. /* 0x09 */ "Line/Mic 2 Right",
  103. /* 0x0a */ "SPDIF Left",
  104. /* 0x0b */ "SPDIF Right",
  105. /* 0x0c */ "Aux2 Left",
  106. /* 0x0d */ "Aux2 Right",
  107. /* 0x0e */ NULL,
  108. /* 0x0f */ NULL
  109. };
  110. static char *creative_outs[32] = {
  111. /* 0x00 */ "AC97 Left",
  112. /* 0x01 */ "AC97 Right",
  113. /* 0x02 */ "Optical IEC958 Left",
  114. /* 0x03 */ "Optical IEC958 Right",
  115. /* 0x04 */ "Center",
  116. /* 0x05 */ "LFE",
  117. /* 0x06 */ "Headphone Left",
  118. /* 0x07 */ "Headphone Right",
  119. /* 0x08 */ "Surround Left",
  120. /* 0x09 */ "Surround Right",
  121. /* 0x0a */ "PCM Capture Left",
  122. /* 0x0b */ "PCM Capture Right",
  123. /* 0x0c */ "MIC Capture",
  124. /* 0x0d */ "AC97 Surround Left",
  125. /* 0x0e */ "AC97 Surround Right",
  126. /* 0x0f */ NULL,
  127. /* 0x10 */ NULL,
  128. /* 0x11 */ "Analog Center",
  129. /* 0x12 */ "Analog LFE",
  130. /* 0x13 */ NULL,
  131. /* 0x14 */ NULL,
  132. /* 0x15 */ NULL,
  133. /* 0x16 */ NULL,
  134. /* 0x17 */ NULL,
  135. /* 0x18 */ NULL,
  136. /* 0x19 */ NULL,
  137. /* 0x1a */ NULL,
  138. /* 0x1b */ NULL,
  139. /* 0x1c */ NULL,
  140. /* 0x1d */ NULL,
  141. /* 0x1e */ NULL,
  142. /* 0x1f */ NULL,
  143. };
  144. static char *audigy_outs[32] = {
  145. /* 0x00 */ "Digital Front Left",
  146. /* 0x01 */ "Digital Front Right",
  147. /* 0x02 */ "Digital Center",
  148. /* 0x03 */ "Digital LEF",
  149. /* 0x04 */ "Headphone Left",
  150. /* 0x05 */ "Headphone Right",
  151. /* 0x06 */ "Digital Rear Left",
  152. /* 0x07 */ "Digital Rear Right",
  153. /* 0x08 */ "Front Left",
  154. /* 0x09 */ "Front Right",
  155. /* 0x0a */ "Center",
  156. /* 0x0b */ "LFE",
  157. /* 0x0c */ NULL,
  158. /* 0x0d */ NULL,
  159. /* 0x0e */ "Rear Left",
  160. /* 0x0f */ "Rear Right",
  161. /* 0x10 */ "AC97 Front Left",
  162. /* 0x11 */ "AC97 Front Right",
  163. /* 0x12 */ "ADC Caputre Left",
  164. /* 0x13 */ "ADC Capture Right",
  165. /* 0x14 */ NULL,
  166. /* 0x15 */ NULL,
  167. /* 0x16 */ NULL,
  168. /* 0x17 */ NULL,
  169. /* 0x18 */ NULL,
  170. /* 0x19 */ NULL,
  171. /* 0x1a */ NULL,
  172. /* 0x1b */ NULL,
  173. /* 0x1c */ NULL,
  174. /* 0x1d */ NULL,
  175. /* 0x1e */ NULL,
  176. /* 0x1f */ NULL,
  177. };
  178. static const u32 bass_table[41][5] = {
  179. { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
  180. { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
  181. { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
  182. { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
  183. { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
  184. { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
  185. { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
  186. { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
  187. { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
  188. { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
  189. { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
  190. { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
  191. { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
  192. { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
  193. { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
  194. { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
  195. { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
  196. { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
  197. { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
  198. { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
  199. { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
  200. { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
  201. { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
  202. { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
  203. { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
  204. { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
  205. { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
  206. { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
  207. { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
  208. { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
  209. { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
  210. { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
  211. { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
  212. { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
  213. { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
  214. { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
  215. { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
  216. { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
  217. { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
  218. { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
  219. { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
  220. };
  221. static const u32 treble_table[41][5] = {
  222. { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
  223. { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
  224. { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
  225. { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
  226. { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
  227. { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
  228. { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
  229. { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
  230. { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
  231. { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
  232. { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
  233. { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
  234. { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
  235. { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
  236. { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
  237. { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
  238. { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
  239. { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
  240. { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
  241. { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
  242. { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
  243. { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
  244. { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
  245. { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
  246. { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
  247. { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
  248. { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
  249. { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
  250. { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
  251. { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
  252. { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
  253. { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
  254. { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
  255. { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
  256. { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
  257. { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
  258. { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
  259. { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
  260. { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
  261. { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
  262. { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
  263. };
  264. /* dB gain = (float) 20 * log10( float(db_table_value) / 0x8000000 ) */
  265. static const u32 db_table[101] = {
  266. 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
  267. 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
  268. 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
  269. 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
  270. 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
  271. 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
  272. 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
  273. 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
  274. 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
  275. 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
  276. 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
  277. 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
  278. 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
  279. 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
  280. 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
  281. 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
  282. 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
  283. 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
  284. 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
  285. 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
  286. 0x7fffffff,
  287. };
  288. /* EMU10k1/EMU10k2 DSP control db gain */
  289. static const DECLARE_TLV_DB_SCALE(snd_emu10k1_db_scale1, -4000, 40, 1);
  290. static const DECLARE_TLV_DB_LINEAR(snd_emu10k1_db_linear, TLV_DB_GAIN_MUTE, 0);
  291. /* EMU10K1 bass/treble db gain */
  292. static const DECLARE_TLV_DB_SCALE(snd_emu10k1_bass_treble_db_scale, -1200, 60, 0);
  293. static const u32 onoff_table[2] = {
  294. 0x00000000, 0x00000001
  295. };
  296. /*
  297. */
  298. static inline mm_segment_t snd_enter_user(void)
  299. {
  300. mm_segment_t fs = get_fs();
  301. set_fs(get_ds());
  302. return fs;
  303. }
  304. static inline void snd_leave_user(mm_segment_t fs)
  305. {
  306. set_fs(fs);
  307. }
  308. /*
  309. * controls
  310. */
  311. static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  312. {
  313. struct snd_emu10k1_fx8010_ctl *ctl =
  314. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  315. if (ctl->min == 0 && ctl->max == 1)
  316. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  317. else
  318. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  319. uinfo->count = ctl->vcount;
  320. uinfo->value.integer.min = ctl->min;
  321. uinfo->value.integer.max = ctl->max;
  322. return 0;
  323. }
  324. static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  325. {
  326. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  327. struct snd_emu10k1_fx8010_ctl *ctl =
  328. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  329. unsigned long flags;
  330. unsigned int i;
  331. spin_lock_irqsave(&emu->reg_lock, flags);
  332. for (i = 0; i < ctl->vcount; i++)
  333. ucontrol->value.integer.value[i] = ctl->value[i];
  334. spin_unlock_irqrestore(&emu->reg_lock, flags);
  335. return 0;
  336. }
  337. static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  338. {
  339. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  340. struct snd_emu10k1_fx8010_ctl *ctl =
  341. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  342. unsigned long flags;
  343. unsigned int nval, val;
  344. unsigned int i, j;
  345. int change = 0;
  346. spin_lock_irqsave(&emu->reg_lock, flags);
  347. for (i = 0; i < ctl->vcount; i++) {
  348. nval = ucontrol->value.integer.value[i];
  349. if (nval < ctl->min)
  350. nval = ctl->min;
  351. if (nval > ctl->max)
  352. nval = ctl->max;
  353. if (nval != ctl->value[i])
  354. change = 1;
  355. val = ctl->value[i] = nval;
  356. switch (ctl->translation) {
  357. case EMU10K1_GPR_TRANSLATION_NONE:
  358. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
  359. break;
  360. case EMU10K1_GPR_TRANSLATION_TABLE100:
  361. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
  362. break;
  363. case EMU10K1_GPR_TRANSLATION_BASS:
  364. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  365. change = -EIO;
  366. goto __error;
  367. }
  368. for (j = 0; j < 5; j++)
  369. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
  370. break;
  371. case EMU10K1_GPR_TRANSLATION_TREBLE:
  372. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  373. change = -EIO;
  374. goto __error;
  375. }
  376. for (j = 0; j < 5; j++)
  377. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
  378. break;
  379. case EMU10K1_GPR_TRANSLATION_ONOFF:
  380. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
  381. break;
  382. }
  383. }
  384. __error:
  385. spin_unlock_irqrestore(&emu->reg_lock, flags);
  386. return change;
  387. }
  388. /*
  389. * Interrupt handler
  390. */
  391. static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
  392. {
  393. struct snd_emu10k1_fx8010_irq *irq, *nirq;
  394. irq = emu->fx8010.irq_handlers;
  395. while (irq) {
  396. nirq = irq->next; /* irq ptr can be removed from list */
  397. if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
  398. if (irq->handler)
  399. irq->handler(emu, irq->private_data);
  400. snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
  401. }
  402. irq = nirq;
  403. }
  404. }
  405. int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
  406. snd_fx8010_irq_handler_t *handler,
  407. unsigned char gpr_running,
  408. void *private_data,
  409. struct snd_emu10k1_fx8010_irq **r_irq)
  410. {
  411. struct snd_emu10k1_fx8010_irq *irq;
  412. unsigned long flags;
  413. irq = kmalloc(sizeof(*irq), GFP_ATOMIC);
  414. if (irq == NULL)
  415. return -ENOMEM;
  416. irq->handler = handler;
  417. irq->gpr_running = gpr_running;
  418. irq->private_data = private_data;
  419. irq->next = NULL;
  420. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  421. if (emu->fx8010.irq_handlers == NULL) {
  422. emu->fx8010.irq_handlers = irq;
  423. emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
  424. snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
  425. } else {
  426. irq->next = emu->fx8010.irq_handlers;
  427. emu->fx8010.irq_handlers = irq;
  428. }
  429. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  430. if (r_irq)
  431. *r_irq = irq;
  432. return 0;
  433. }
  434. int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
  435. struct snd_emu10k1_fx8010_irq *irq)
  436. {
  437. struct snd_emu10k1_fx8010_irq *tmp;
  438. unsigned long flags;
  439. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  440. if ((tmp = emu->fx8010.irq_handlers) == irq) {
  441. emu->fx8010.irq_handlers = tmp->next;
  442. if (emu->fx8010.irq_handlers == NULL) {
  443. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  444. emu->dsp_interrupt = NULL;
  445. }
  446. } else {
  447. while (tmp && tmp->next != irq)
  448. tmp = tmp->next;
  449. if (tmp)
  450. tmp->next = tmp->next->next;
  451. }
  452. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  453. kfree(irq);
  454. return 0;
  455. }
  456. /*************************************************************************
  457. * EMU10K1 effect manager
  458. *************************************************************************/
  459. static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
  460. unsigned int *ptr,
  461. u32 op, u32 r, u32 a, u32 x, u32 y)
  462. {
  463. u_int32_t *code;
  464. if (snd_BUG_ON(*ptr >= 512))
  465. return;
  466. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  467. set_bit(*ptr, icode->code_valid);
  468. code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
  469. code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
  470. (*ptr)++;
  471. }
  472. #define OP(icode, ptr, op, r, a, x, y) \
  473. snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
  474. static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
  475. unsigned int *ptr,
  476. u32 op, u32 r, u32 a, u32 x, u32 y)
  477. {
  478. u_int32_t *code;
  479. if (snd_BUG_ON(*ptr >= 1024))
  480. return;
  481. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  482. set_bit(*ptr, icode->code_valid);
  483. code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
  484. code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
  485. (*ptr)++;
  486. }
  487. #define A_OP(icode, ptr, op, r, a, x, y) \
  488. snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
  489. static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
  490. {
  491. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  492. snd_emu10k1_ptr_write(emu, pc, 0, data);
  493. }
  494. unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
  495. {
  496. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  497. return snd_emu10k1_ptr_read(emu, pc, 0);
  498. }
  499. static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
  500. struct snd_emu10k1_fx8010_code *icode)
  501. {
  502. int gpr;
  503. u32 val;
  504. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  505. if (!test_bit(gpr, icode->gpr_valid))
  506. continue;
  507. if (get_user(val, &icode->gpr_map[gpr]))
  508. return -EFAULT;
  509. snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
  510. }
  511. return 0;
  512. }
  513. static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
  514. struct snd_emu10k1_fx8010_code *icode)
  515. {
  516. int gpr;
  517. u32 val;
  518. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  519. set_bit(gpr, icode->gpr_valid);
  520. val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
  521. if (put_user(val, &icode->gpr_map[gpr]))
  522. return -EFAULT;
  523. }
  524. return 0;
  525. }
  526. static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
  527. struct snd_emu10k1_fx8010_code *icode)
  528. {
  529. int tram;
  530. u32 addr, val;
  531. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  532. if (!test_bit(tram, icode->tram_valid))
  533. continue;
  534. if (get_user(val, &icode->tram_data_map[tram]) ||
  535. get_user(addr, &icode->tram_addr_map[tram]))
  536. return -EFAULT;
  537. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
  538. if (!emu->audigy) {
  539. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
  540. } else {
  541. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
  542. snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
  543. }
  544. }
  545. return 0;
  546. }
  547. static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
  548. struct snd_emu10k1_fx8010_code *icode)
  549. {
  550. int tram;
  551. u32 val, addr;
  552. memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
  553. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  554. set_bit(tram, icode->tram_valid);
  555. val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
  556. if (!emu->audigy) {
  557. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
  558. } else {
  559. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
  560. addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
  561. }
  562. if (put_user(val, &icode->tram_data_map[tram]) ||
  563. put_user(addr, &icode->tram_addr_map[tram]))
  564. return -EFAULT;
  565. }
  566. return 0;
  567. }
  568. static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
  569. struct snd_emu10k1_fx8010_code *icode)
  570. {
  571. u32 pc, lo, hi;
  572. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  573. if (!test_bit(pc / 2, icode->code_valid))
  574. continue;
  575. if (get_user(lo, &icode->code[pc + 0]) ||
  576. get_user(hi, &icode->code[pc + 1]))
  577. return -EFAULT;
  578. snd_emu10k1_efx_write(emu, pc + 0, lo);
  579. snd_emu10k1_efx_write(emu, pc + 1, hi);
  580. }
  581. return 0;
  582. }
  583. static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
  584. struct snd_emu10k1_fx8010_code *icode)
  585. {
  586. u32 pc;
  587. memset(icode->code_valid, 0, sizeof(icode->code_valid));
  588. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  589. set_bit(pc / 2, icode->code_valid);
  590. if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0]))
  591. return -EFAULT;
  592. if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1]))
  593. return -EFAULT;
  594. }
  595. return 0;
  596. }
  597. static struct snd_emu10k1_fx8010_ctl *
  598. snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id)
  599. {
  600. struct snd_emu10k1_fx8010_ctl *ctl;
  601. struct snd_kcontrol *kcontrol;
  602. list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) {
  603. kcontrol = ctl->kcontrol;
  604. if (kcontrol->id.iface == id->iface &&
  605. !strcmp(kcontrol->id.name, id->name) &&
  606. kcontrol->id.index == id->index)
  607. return ctl;
  608. }
  609. return NULL;
  610. }
  611. #define MAX_TLV_SIZE 256
  612. static unsigned int *copy_tlv(const unsigned int __user *_tlv)
  613. {
  614. unsigned int data[2];
  615. unsigned int *tlv;
  616. if (!_tlv)
  617. return NULL;
  618. if (copy_from_user(data, _tlv, sizeof(data)))
  619. return NULL;
  620. if (data[1] >= MAX_TLV_SIZE)
  621. return NULL;
  622. tlv = kmalloc(data[1] + sizeof(data), GFP_KERNEL);
  623. if (!tlv)
  624. return NULL;
  625. memcpy(tlv, data, sizeof(data));
  626. if (copy_from_user(tlv + 2, _tlv + 2, data[1])) {
  627. kfree(tlv);
  628. return NULL;
  629. }
  630. return tlv;
  631. }
  632. static int copy_gctl(struct snd_emu10k1 *emu,
  633. struct snd_emu10k1_fx8010_control_gpr *gctl,
  634. struct snd_emu10k1_fx8010_control_gpr __user *_gctl,
  635. int idx)
  636. {
  637. struct snd_emu10k1_fx8010_control_old_gpr __user *octl;
  638. if (emu->support_tlv)
  639. return copy_from_user(gctl, &_gctl[idx], sizeof(*gctl));
  640. octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)_gctl;
  641. if (copy_from_user(gctl, &octl[idx], sizeof(*octl)))
  642. return -EFAULT;
  643. gctl->tlv = NULL;
  644. return 0;
  645. }
  646. static int copy_gctl_to_user(struct snd_emu10k1 *emu,
  647. struct snd_emu10k1_fx8010_control_gpr __user *_gctl,
  648. struct snd_emu10k1_fx8010_control_gpr *gctl,
  649. int idx)
  650. {
  651. struct snd_emu10k1_fx8010_control_old_gpr __user *octl;
  652. if (emu->support_tlv)
  653. return copy_to_user(&_gctl[idx], gctl, sizeof(*gctl));
  654. octl = (struct snd_emu10k1_fx8010_control_old_gpr __user *)_gctl;
  655. return copy_to_user(&octl[idx], gctl, sizeof(*octl));
  656. }
  657. static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
  658. struct snd_emu10k1_fx8010_code *icode)
  659. {
  660. unsigned int i;
  661. struct snd_ctl_elem_id __user *_id;
  662. struct snd_ctl_elem_id id;
  663. struct snd_emu10k1_fx8010_control_gpr *gctl;
  664. int err;
  665. for (i = 0, _id = icode->gpr_del_controls;
  666. i < icode->gpr_del_control_count; i++, _id++) {
  667. if (copy_from_user(&id, _id, sizeof(id)))
  668. return -EFAULT;
  669. if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
  670. return -ENOENT;
  671. }
  672. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  673. if (! gctl)
  674. return -ENOMEM;
  675. err = 0;
  676. for (i = 0; i < icode->gpr_add_control_count; i++) {
  677. if (copy_gctl(emu, gctl, icode->gpr_add_controls, i)) {
  678. err = -EFAULT;
  679. goto __error;
  680. }
  681. if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
  682. continue;
  683. down_read(&emu->card->controls_rwsem);
  684. if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) {
  685. up_read(&emu->card->controls_rwsem);
  686. err = -EEXIST;
  687. goto __error;
  688. }
  689. up_read(&emu->card->controls_rwsem);
  690. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  691. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  692. err = -EINVAL;
  693. goto __error;
  694. }
  695. }
  696. for (i = 0; i < icode->gpr_list_control_count; i++) {
  697. /* FIXME: we need to check the WRITE access */
  698. if (copy_gctl(emu, gctl, icode->gpr_list_controls, i)) {
  699. err = -EFAULT;
  700. goto __error;
  701. }
  702. }
  703. __error:
  704. kfree(gctl);
  705. return err;
  706. }
  707. static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
  708. {
  709. struct snd_emu10k1_fx8010_ctl *ctl;
  710. ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
  711. kctl->private_value = 0;
  712. list_del(&ctl->list);
  713. kfree(ctl);
  714. kfree(kctl->tlv.p);
  715. }
  716. static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
  717. struct snd_emu10k1_fx8010_code *icode)
  718. {
  719. unsigned int i, j;
  720. struct snd_emu10k1_fx8010_control_gpr *gctl;
  721. struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
  722. struct snd_kcontrol_new knew;
  723. struct snd_kcontrol *kctl;
  724. struct snd_ctl_elem_value *val;
  725. int err = 0;
  726. val = kmalloc(sizeof(*val), GFP_KERNEL);
  727. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  728. nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
  729. if (!val || !gctl || !nctl) {
  730. err = -ENOMEM;
  731. goto __error;
  732. }
  733. for (i = 0; i < icode->gpr_add_control_count; i++) {
  734. if (copy_gctl(emu, gctl, icode->gpr_add_controls, i)) {
  735. err = -EFAULT;
  736. goto __error;
  737. }
  738. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  739. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  740. err = -EINVAL;
  741. goto __error;
  742. }
  743. if (! gctl->id.name[0]) {
  744. err = -EINVAL;
  745. goto __error;
  746. }
  747. ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
  748. memset(&knew, 0, sizeof(knew));
  749. knew.iface = gctl->id.iface;
  750. knew.name = gctl->id.name;
  751. knew.index = gctl->id.index;
  752. knew.device = gctl->id.device;
  753. knew.subdevice = gctl->id.subdevice;
  754. knew.info = snd_emu10k1_gpr_ctl_info;
  755. knew.tlv.p = copy_tlv(gctl->tlv);
  756. if (knew.tlv.p)
  757. knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  758. SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  759. knew.get = snd_emu10k1_gpr_ctl_get;
  760. knew.put = snd_emu10k1_gpr_ctl_put;
  761. memset(nctl, 0, sizeof(*nctl));
  762. nctl->vcount = gctl->vcount;
  763. nctl->count = gctl->count;
  764. for (j = 0; j < 32; j++) {
  765. nctl->gpr[j] = gctl->gpr[j];
  766. nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
  767. val->value.integer.value[j] = gctl->value[j];
  768. }
  769. nctl->min = gctl->min;
  770. nctl->max = gctl->max;
  771. nctl->translation = gctl->translation;
  772. if (ctl == NULL) {
  773. ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
  774. if (ctl == NULL) {
  775. err = -ENOMEM;
  776. kfree(knew.tlv.p);
  777. goto __error;
  778. }
  779. knew.private_value = (unsigned long)ctl;
  780. *ctl = *nctl;
  781. if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) {
  782. kfree(ctl);
  783. kfree(knew.tlv.p);
  784. goto __error;
  785. }
  786. kctl->private_free = snd_emu10k1_ctl_private_free;
  787. ctl->kcontrol = kctl;
  788. list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
  789. } else {
  790. /* overwrite */
  791. nctl->list = ctl->list;
  792. nctl->kcontrol = ctl->kcontrol;
  793. *ctl = *nctl;
  794. snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
  795. SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
  796. }
  797. snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
  798. }
  799. __error:
  800. kfree(nctl);
  801. kfree(gctl);
  802. kfree(val);
  803. return err;
  804. }
  805. static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
  806. struct snd_emu10k1_fx8010_code *icode)
  807. {
  808. unsigned int i;
  809. struct snd_ctl_elem_id id;
  810. struct snd_ctl_elem_id __user *_id;
  811. struct snd_emu10k1_fx8010_ctl *ctl;
  812. struct snd_card *card = emu->card;
  813. for (i = 0, _id = icode->gpr_del_controls;
  814. i < icode->gpr_del_control_count; i++, _id++) {
  815. if (copy_from_user(&id, _id, sizeof(id)))
  816. return -EFAULT;
  817. down_write(&card->controls_rwsem);
  818. ctl = snd_emu10k1_look_for_ctl(emu, &id);
  819. if (ctl)
  820. snd_ctl_remove(card, ctl->kcontrol);
  821. up_write(&card->controls_rwsem);
  822. }
  823. return 0;
  824. }
  825. static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
  826. struct snd_emu10k1_fx8010_code *icode)
  827. {
  828. unsigned int i = 0, j;
  829. unsigned int total = 0;
  830. struct snd_emu10k1_fx8010_control_gpr *gctl;
  831. struct snd_emu10k1_fx8010_ctl *ctl;
  832. struct snd_ctl_elem_id *id;
  833. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  834. if (! gctl)
  835. return -ENOMEM;
  836. list_for_each_entry(ctl, &emu->fx8010.gpr_ctl, list) {
  837. total++;
  838. if (icode->gpr_list_controls &&
  839. i < icode->gpr_list_control_count) {
  840. memset(gctl, 0, sizeof(*gctl));
  841. id = &ctl->kcontrol->id;
  842. gctl->id.iface = id->iface;
  843. strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name));
  844. gctl->id.index = id->index;
  845. gctl->id.device = id->device;
  846. gctl->id.subdevice = id->subdevice;
  847. gctl->vcount = ctl->vcount;
  848. gctl->count = ctl->count;
  849. for (j = 0; j < 32; j++) {
  850. gctl->gpr[j] = ctl->gpr[j];
  851. gctl->value[j] = ctl->value[j];
  852. }
  853. gctl->min = ctl->min;
  854. gctl->max = ctl->max;
  855. gctl->translation = ctl->translation;
  856. if (copy_gctl_to_user(emu, icode->gpr_list_controls,
  857. gctl, i)) {
  858. kfree(gctl);
  859. return -EFAULT;
  860. }
  861. i++;
  862. }
  863. }
  864. icode->gpr_list_control_total = total;
  865. kfree(gctl);
  866. return 0;
  867. }
  868. static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
  869. struct snd_emu10k1_fx8010_code *icode)
  870. {
  871. int err = 0;
  872. mutex_lock(&emu->fx8010.lock);
  873. if ((err = snd_emu10k1_verify_controls(emu, icode)) < 0)
  874. goto __error;
  875. strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
  876. /* stop FX processor - this may be dangerous, but it's better to miss
  877. some samples than generate wrong ones - [jk] */
  878. if (emu->audigy)
  879. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  880. else
  881. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  882. /* ok, do the main job */
  883. if ((err = snd_emu10k1_del_controls(emu, icode)) < 0 ||
  884. (err = snd_emu10k1_gpr_poke(emu, icode)) < 0 ||
  885. (err = snd_emu10k1_tram_poke(emu, icode)) < 0 ||
  886. (err = snd_emu10k1_code_poke(emu, icode)) < 0 ||
  887. (err = snd_emu10k1_add_controls(emu, icode)) < 0)
  888. goto __error;
  889. /* start FX processor when the DSP code is updated */
  890. if (emu->audigy)
  891. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  892. else
  893. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  894. __error:
  895. mutex_unlock(&emu->fx8010.lock);
  896. return err;
  897. }
  898. static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
  899. struct snd_emu10k1_fx8010_code *icode)
  900. {
  901. int err;
  902. mutex_lock(&emu->fx8010.lock);
  903. strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name));
  904. /* ok, do the main job */
  905. err = snd_emu10k1_gpr_peek(emu, icode);
  906. if (err >= 0)
  907. err = snd_emu10k1_tram_peek(emu, icode);
  908. if (err >= 0)
  909. err = snd_emu10k1_code_peek(emu, icode);
  910. if (err >= 0)
  911. err = snd_emu10k1_list_controls(emu, icode);
  912. mutex_unlock(&emu->fx8010.lock);
  913. return err;
  914. }
  915. static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
  916. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  917. {
  918. unsigned int i;
  919. int err = 0;
  920. struct snd_emu10k1_fx8010_pcm *pcm;
  921. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  922. return -EINVAL;
  923. if (ipcm->channels > 32)
  924. return -EINVAL;
  925. pcm = &emu->fx8010.pcm[ipcm->substream];
  926. mutex_lock(&emu->fx8010.lock);
  927. spin_lock_irq(&emu->reg_lock);
  928. if (pcm->opened) {
  929. err = -EBUSY;
  930. goto __error;
  931. }
  932. if (ipcm->channels == 0) { /* remove */
  933. pcm->valid = 0;
  934. } else {
  935. /* FIXME: we need to add universal code to the PCM transfer routine */
  936. if (ipcm->channels != 2) {
  937. err = -EINVAL;
  938. goto __error;
  939. }
  940. pcm->valid = 1;
  941. pcm->opened = 0;
  942. pcm->channels = ipcm->channels;
  943. pcm->tram_start = ipcm->tram_start;
  944. pcm->buffer_size = ipcm->buffer_size;
  945. pcm->gpr_size = ipcm->gpr_size;
  946. pcm->gpr_count = ipcm->gpr_count;
  947. pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
  948. pcm->gpr_ptr = ipcm->gpr_ptr;
  949. pcm->gpr_trigger = ipcm->gpr_trigger;
  950. pcm->gpr_running = ipcm->gpr_running;
  951. for (i = 0; i < pcm->channels; i++)
  952. pcm->etram[i] = ipcm->etram[i];
  953. }
  954. __error:
  955. spin_unlock_irq(&emu->reg_lock);
  956. mutex_unlock(&emu->fx8010.lock);
  957. return err;
  958. }
  959. static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
  960. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  961. {
  962. unsigned int i;
  963. int err = 0;
  964. struct snd_emu10k1_fx8010_pcm *pcm;
  965. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  966. return -EINVAL;
  967. pcm = &emu->fx8010.pcm[ipcm->substream];
  968. mutex_lock(&emu->fx8010.lock);
  969. spin_lock_irq(&emu->reg_lock);
  970. ipcm->channels = pcm->channels;
  971. ipcm->tram_start = pcm->tram_start;
  972. ipcm->buffer_size = pcm->buffer_size;
  973. ipcm->gpr_size = pcm->gpr_size;
  974. ipcm->gpr_ptr = pcm->gpr_ptr;
  975. ipcm->gpr_count = pcm->gpr_count;
  976. ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
  977. ipcm->gpr_trigger = pcm->gpr_trigger;
  978. ipcm->gpr_running = pcm->gpr_running;
  979. for (i = 0; i < pcm->channels; i++)
  980. ipcm->etram[i] = pcm->etram[i];
  981. ipcm->res1 = ipcm->res2 = 0;
  982. ipcm->pad = 0;
  983. spin_unlock_irq(&emu->reg_lock);
  984. mutex_unlock(&emu->fx8010.lock);
  985. return err;
  986. }
  987. #define SND_EMU10K1_GPR_CONTROLS 44
  988. #define SND_EMU10K1_INPUTS 12
  989. #define SND_EMU10K1_PLAYBACK_CHANNELS 8
  990. #define SND_EMU10K1_CAPTURE_CHANNELS 4
  991. static void
  992. snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  993. const char *name, int gpr, int defval)
  994. {
  995. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  996. strcpy(ctl->id.name, name);
  997. ctl->vcount = ctl->count = 1;
  998. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  999. if (high_res_gpr_volume) {
  1000. ctl->min = 0;
  1001. ctl->max = 0x7fffffff;
  1002. ctl->tlv = snd_emu10k1_db_linear;
  1003. ctl->translation = EMU10K1_GPR_TRANSLATION_NONE;
  1004. } else {
  1005. ctl->min = 0;
  1006. ctl->max = 100;
  1007. ctl->tlv = snd_emu10k1_db_scale1;
  1008. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  1009. }
  1010. }
  1011. static void
  1012. snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1013. const char *name, int gpr, int defval)
  1014. {
  1015. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1016. strcpy(ctl->id.name, name);
  1017. ctl->vcount = ctl->count = 2;
  1018. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1019. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  1020. if (high_res_gpr_volume) {
  1021. ctl->min = 0;
  1022. ctl->max = 0x7fffffff;
  1023. ctl->tlv = snd_emu10k1_db_linear;
  1024. ctl->translation = EMU10K1_GPR_TRANSLATION_NONE;
  1025. } else {
  1026. ctl->min = 0;
  1027. ctl->max = 100;
  1028. ctl->tlv = snd_emu10k1_db_scale1;
  1029. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  1030. }
  1031. }
  1032. static void
  1033. snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1034. const char *name, int gpr, int defval)
  1035. {
  1036. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1037. strcpy(ctl->id.name, name);
  1038. ctl->vcount = ctl->count = 1;
  1039. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1040. ctl->min = 0;
  1041. ctl->max = 1;
  1042. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  1043. }
  1044. static void
  1045. snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  1046. const char *name, int gpr, int defval)
  1047. {
  1048. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1049. strcpy(ctl->id.name, name);
  1050. ctl->vcount = ctl->count = 2;
  1051. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  1052. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  1053. ctl->min = 0;
  1054. ctl->max = 1;
  1055. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  1056. }
  1057. /*
  1058. * Used for emu1010 - conversion from 32-bit capture inputs from HANA
  1059. * to 2 x 16-bit registers in audigy - their values are read via DMA.
  1060. * Conversion is performed by Audigy DSP instructions of FX8010.
  1061. */
  1062. static int snd_emu10k1_audigy_dsp_convert_32_to_2x16(
  1063. struct snd_emu10k1_fx8010_code *icode,
  1064. u32 *ptr, int tmp, int bit_shifter16,
  1065. int reg_in, int reg_out)
  1066. {
  1067. A_OP(icode, ptr, iACC3, A_GPR(tmp + 1), reg_in, A_C_00000000, A_C_00000000);
  1068. A_OP(icode, ptr, iANDXOR, A_GPR(tmp), A_GPR(tmp + 1), A_GPR(bit_shifter16 - 1), A_C_00000000);
  1069. A_OP(icode, ptr, iTSTNEG, A_GPR(tmp + 2), A_GPR(tmp), A_C_80000000, A_GPR(bit_shifter16 - 2));
  1070. A_OP(icode, ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_C_80000000, A_C_00000000);
  1071. A_OP(icode, ptr, iANDXOR, A_GPR(tmp), A_GPR(tmp), A_GPR(bit_shifter16 - 3), A_C_00000000);
  1072. A_OP(icode, ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A_GPR(tmp), A_C_00010000);
  1073. A_OP(icode, ptr, iANDXOR, reg_out, A_GPR(tmp), A_C_ffffffff, A_GPR(tmp + 2));
  1074. A_OP(icode, ptr, iACC3, reg_out + 1, A_GPR(tmp + 1), A_C_00000000, A_C_00000000);
  1075. return 1;
  1076. }
  1077. /*
  1078. * initial DSP configuration for Audigy
  1079. */
  1080. static int _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
  1081. {
  1082. int err, i, z, gpr, nctl;
  1083. int bit_shifter16;
  1084. const int playback = 10;
  1085. const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
  1086. const int stereo_mix = capture + 2;
  1087. const int tmp = 0x88;
  1088. u32 ptr;
  1089. struct snd_emu10k1_fx8010_code *icode = NULL;
  1090. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1091. u32 *gpr_map;
  1092. mm_segment_t seg;
  1093. err = -ENOMEM;
  1094. icode = kzalloc(sizeof(*icode), GFP_KERNEL);
  1095. if (!icode)
  1096. return err;
  1097. icode->gpr_map = (u_int32_t __user *) kcalloc(512 + 256 + 256 + 2 * 1024,
  1098. sizeof(u_int32_t), GFP_KERNEL);
  1099. if (!icode->gpr_map)
  1100. goto __err_gpr;
  1101. controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1102. sizeof(*controls), GFP_KERNEL);
  1103. if (!controls)
  1104. goto __err_ctrls;
  1105. gpr_map = (u32 __force *)icode->gpr_map;
  1106. icode->tram_data_map = icode->gpr_map + 512;
  1107. icode->tram_addr_map = icode->tram_data_map + 256;
  1108. icode->code = icode->tram_addr_map + 256;
  1109. /* clear free GPRs */
  1110. for (i = 0; i < 512; i++)
  1111. set_bit(i, icode->gpr_valid);
  1112. /* clear TRAM data & address lines */
  1113. for (i = 0; i < 256; i++)
  1114. set_bit(i, icode->tram_valid);
  1115. strcpy(icode->name, "Audigy DSP code for ALSA");
  1116. ptr = 0;
  1117. nctl = 0;
  1118. gpr = stereo_mix + 10;
  1119. gpr_map[gpr++] = 0x00007fff;
  1120. gpr_map[gpr++] = 0x00008000;
  1121. gpr_map[gpr++] = 0x0000ffff;
  1122. bit_shifter16 = gpr;
  1123. /* stop FX processor */
  1124. snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
  1125. #if 1
  1126. /* PCM front Playback Volume (independent from stereo mix)
  1127. * playback = 0 + ( gpr * FXBUS_PCM_LEFT_FRONT >> 31)
  1128. * where gpr contains attenuation from corresponding mixer control
  1129. * (snd_emu10k1_init_stereo_control)
  1130. */
  1131. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
  1132. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
  1133. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
  1134. gpr += 2;
  1135. /* PCM Surround Playback (independent from stereo mix) */
  1136. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
  1137. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
  1138. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
  1139. gpr += 2;
  1140. /* PCM Side Playback (independent from stereo mix) */
  1141. if (emu->card_capabilities->spk71) {
  1142. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
  1143. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
  1144. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
  1145. gpr += 2;
  1146. }
  1147. /* PCM Center Playback (independent from stereo mix) */
  1148. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
  1149. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
  1150. gpr++;
  1151. /* PCM LFE Playback (independent from stereo mix) */
  1152. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
  1153. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
  1154. gpr++;
  1155. /*
  1156. * Stereo Mix
  1157. */
  1158. /* Wave (PCM) Playback Volume (will be renamed later) */
  1159. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1160. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1161. snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
  1162. gpr += 2;
  1163. /* Synth Playback */
  1164. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1165. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1166. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
  1167. gpr += 2;
  1168. /* Wave (PCM) Capture */
  1169. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1170. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1171. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
  1172. gpr += 2;
  1173. /* Synth Capture */
  1174. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1175. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1176. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
  1177. gpr += 2;
  1178. /*
  1179. * inputs
  1180. */
  1181. #define A_ADD_VOLUME_IN(var,vol,input) \
  1182. A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
  1183. /* emu1212 DSP 0 and DSP 1 Capture */
  1184. if (emu->card_capabilities->emu_model) {
  1185. if (emu->card_capabilities->ca0108_chip) {
  1186. /* Note:JCD:No longer bit shift lower 16bits to upper 16bits of 32bit value. */
  1187. A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x0), A_C_00000001);
  1188. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_GPR(tmp));
  1189. A_OP(icode, &ptr, iMACINT0, A_GPR(tmp), A_C_00000000, A3_EMU32IN(0x1), A_C_00000001);
  1190. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr), A_GPR(tmp));
  1191. } else {
  1192. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_P16VIN(0x0));
  1193. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_P16VIN(0x1));
  1194. }
  1195. snd_emu10k1_init_stereo_control(&controls[nctl++], "EMU Capture Volume", gpr, 0);
  1196. gpr += 2;
  1197. }
  1198. /* AC'97 Playback Volume - used only for mic (renamed later) */
  1199. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
  1200. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
  1201. snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
  1202. gpr += 2;
  1203. /* AC'97 Capture Volume - used only for mic */
  1204. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
  1205. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
  1206. snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
  1207. gpr += 2;
  1208. /* mic capture buffer */
  1209. A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
  1210. /* Audigy CD Playback Volume */
  1211. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
  1212. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1213. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1214. emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
  1215. gpr, 0);
  1216. gpr += 2;
  1217. /* Audigy CD Capture Volume */
  1218. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
  1219. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1220. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1221. emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
  1222. gpr, 0);
  1223. gpr += 2;
  1224. /* Optical SPDIF Playback Volume */
  1225. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
  1226. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1227. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
  1228. gpr += 2;
  1229. /* Optical SPDIF Capture Volume */
  1230. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
  1231. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1232. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
  1233. gpr += 2;
  1234. /* Line2 Playback Volume */
  1235. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
  1236. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
  1237. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1238. emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
  1239. gpr, 0);
  1240. gpr += 2;
  1241. /* Line2 Capture Volume */
  1242. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
  1243. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
  1244. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1245. emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
  1246. gpr, 0);
  1247. gpr += 2;
  1248. /* Philips ADC Playback Volume */
  1249. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
  1250. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
  1251. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
  1252. gpr += 2;
  1253. /* Philips ADC Capture Volume */
  1254. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
  1255. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
  1256. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
  1257. gpr += 2;
  1258. /* Aux2 Playback Volume */
  1259. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
  1260. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
  1261. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1262. emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
  1263. gpr, 0);
  1264. gpr += 2;
  1265. /* Aux2 Capture Volume */
  1266. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
  1267. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
  1268. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1269. emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
  1270. gpr, 0);
  1271. gpr += 2;
  1272. /* Stereo Mix Front Playback Volume */
  1273. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
  1274. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1275. snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
  1276. gpr += 2;
  1277. /* Stereo Mix Surround Playback */
  1278. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
  1279. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1280. snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
  1281. gpr += 2;
  1282. /* Stereo Mix Center Playback */
  1283. /* Center = sub = Left/2 + Right/2 */
  1284. A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
  1285. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
  1286. snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
  1287. gpr++;
  1288. /* Stereo Mix LFE Playback */
  1289. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
  1290. snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
  1291. gpr++;
  1292. if (emu->card_capabilities->spk71) {
  1293. /* Stereo Mix Side Playback */
  1294. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
  1295. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1296. snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
  1297. gpr += 2;
  1298. }
  1299. /*
  1300. * outputs
  1301. */
  1302. #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
  1303. #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
  1304. {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
  1305. #define _A_SWITCH(icode, ptr, dst, src, sw) \
  1306. A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
  1307. #define A_SWITCH(icode, ptr, dst, src, sw) \
  1308. _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
  1309. #define _A_SWITCH_NEG(icode, ptr, dst, src) \
  1310. A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
  1311. #define A_SWITCH_NEG(icode, ptr, dst, src) \
  1312. _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
  1313. /*
  1314. * Process tone control
  1315. */
  1316. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */
  1317. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */
  1318. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */
  1319. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */
  1320. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */
  1321. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */
  1322. if (emu->card_capabilities->spk71) {
  1323. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */
  1324. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */
  1325. }
  1326. ctl = &controls[nctl + 0];
  1327. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1328. strcpy(ctl->id.name, "Tone Control - Bass");
  1329. ctl->vcount = 2;
  1330. ctl->count = 10;
  1331. ctl->min = 0;
  1332. ctl->max = 40;
  1333. ctl->value[0] = ctl->value[1] = 20;
  1334. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1335. ctl = &controls[nctl + 1];
  1336. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1337. strcpy(ctl->id.name, "Tone Control - Treble");
  1338. ctl->vcount = 2;
  1339. ctl->count = 10;
  1340. ctl->min = 0;
  1341. ctl->max = 40;
  1342. ctl->value[0] = ctl->value[1] = 20;
  1343. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1344. #define BASS_GPR 0x8c
  1345. #define TREBLE_GPR 0x96
  1346. for (z = 0; z < 5; z++) {
  1347. int j;
  1348. for (j = 0; j < 2; j++) {
  1349. controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1350. controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1351. }
  1352. }
  1353. for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
  1354. int j, k, l, d;
  1355. for (j = 0; j < 2; j++) { /* left/right */
  1356. k = 0xb0 + (z * 8) + (j * 4);
  1357. l = 0xe0 + (z * 8) + (j * 4);
  1358. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1359. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j));
  1360. A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j));
  1361. A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j));
  1362. A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j));
  1363. A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j));
  1364. A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
  1365. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j));
  1366. A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j));
  1367. A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j));
  1368. A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j));
  1369. A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j));
  1370. A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
  1371. A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
  1372. if (z == 2) /* center */
  1373. break;
  1374. }
  1375. }
  1376. nctl += 2;
  1377. #undef BASS_GPR
  1378. #undef TREBLE_GPR
  1379. for (z = 0; z < 8; z++) {
  1380. A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1381. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1382. A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1383. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1384. }
  1385. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
  1386. gpr += 2;
  1387. /* Master volume (will be renamed later) */
  1388. A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
  1389. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
  1390. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
  1391. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
  1392. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
  1393. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
  1394. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
  1395. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
  1396. snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
  1397. gpr += 2;
  1398. /* analog speakers */
  1399. A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1400. A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1401. A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1402. A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1403. if (emu->card_capabilities->spk71)
  1404. A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1405. /* headphone */
  1406. A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1407. /* digital outputs */
  1408. /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
  1409. if (emu->card_capabilities->emu_model) {
  1410. /* EMU1010 Outputs from PCM Front, Rear, Center, LFE, Side */
  1411. dev_info(emu->card->dev, "EMU outputs on\n");
  1412. for (z = 0; z < 8; z++) {
  1413. if (emu->card_capabilities->ca0108_chip) {
  1414. A_OP(icode, &ptr, iACC3, A3_EMU32OUT(z), A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_C_00000000, A_C_00000000);
  1415. } else {
  1416. A_OP(icode, &ptr, iACC3, A_EMU32OUTL(z), A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_C_00000000, A_C_00000000);
  1417. }
  1418. }
  1419. }
  1420. /* IEC958 Optical Raw Playback Switch */
  1421. gpr_map[gpr++] = 0;
  1422. gpr_map[gpr++] = 0x1008;
  1423. gpr_map[gpr++] = 0xffff0000;
  1424. for (z = 0; z < 2; z++) {
  1425. A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
  1426. A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
  1427. A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
  1428. A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
  1429. A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
  1430. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1431. A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1432. if ((z==1) && (emu->card_capabilities->spdif_bug)) {
  1433. /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
  1434. dev_info(emu->card->dev,
  1435. "Installing spdif_bug patch: %s\n",
  1436. emu->card_capabilities->name);
  1437. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
  1438. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1439. } else {
  1440. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1441. }
  1442. }
  1443. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1444. gpr += 2;
  1445. A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1446. A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1447. A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1448. /* ADC buffer */
  1449. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1450. A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1451. #else
  1452. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
  1453. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
  1454. #endif
  1455. if (emu->card_capabilities->emu_model) {
  1456. if (emu->card_capabilities->ca0108_chip) {
  1457. dev_info(emu->card->dev, "EMU2 inputs on\n");
  1458. for (z = 0; z < 0x10; z++) {
  1459. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp,
  1460. bit_shifter16,
  1461. A3_EMU32IN(z),
  1462. A_FXBUS2(z*2) );
  1463. }
  1464. } else {
  1465. dev_info(emu->card->dev, "EMU inputs on\n");
  1466. /* Capture 16 (originally 8) channels of S32_LE sound */
  1467. /*
  1468. dev_dbg(emu->card->dev, "emufx.c: gpr=0x%x, tmp=0x%x\n",
  1469. gpr, tmp);
  1470. */
  1471. /* For the EMU1010: How to get 32bit values from the DSP. High 16bits into L, low 16bits into R. */
  1472. /* A_P16VIN(0) is delayed by one sample,
  1473. * so all other A_P16VIN channels will need to also be delayed
  1474. */
  1475. /* Left ADC in. 1 of 2 */
  1476. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_P16VIN(0x0), A_FXBUS2(0) );
  1477. /* Right ADC in 1 of 2 */
  1478. gpr_map[gpr++] = 0x00000000;
  1479. /* Delaying by one sample: instead of copying the input
  1480. * value A_P16VIN to output A_FXBUS2 as in the first channel,
  1481. * we use an auxiliary register, delaying the value by one
  1482. * sample
  1483. */
  1484. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(2) );
  1485. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x1), A_C_00000000, A_C_00000000);
  1486. gpr_map[gpr++] = 0x00000000;
  1487. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(4) );
  1488. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x2), A_C_00000000, A_C_00000000);
  1489. gpr_map[gpr++] = 0x00000000;
  1490. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(6) );
  1491. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x3), A_C_00000000, A_C_00000000);
  1492. /* For 96kHz mode */
  1493. /* Left ADC in. 2 of 2 */
  1494. gpr_map[gpr++] = 0x00000000;
  1495. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0x8) );
  1496. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x4), A_C_00000000, A_C_00000000);
  1497. /* Right ADC in 2 of 2 */
  1498. gpr_map[gpr++] = 0x00000000;
  1499. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xa) );
  1500. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x5), A_C_00000000, A_C_00000000);
  1501. gpr_map[gpr++] = 0x00000000;
  1502. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xc) );
  1503. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x6), A_C_00000000, A_C_00000000);
  1504. gpr_map[gpr++] = 0x00000000;
  1505. snd_emu10k1_audigy_dsp_convert_32_to_2x16( icode, &ptr, tmp, bit_shifter16, A_GPR(gpr - 1), A_FXBUS2(0xe) );
  1506. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x7), A_C_00000000, A_C_00000000);
  1507. /* Pavel Hofman - we still have voices, A_FXBUS2s, and
  1508. * A_P16VINs available -
  1509. * let's add 8 more capture channels - total of 16
  1510. */
  1511. gpr_map[gpr++] = 0x00000000;
  1512. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1513. bit_shifter16,
  1514. A_GPR(gpr - 1),
  1515. A_FXBUS2(0x10));
  1516. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x8),
  1517. A_C_00000000, A_C_00000000);
  1518. gpr_map[gpr++] = 0x00000000;
  1519. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1520. bit_shifter16,
  1521. A_GPR(gpr - 1),
  1522. A_FXBUS2(0x12));
  1523. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0x9),
  1524. A_C_00000000, A_C_00000000);
  1525. gpr_map[gpr++] = 0x00000000;
  1526. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1527. bit_shifter16,
  1528. A_GPR(gpr - 1),
  1529. A_FXBUS2(0x14));
  1530. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xa),
  1531. A_C_00000000, A_C_00000000);
  1532. gpr_map[gpr++] = 0x00000000;
  1533. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1534. bit_shifter16,
  1535. A_GPR(gpr - 1),
  1536. A_FXBUS2(0x16));
  1537. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xb),
  1538. A_C_00000000, A_C_00000000);
  1539. gpr_map[gpr++] = 0x00000000;
  1540. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1541. bit_shifter16,
  1542. A_GPR(gpr - 1),
  1543. A_FXBUS2(0x18));
  1544. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xc),
  1545. A_C_00000000, A_C_00000000);
  1546. gpr_map[gpr++] = 0x00000000;
  1547. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1548. bit_shifter16,
  1549. A_GPR(gpr - 1),
  1550. A_FXBUS2(0x1a));
  1551. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xd),
  1552. A_C_00000000, A_C_00000000);
  1553. gpr_map[gpr++] = 0x00000000;
  1554. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1555. bit_shifter16,
  1556. A_GPR(gpr - 1),
  1557. A_FXBUS2(0x1c));
  1558. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xe),
  1559. A_C_00000000, A_C_00000000);
  1560. gpr_map[gpr++] = 0x00000000;
  1561. snd_emu10k1_audigy_dsp_convert_32_to_2x16(icode, &ptr, tmp,
  1562. bit_shifter16,
  1563. A_GPR(gpr - 1),
  1564. A_FXBUS2(0x1e));
  1565. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 1), A_P16VIN(0xf),
  1566. A_C_00000000, A_C_00000000);
  1567. }
  1568. #if 0
  1569. for (z = 4; z < 8; z++) {
  1570. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000);
  1571. }
  1572. for (z = 0xc; z < 0x10; z++) {
  1573. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_C_00000000);
  1574. }
  1575. #endif
  1576. } else {
  1577. /* EFX capture - capture the 16 EXTINs */
  1578. /* Capture 16 channels of S16_LE sound */
  1579. for (z = 0; z < 16; z++) {
  1580. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
  1581. }
  1582. }
  1583. #endif /* JCD test */
  1584. /*
  1585. * ok, set up done..
  1586. */
  1587. if (gpr > tmp) {
  1588. snd_BUG();
  1589. err = -EIO;
  1590. goto __err;
  1591. }
  1592. /* clear remaining instruction memory */
  1593. while (ptr < 0x400)
  1594. A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
  1595. seg = snd_enter_user();
  1596. icode->gpr_add_control_count = nctl;
  1597. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1598. emu->support_tlv = 1; /* support TLV */
  1599. err = snd_emu10k1_icode_poke(emu, icode);
  1600. emu->support_tlv = 0; /* clear again */
  1601. snd_leave_user(seg);
  1602. __err:
  1603. kfree(controls);
  1604. __err_ctrls:
  1605. kfree((void __force *)icode->gpr_map);
  1606. __err_gpr:
  1607. kfree(icode);
  1608. return err;
  1609. }
  1610. /*
  1611. * initial DSP configuration for Emu10k1
  1612. */
  1613. /* when volume = max, then copy only to avoid volume modification */
  1614. /* with iMAC0 (negative values) */
  1615. static void _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1616. {
  1617. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1618. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1619. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001);
  1620. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1621. }
  1622. static void _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1623. {
  1624. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1625. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1626. OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001);
  1627. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1628. OP(icode, ptr, iMAC0, dst, dst, src, vol);
  1629. }
  1630. static void _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1631. {
  1632. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1633. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1634. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1635. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1636. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1637. }
  1638. #define VOLUME(icode, ptr, dst, src, vol) \
  1639. _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1640. #define VOLUME_IN(icode, ptr, dst, src, vol) \
  1641. _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1642. #define VOLUME_ADD(icode, ptr, dst, src, vol) \
  1643. _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1644. #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
  1645. _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1646. #define VOLUME_OUT(icode, ptr, dst, src, vol) \
  1647. _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
  1648. #define _SWITCH(icode, ptr, dst, src, sw) \
  1649. OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
  1650. #define SWITCH(icode, ptr, dst, src, sw) \
  1651. _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
  1652. #define SWITCH_IN(icode, ptr, dst, src, sw) \
  1653. _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
  1654. #define _SWITCH_NEG(icode, ptr, dst, src) \
  1655. OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
  1656. #define SWITCH_NEG(icode, ptr, dst, src) \
  1657. _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
  1658. static int _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1659. {
  1660. int err, i, z, gpr, tmp, playback, capture;
  1661. u32 ptr;
  1662. struct snd_emu10k1_fx8010_code *icode;
  1663. struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
  1664. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1665. u32 *gpr_map;
  1666. mm_segment_t seg;
  1667. err = -ENOMEM;
  1668. icode = kzalloc(sizeof(*icode), GFP_KERNEL);
  1669. if (!icode)
  1670. return err;
  1671. icode->gpr_map = (u_int32_t __user *) kcalloc(256 + 160 + 160 + 2 * 512,
  1672. sizeof(u_int32_t), GFP_KERNEL);
  1673. if (!icode->gpr_map)
  1674. goto __err_gpr;
  1675. controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1676. sizeof(struct snd_emu10k1_fx8010_control_gpr),
  1677. GFP_KERNEL);
  1678. if (!controls)
  1679. goto __err_ctrls;
  1680. ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
  1681. if (!ipcm)
  1682. goto __err_ipcm;
  1683. gpr_map = (u32 __force *)icode->gpr_map;
  1684. icode->tram_data_map = icode->gpr_map + 256;
  1685. icode->tram_addr_map = icode->tram_data_map + 160;
  1686. icode->code = icode->tram_addr_map + 160;
  1687. /* clear free GPRs */
  1688. for (i = 0; i < 256; i++)
  1689. set_bit(i, icode->gpr_valid);
  1690. /* clear TRAM data & address lines */
  1691. for (i = 0; i < 160; i++)
  1692. set_bit(i, icode->tram_valid);
  1693. strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
  1694. ptr = 0; i = 0;
  1695. /* we have 12 inputs */
  1696. playback = SND_EMU10K1_INPUTS;
  1697. /* we have 6 playback channels and tone control doubles */
  1698. capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2);
  1699. gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
  1700. tmp = 0x88; /* we need 4 temporary GPR */
  1701. /* from 0x8c to 0xff is the area for tone control */
  1702. /* stop FX processor */
  1703. snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP);
  1704. /*
  1705. * Process FX Buses
  1706. */
  1707. OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004);
  1708. OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004);
  1709. OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004);
  1710. OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004);
  1711. OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004);
  1712. OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004);
  1713. OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004);
  1714. OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004);
  1715. OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
  1716. OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
  1717. OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004);
  1718. OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004);
  1719. /* Raw S/PDIF PCM */
  1720. ipcm->substream = 0;
  1721. ipcm->channels = 2;
  1722. ipcm->tram_start = 0;
  1723. ipcm->buffer_size = (64 * 1024) / 2;
  1724. ipcm->gpr_size = gpr++;
  1725. ipcm->gpr_ptr = gpr++;
  1726. ipcm->gpr_count = gpr++;
  1727. ipcm->gpr_tmpcount = gpr++;
  1728. ipcm->gpr_trigger = gpr++;
  1729. ipcm->gpr_running = gpr++;
  1730. ipcm->etram[0] = 0;
  1731. ipcm->etram[1] = 1;
  1732. gpr_map[gpr + 0] = 0xfffff000;
  1733. gpr_map[gpr + 1] = 0xffff0000;
  1734. gpr_map[gpr + 2] = 0x70000000;
  1735. gpr_map[gpr + 3] = 0x00000007;
  1736. gpr_map[gpr + 4] = 0x001f << 11;
  1737. gpr_map[gpr + 5] = 0x001c << 11;
  1738. gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
  1739. gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
  1740. gpr_map[gpr + 8] = 0x2000000 + (2<<11);
  1741. gpr_map[gpr + 9] = 0x4000000 + (2<<11);
  1742. gpr_map[gpr + 10] = 1<<11;
  1743. gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
  1744. gpr_map[gpr + 12] = 0;
  1745. /* if the trigger flag is not set, skip */
  1746. /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
  1747. /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
  1748. /* if the running flag is set, we're running */
  1749. /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
  1750. /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
  1751. /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
  1752. /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
  1753. /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
  1754. /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
  1755. /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
  1756. /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
  1757. /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
  1758. /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
  1759. /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
  1760. /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
  1761. /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1762. /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1763. /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1764. /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
  1765. /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
  1766. /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1767. /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1768. /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1769. /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
  1770. /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
  1771. /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
  1772. /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
  1773. /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
  1774. /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
  1775. /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
  1776. /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1777. /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
  1778. /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
  1779. /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
  1780. /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
  1781. /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
  1782. /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
  1783. /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
  1784. /* 24: */
  1785. gpr += 13;
  1786. /* Wave Playback Volume */
  1787. for (z = 0; z < 2; z++)
  1788. VOLUME(icode, &ptr, playback + z, z, gpr + z);
  1789. snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
  1790. gpr += 2;
  1791. /* Wave Surround Playback Volume */
  1792. for (z = 0; z < 2; z++)
  1793. VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
  1794. snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
  1795. gpr += 2;
  1796. /* Wave Center/LFE Playback Volume */
  1797. OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
  1798. OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002);
  1799. VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
  1800. snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
  1801. VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
  1802. snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
  1803. /* Wave Capture Volume + Switch */
  1804. for (z = 0; z < 2; z++) {
  1805. SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
  1806. VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1807. }
  1808. snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
  1809. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
  1810. gpr += 4;
  1811. /* Synth Playback Volume */
  1812. for (z = 0; z < 2; z++)
  1813. VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
  1814. snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
  1815. gpr += 2;
  1816. /* Synth Capture Volume + Switch */
  1817. for (z = 0; z < 2; z++) {
  1818. SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
  1819. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1820. }
  1821. snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
  1822. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
  1823. gpr += 4;
  1824. /* Surround Digital Playback Volume (renamed later without Digital) */
  1825. for (z = 0; z < 2; z++)
  1826. VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
  1827. snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
  1828. gpr += 2;
  1829. /* Surround Capture Volume + Switch */
  1830. for (z = 0; z < 2; z++) {
  1831. SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
  1832. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1833. }
  1834. snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
  1835. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
  1836. gpr += 4;
  1837. /* Center Playback Volume (renamed later without Digital) */
  1838. VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
  1839. snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
  1840. /* LFE Playback Volume + Switch (renamed later without Digital) */
  1841. VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
  1842. snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
  1843. /* Front Playback Volume */
  1844. for (z = 0; z < 2; z++)
  1845. VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
  1846. snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
  1847. gpr += 2;
  1848. /* Front Capture Volume + Switch */
  1849. for (z = 0; z < 2; z++) {
  1850. SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
  1851. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1852. }
  1853. snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
  1854. snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
  1855. gpr += 3;
  1856. /*
  1857. * Process inputs
  1858. */
  1859. if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
  1860. /* AC'97 Playback Volume */
  1861. VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
  1862. VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
  1863. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
  1864. /* AC'97 Capture Volume */
  1865. VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
  1866. VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
  1867. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
  1868. }
  1869. if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
  1870. /* IEC958 TTL Playback Volume */
  1871. for (z = 0; z < 2; z++)
  1872. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
  1873. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
  1874. gpr += 2;
  1875. /* IEC958 TTL Capture Volume + Switch */
  1876. for (z = 0; z < 2; z++) {
  1877. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
  1878. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1879. }
  1880. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
  1881. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
  1882. gpr += 4;
  1883. }
  1884. if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
  1885. /* Zoom Video Playback Volume */
  1886. for (z = 0; z < 2; z++)
  1887. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
  1888. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
  1889. gpr += 2;
  1890. /* Zoom Video Capture Volume + Switch */
  1891. for (z = 0; z < 2; z++) {
  1892. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
  1893. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1894. }
  1895. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
  1896. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
  1897. gpr += 4;
  1898. }
  1899. if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
  1900. /* IEC958 Optical Playback Volume */
  1901. for (z = 0; z < 2; z++)
  1902. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
  1903. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
  1904. gpr += 2;
  1905. /* IEC958 Optical Capture Volume */
  1906. for (z = 0; z < 2; z++) {
  1907. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
  1908. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1909. }
  1910. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
  1911. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
  1912. gpr += 4;
  1913. }
  1914. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
  1915. /* Line LiveDrive Playback Volume */
  1916. for (z = 0; z < 2; z++)
  1917. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
  1918. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
  1919. gpr += 2;
  1920. /* Line LiveDrive Capture Volume + Switch */
  1921. for (z = 0; z < 2; z++) {
  1922. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
  1923. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1924. }
  1925. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
  1926. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
  1927. gpr += 4;
  1928. }
  1929. if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
  1930. /* IEC958 Coax Playback Volume */
  1931. for (z = 0; z < 2; z++)
  1932. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
  1933. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
  1934. gpr += 2;
  1935. /* IEC958 Coax Capture Volume + Switch */
  1936. for (z = 0; z < 2; z++) {
  1937. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
  1938. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1939. }
  1940. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
  1941. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
  1942. gpr += 4;
  1943. }
  1944. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
  1945. /* Line LiveDrive Playback Volume */
  1946. for (z = 0; z < 2; z++)
  1947. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
  1948. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
  1949. controls[i-1].id.index = 1;
  1950. gpr += 2;
  1951. /* Line LiveDrive Capture Volume */
  1952. for (z = 0; z < 2; z++) {
  1953. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
  1954. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1955. }
  1956. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
  1957. controls[i-1].id.index = 1;
  1958. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
  1959. controls[i-1].id.index = 1;
  1960. gpr += 4;
  1961. }
  1962. /*
  1963. * Process tone control
  1964. */
  1965. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */
  1966. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */
  1967. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */
  1968. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */
  1969. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */
  1970. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */
  1971. ctl = &controls[i + 0];
  1972. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1973. strcpy(ctl->id.name, "Tone Control - Bass");
  1974. ctl->vcount = 2;
  1975. ctl->count = 10;
  1976. ctl->min = 0;
  1977. ctl->max = 40;
  1978. ctl->value[0] = ctl->value[1] = 20;
  1979. ctl->tlv = snd_emu10k1_bass_treble_db_scale;
  1980. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1981. ctl = &controls[i + 1];
  1982. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1983. strcpy(ctl->id.name, "Tone Control - Treble");
  1984. ctl->vcount = 2;
  1985. ctl->count = 10;
  1986. ctl->min = 0;
  1987. ctl->max = 40;
  1988. ctl->value[0] = ctl->value[1] = 20;
  1989. ctl->tlv = snd_emu10k1_bass_treble_db_scale;
  1990. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1991. #define BASS_GPR 0x8c
  1992. #define TREBLE_GPR 0x96
  1993. for (z = 0; z < 5; z++) {
  1994. int j;
  1995. for (j = 0; j < 2; j++) {
  1996. controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1997. controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1998. }
  1999. }
  2000. for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
  2001. int j, k, l, d;
  2002. for (j = 0; j < 2; j++) { /* left/right */
  2003. k = 0xa0 + (z * 8) + (j * 4);
  2004. l = 0xd0 + (z * 8) + (j * 4);
  2005. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  2006. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
  2007. OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
  2008. OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
  2009. OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
  2010. OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
  2011. OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
  2012. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
  2013. OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
  2014. OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
  2015. OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
  2016. OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
  2017. OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
  2018. OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
  2019. if (z == 2) /* center */
  2020. break;
  2021. }
  2022. }
  2023. i += 2;
  2024. #undef BASS_GPR
  2025. #undef TREBLE_GPR
  2026. for (z = 0; z < 6; z++) {
  2027. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  2028. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  2029. SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  2030. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2031. }
  2032. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
  2033. gpr += 2;
  2034. /*
  2035. * Process outputs
  2036. */
  2037. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
  2038. /* AC'97 Playback Volume */
  2039. for (z = 0; z < 2; z++)
  2040. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000);
  2041. }
  2042. if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
  2043. /* IEC958 Optical Raw Playback Switch */
  2044. for (z = 0; z < 2; z++) {
  2045. SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
  2046. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  2047. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  2048. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2049. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  2050. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2051. #endif
  2052. }
  2053. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  2054. gpr += 2;
  2055. }
  2056. if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
  2057. /* Headphone Playback Volume */
  2058. for (z = 0; z < 2; z++) {
  2059. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z);
  2060. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
  2061. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  2062. OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  2063. VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
  2064. }
  2065. snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
  2066. controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
  2067. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
  2068. controls[i-1].id.index = 1;
  2069. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
  2070. controls[i-1].id.index = 1;
  2071. gpr += 4;
  2072. }
  2073. if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
  2074. for (z = 0; z < 2; z++)
  2075. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  2076. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
  2077. for (z = 0; z < 2; z++)
  2078. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  2079. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
  2080. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  2081. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  2082. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  2083. #else
  2084. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  2085. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  2086. #endif
  2087. }
  2088. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
  2089. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  2090. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  2091. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  2092. #else
  2093. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  2094. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  2095. #endif
  2096. }
  2097. #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
  2098. for (z = 0; z < 2; z++)
  2099. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
  2100. #endif
  2101. if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
  2102. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
  2103. /* EFX capture - capture the 16 EXTINS */
  2104. if (emu->card_capabilities->sblive51) {
  2105. /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
  2106. * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
  2107. *
  2108. * Since only 14 of the 16 EXTINs are used, this is not a big problem.
  2109. * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
  2110. * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
  2111. * channel. Multitrack recorders will still see the center/lfe output signal
  2112. * on the second and third channels.
  2113. */
  2114. OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0));
  2115. OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1));
  2116. OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2));
  2117. OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3));
  2118. for (z = 4; z < 14; z++)
  2119. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  2120. } else {
  2121. for (z = 0; z < 16; z++)
  2122. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  2123. }
  2124. if (gpr > tmp) {
  2125. snd_BUG();
  2126. err = -EIO;
  2127. goto __err;
  2128. }
  2129. if (i > SND_EMU10K1_GPR_CONTROLS) {
  2130. snd_BUG();
  2131. err = -EIO;
  2132. goto __err;
  2133. }
  2134. /* clear remaining instruction memory */
  2135. while (ptr < 0x200)
  2136. OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
  2137. if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0)
  2138. goto __err;
  2139. seg = snd_enter_user();
  2140. icode->gpr_add_control_count = i;
  2141. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  2142. emu->support_tlv = 1; /* support TLV */
  2143. err = snd_emu10k1_icode_poke(emu, icode);
  2144. emu->support_tlv = 0; /* clear again */
  2145. snd_leave_user(seg);
  2146. if (err >= 0)
  2147. err = snd_emu10k1_ipcm_poke(emu, ipcm);
  2148. __err:
  2149. kfree(ipcm);
  2150. __err_ipcm:
  2151. kfree(controls);
  2152. __err_ctrls:
  2153. kfree((void __force *)icode->gpr_map);
  2154. __err_gpr:
  2155. kfree(icode);
  2156. return err;
  2157. }
  2158. int snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  2159. {
  2160. spin_lock_init(&emu->fx8010.irq_lock);
  2161. INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
  2162. if (emu->audigy)
  2163. return _snd_emu10k1_audigy_init_efx(emu);
  2164. else
  2165. return _snd_emu10k1_init_efx(emu);
  2166. }
  2167. void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
  2168. {
  2169. /* stop processor */
  2170. if (emu->audigy)
  2171. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
  2172. else
  2173. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
  2174. }
  2175. #if 0 /* FIXME: who use them? */
  2176. int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
  2177. {
  2178. if (output < 0 || output >= 6)
  2179. return -EINVAL;
  2180. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
  2181. return 0;
  2182. }
  2183. int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
  2184. {
  2185. if (output < 0 || output >= 6)
  2186. return -EINVAL;
  2187. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
  2188. return 0;
  2189. }
  2190. #endif
  2191. int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
  2192. {
  2193. u8 size_reg = 0;
  2194. /* size is in samples */
  2195. if (size != 0) {
  2196. size = (size - 1) >> 13;
  2197. while (size) {
  2198. size >>= 1;
  2199. size_reg++;
  2200. }
  2201. size = 0x2000 << size_reg;
  2202. }
  2203. if ((emu->fx8010.etram_pages.bytes / 2) == size)
  2204. return 0;
  2205. spin_lock_irq(&emu->emu_lock);
  2206. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2207. spin_unlock_irq(&emu->emu_lock);
  2208. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  2209. snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
  2210. if (emu->fx8010.etram_pages.area != NULL) {
  2211. snd_dma_free_pages(&emu->fx8010.etram_pages);
  2212. emu->fx8010.etram_pages.area = NULL;
  2213. emu->fx8010.etram_pages.bytes = 0;
  2214. }
  2215. if (size > 0) {
  2216. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci),
  2217. size * 2, &emu->fx8010.etram_pages) < 0)
  2218. return -ENOMEM;
  2219. memset(emu->fx8010.etram_pages.area, 0, size * 2);
  2220. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2221. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2222. spin_lock_irq(&emu->emu_lock);
  2223. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2224. spin_unlock_irq(&emu->emu_lock);
  2225. }
  2226. return 0;
  2227. }
  2228. static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
  2229. {
  2230. return 0;
  2231. }
  2232. static void copy_string(char *dst, char *src, char *null, int idx)
  2233. {
  2234. if (src == NULL)
  2235. sprintf(dst, "%s %02X", null, idx);
  2236. else
  2237. strcpy(dst, src);
  2238. }
  2239. static void snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
  2240. struct snd_emu10k1_fx8010_info *info)
  2241. {
  2242. char **fxbus, **extin, **extout;
  2243. unsigned short fxbus_mask, extin_mask, extout_mask;
  2244. int res;
  2245. info->internal_tram_size = emu->fx8010.itram_size;
  2246. info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
  2247. fxbus = fxbuses;
  2248. extin = emu->audigy ? audigy_ins : creative_ins;
  2249. extout = emu->audigy ? audigy_outs : creative_outs;
  2250. fxbus_mask = emu->fx8010.fxbus_mask;
  2251. extin_mask = emu->fx8010.extin_mask;
  2252. extout_mask = emu->fx8010.extout_mask;
  2253. for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
  2254. copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res);
  2255. copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
  2256. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2257. }
  2258. for (res = 16; res < 32; res++, extout++)
  2259. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2260. info->gpr_controls = emu->fx8010.gpr_count;
  2261. }
  2262. static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
  2263. {
  2264. struct snd_emu10k1 *emu = hw->private_data;
  2265. struct snd_emu10k1_fx8010_info *info;
  2266. struct snd_emu10k1_fx8010_code *icode;
  2267. struct snd_emu10k1_fx8010_pcm_rec *ipcm;
  2268. unsigned int addr;
  2269. void __user *argp = (void __user *)arg;
  2270. int res;
  2271. switch (cmd) {
  2272. case SNDRV_EMU10K1_IOCTL_PVERSION:
  2273. emu->support_tlv = 1;
  2274. return put_user(SNDRV_EMU10K1_VERSION, (int __user *)argp);
  2275. case SNDRV_EMU10K1_IOCTL_INFO:
  2276. info = kmalloc(sizeof(*info), GFP_KERNEL);
  2277. if (!info)
  2278. return -ENOMEM;
  2279. snd_emu10k1_fx8010_info(emu, info);
  2280. if (copy_to_user(argp, info, sizeof(*info))) {
  2281. kfree(info);
  2282. return -EFAULT;
  2283. }
  2284. kfree(info);
  2285. return 0;
  2286. case SNDRV_EMU10K1_IOCTL_CODE_POKE:
  2287. if (!capable(CAP_SYS_ADMIN))
  2288. return -EPERM;
  2289. icode = memdup_user(argp, sizeof(*icode));
  2290. if (IS_ERR(icode))
  2291. return PTR_ERR(icode);
  2292. res = snd_emu10k1_icode_poke(emu, icode);
  2293. kfree(icode);
  2294. return res;
  2295. case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
  2296. icode = memdup_user(argp, sizeof(*icode));
  2297. if (IS_ERR(icode))
  2298. return PTR_ERR(icode);
  2299. res = snd_emu10k1_icode_peek(emu, icode);
  2300. if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
  2301. kfree(icode);
  2302. return -EFAULT;
  2303. }
  2304. kfree(icode);
  2305. return res;
  2306. case SNDRV_EMU10K1_IOCTL_PCM_POKE:
  2307. ipcm = memdup_user(argp, sizeof(*ipcm));
  2308. if (IS_ERR(ipcm))
  2309. return PTR_ERR(ipcm);
  2310. res = snd_emu10k1_ipcm_poke(emu, ipcm);
  2311. kfree(ipcm);
  2312. return res;
  2313. case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
  2314. ipcm = memdup_user(argp, sizeof(*ipcm));
  2315. if (IS_ERR(ipcm))
  2316. return PTR_ERR(ipcm);
  2317. res = snd_emu10k1_ipcm_peek(emu, ipcm);
  2318. if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
  2319. kfree(ipcm);
  2320. return -EFAULT;
  2321. }
  2322. kfree(ipcm);
  2323. return res;
  2324. case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
  2325. if (!capable(CAP_SYS_ADMIN))
  2326. return -EPERM;
  2327. if (get_user(addr, (unsigned int __user *)argp))
  2328. return -EFAULT;
  2329. mutex_lock(&emu->fx8010.lock);
  2330. res = snd_emu10k1_fx8010_tram_setup(emu, addr);
  2331. mutex_unlock(&emu->fx8010.lock);
  2332. return res;
  2333. case SNDRV_EMU10K1_IOCTL_STOP:
  2334. if (!capable(CAP_SYS_ADMIN))
  2335. return -EPERM;
  2336. if (emu->audigy)
  2337. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
  2338. else
  2339. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
  2340. return 0;
  2341. case SNDRV_EMU10K1_IOCTL_CONTINUE:
  2342. if (!capable(CAP_SYS_ADMIN))
  2343. return -EPERM;
  2344. if (emu->audigy)
  2345. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
  2346. else
  2347. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
  2348. return 0;
  2349. case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
  2350. if (!capable(CAP_SYS_ADMIN))
  2351. return -EPERM;
  2352. if (emu->audigy)
  2353. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
  2354. else
  2355. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
  2356. udelay(10);
  2357. if (emu->audigy)
  2358. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2359. else
  2360. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2361. return 0;
  2362. case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
  2363. if (!capable(CAP_SYS_ADMIN))
  2364. return -EPERM;
  2365. if (get_user(addr, (unsigned int __user *)argp))
  2366. return -EFAULT;
  2367. if (addr > 0x1ff)
  2368. return -EINVAL;
  2369. if (emu->audigy)
  2370. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr);
  2371. else
  2372. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr);
  2373. udelay(10);
  2374. if (emu->audigy)
  2375. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr);
  2376. else
  2377. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr);
  2378. return 0;
  2379. case SNDRV_EMU10K1_IOCTL_DBG_READ:
  2380. if (emu->audigy)
  2381. addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
  2382. else
  2383. addr = snd_emu10k1_ptr_read(emu, DBG, 0);
  2384. if (put_user(addr, (unsigned int __user *)argp))
  2385. return -EFAULT;
  2386. return 0;
  2387. }
  2388. return -ENOTTY;
  2389. }
  2390. static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
  2391. {
  2392. return 0;
  2393. }
  2394. int snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device)
  2395. {
  2396. struct snd_hwdep *hw;
  2397. int err;
  2398. if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0)
  2399. return err;
  2400. strcpy(hw->name, "EMU10K1 (FX8010)");
  2401. hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
  2402. hw->ops.open = snd_emu10k1_fx8010_open;
  2403. hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
  2404. hw->ops.release = snd_emu10k1_fx8010_release;
  2405. hw->private_data = emu;
  2406. return 0;
  2407. }
  2408. #ifdef CONFIG_PM_SLEEP
  2409. int snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
  2410. {
  2411. int len;
  2412. len = emu->audigy ? 0x200 : 0x100;
  2413. emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL);
  2414. if (! emu->saved_gpr)
  2415. return -ENOMEM;
  2416. len = emu->audigy ? 0x100 : 0xa0;
  2417. emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL);
  2418. emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL);
  2419. if (! emu->tram_val_saved || ! emu->tram_addr_saved)
  2420. return -ENOMEM;
  2421. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2422. emu->saved_icode = vmalloc(len * 4);
  2423. if (! emu->saved_icode)
  2424. return -ENOMEM;
  2425. return 0;
  2426. }
  2427. void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
  2428. {
  2429. kfree(emu->saved_gpr);
  2430. kfree(emu->tram_val_saved);
  2431. kfree(emu->tram_addr_saved);
  2432. vfree(emu->saved_icode);
  2433. }
  2434. /*
  2435. * save/restore GPR, TRAM and codes
  2436. */
  2437. void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
  2438. {
  2439. int i, len;
  2440. len = emu->audigy ? 0x200 : 0x100;
  2441. for (i = 0; i < len; i++)
  2442. emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
  2443. len = emu->audigy ? 0x100 : 0xa0;
  2444. for (i = 0; i < len; i++) {
  2445. emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
  2446. emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
  2447. if (emu->audigy) {
  2448. emu->tram_addr_saved[i] >>= 12;
  2449. emu->tram_addr_saved[i] |=
  2450. snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
  2451. }
  2452. }
  2453. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2454. for (i = 0; i < len; i++)
  2455. emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
  2456. }
  2457. void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
  2458. {
  2459. int i, len;
  2460. /* set up TRAM */
  2461. if (emu->fx8010.etram_pages.bytes > 0) {
  2462. unsigned size, size_reg = 0;
  2463. size = emu->fx8010.etram_pages.bytes / 2;
  2464. size = (size - 1) >> 13;
  2465. while (size) {
  2466. size >>= 1;
  2467. size_reg++;
  2468. }
  2469. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2470. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2471. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2472. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2473. }
  2474. if (emu->audigy)
  2475. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  2476. else
  2477. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  2478. len = emu->audigy ? 0x200 : 0x100;
  2479. for (i = 0; i < len; i++)
  2480. snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
  2481. len = emu->audigy ? 0x100 : 0xa0;
  2482. for (i = 0; i < len; i++) {
  2483. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
  2484. emu->tram_val_saved[i]);
  2485. if (! emu->audigy)
  2486. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2487. emu->tram_addr_saved[i]);
  2488. else {
  2489. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2490. emu->tram_addr_saved[i] << 12);
  2491. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2492. emu->tram_addr_saved[i] >> 20);
  2493. }
  2494. }
  2495. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2496. for (i = 0; i < len; i++)
  2497. snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
  2498. /* start FX processor when the DSP code is updated */
  2499. if (emu->audigy)
  2500. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2501. else
  2502. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2503. }
  2504. #endif