doc2000.h 6.0 KB

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  1. /*
  2. * Linux driver for Disk-On-Chip devices
  3. *
  4. * Copyright © 1999 Machine Vision Holdings, Inc.
  5. * Copyright © 1999-2010 David Woodhouse <dwmw2@infradead.org>
  6. * Copyright © 2002-2003 Greg Ungerer <gerg@snapgear.com>
  7. * Copyright © 2002-2003 SnapGear Inc
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22. *
  23. */
  24. #ifndef __MTD_DOC2000_H__
  25. #define __MTD_DOC2000_H__
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mutex.h>
  28. #define DoC_Sig1 0
  29. #define DoC_Sig2 1
  30. #define DoC_ChipID 0x1000
  31. #define DoC_DOCStatus 0x1001
  32. #define DoC_DOCControl 0x1002
  33. #define DoC_FloorSelect 0x1003
  34. #define DoC_CDSNControl 0x1004
  35. #define DoC_CDSNDeviceSelect 0x1005
  36. #define DoC_ECCConf 0x1006
  37. #define DoC_2k_ECCStatus 0x1007
  38. #define DoC_CDSNSlowIO 0x100d
  39. #define DoC_ECCSyndrome0 0x1010
  40. #define DoC_ECCSyndrome1 0x1011
  41. #define DoC_ECCSyndrome2 0x1012
  42. #define DoC_ECCSyndrome3 0x1013
  43. #define DoC_ECCSyndrome4 0x1014
  44. #define DoC_ECCSyndrome5 0x1015
  45. #define DoC_AliasResolution 0x101b
  46. #define DoC_ConfigInput 0x101c
  47. #define DoC_ReadPipeInit 0x101d
  48. #define DoC_WritePipeTerm 0x101e
  49. #define DoC_LastDataRead 0x101f
  50. #define DoC_NOP 0x1020
  51. #define DoC_Mil_CDSN_IO 0x0800
  52. #define DoC_2k_CDSN_IO 0x1800
  53. #define DoC_Mplus_NOP 0x1002
  54. #define DoC_Mplus_AliasResolution 0x1004
  55. #define DoC_Mplus_DOCControl 0x1006
  56. #define DoC_Mplus_AccessStatus 0x1008
  57. #define DoC_Mplus_DeviceSelect 0x1008
  58. #define DoC_Mplus_Configuration 0x100a
  59. #define DoC_Mplus_OutputControl 0x100c
  60. #define DoC_Mplus_FlashControl 0x1020
  61. #define DoC_Mplus_FlashSelect 0x1022
  62. #define DoC_Mplus_FlashCmd 0x1024
  63. #define DoC_Mplus_FlashAddress 0x1026
  64. #define DoC_Mplus_FlashData0 0x1028
  65. #define DoC_Mplus_FlashData1 0x1029
  66. #define DoC_Mplus_ReadPipeInit 0x102a
  67. #define DoC_Mplus_LastDataRead 0x102c
  68. #define DoC_Mplus_LastDataRead1 0x102d
  69. #define DoC_Mplus_WritePipeTerm 0x102e
  70. #define DoC_Mplus_ECCSyndrome0 0x1040
  71. #define DoC_Mplus_ECCSyndrome1 0x1041
  72. #define DoC_Mplus_ECCSyndrome2 0x1042
  73. #define DoC_Mplus_ECCSyndrome3 0x1043
  74. #define DoC_Mplus_ECCSyndrome4 0x1044
  75. #define DoC_Mplus_ECCSyndrome5 0x1045
  76. #define DoC_Mplus_ECCConf 0x1046
  77. #define DoC_Mplus_Toggle 0x1046
  78. #define DoC_Mplus_DownloadStatus 0x1074
  79. #define DoC_Mplus_CtrlConfirm 0x1076
  80. #define DoC_Mplus_Power 0x1fff
  81. /* How to access the device?
  82. * On ARM, it'll be mmap'd directly with 32-bit wide accesses.
  83. * On PPC, it's mmap'd and 16-bit wide.
  84. * Others use readb/writeb
  85. */
  86. #if defined(__arm__)
  87. static inline u8 ReadDOC_(u32 __iomem *addr, unsigned long reg)
  88. {
  89. return __raw_readl(addr + reg);
  90. }
  91. static inline void WriteDOC_(u8 data, u32 __iomem *addr, unsigned long reg)
  92. {
  93. __raw_writel(data, addr + reg);
  94. wmb();
  95. }
  96. #define DOC_IOREMAP_LEN 0x8000
  97. #elif defined(__ppc__)
  98. static inline u8 ReadDOC_(u16 __iomem *addr, unsigned long reg)
  99. {
  100. return __raw_readw(addr + reg);
  101. }
  102. static inline void WriteDOC_(u8 data, u16 __iomem *addr, unsigned long reg)
  103. {
  104. __raw_writew(data, addr + reg);
  105. wmb();
  106. }
  107. #define DOC_IOREMAP_LEN 0x4000
  108. #else
  109. #define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg))
  110. #define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg))
  111. #define DOC_IOREMAP_LEN 0x2000
  112. #endif
  113. #if defined(__i386__) || defined(__x86_64__)
  114. #define USE_MEMCPY
  115. #endif
  116. /* These are provided to directly use the DoC_xxx defines */
  117. #define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg)
  118. #define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg)
  119. #define DOC_MODE_RESET 0
  120. #define DOC_MODE_NORMAL 1
  121. #define DOC_MODE_RESERVED1 2
  122. #define DOC_MODE_RESERVED2 3
  123. #define DOC_MODE_CLR_ERR 0x80
  124. #define DOC_MODE_RST_LAT 0x10
  125. #define DOC_MODE_BDECT 0x08
  126. #define DOC_MODE_MDWREN 0x04
  127. #define DOC_ChipID_Doc2k 0x20
  128. #define DOC_ChipID_Doc2kTSOP 0x21 /* internal number for MTD */
  129. #define DOC_ChipID_DocMil 0x30
  130. #define DOC_ChipID_DocMilPlus32 0x40
  131. #define DOC_ChipID_DocMilPlus16 0x41
  132. #define CDSN_CTRL_FR_B 0x80
  133. #define CDSN_CTRL_FR_B0 0x40
  134. #define CDSN_CTRL_FR_B1 0x80
  135. #define CDSN_CTRL_ECC_IO 0x20
  136. #define CDSN_CTRL_FLASH_IO 0x10
  137. #define CDSN_CTRL_WP 0x08
  138. #define CDSN_CTRL_ALE 0x04
  139. #define CDSN_CTRL_CLE 0x02
  140. #define CDSN_CTRL_CE 0x01
  141. #define DOC_ECC_RESET 0
  142. #define DOC_ECC_ERROR 0x80
  143. #define DOC_ECC_RW 0x20
  144. #define DOC_ECC__EN 0x08
  145. #define DOC_TOGGLE_BIT 0x04
  146. #define DOC_ECC_RESV 0x02
  147. #define DOC_ECC_IGNORE 0x01
  148. #define DOC_FLASH_CE 0x80
  149. #define DOC_FLASH_WP 0x40
  150. #define DOC_FLASH_BANK 0x02
  151. /* We have to also set the reserved bit 1 for enable */
  152. #define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV)
  153. #define DOC_ECC_DIS (DOC_ECC_RESV)
  154. struct Nand {
  155. char floor, chip;
  156. unsigned long curadr;
  157. unsigned char curmode;
  158. /* Also some erase/write/pipeline info when we get that far */
  159. };
  160. #define MAX_FLOORS 4
  161. #define MAX_CHIPS 4
  162. #define MAX_FLOORS_MIL 1
  163. #define MAX_CHIPS_MIL 1
  164. #define MAX_FLOORS_MPLUS 2
  165. #define MAX_CHIPS_MPLUS 1
  166. #define ADDR_COLUMN 1
  167. #define ADDR_PAGE 2
  168. #define ADDR_COLUMN_PAGE 3
  169. struct DiskOnChip {
  170. unsigned long physadr;
  171. void __iomem *virtadr;
  172. unsigned long totlen;
  173. unsigned char ChipID; /* Type of DiskOnChip */
  174. int ioreg;
  175. unsigned long mfr; /* Flash IDs - only one type of flash per device */
  176. unsigned long id;
  177. int chipshift;
  178. char page256;
  179. char pageadrlen;
  180. char interleave; /* Internal interleaving - Millennium Plus style */
  181. unsigned long erasesize;
  182. int curfloor;
  183. int curchip;
  184. int numchips;
  185. struct Nand *chips;
  186. struct mtd_info *nextdoc;
  187. struct mutex lock;
  188. };
  189. int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);
  190. #endif /* __MTD_DOC2000_H__ */