stmpe.h 3.4 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License, version 2
  5. * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  6. */
  7. #ifndef __LINUX_MFD_STMPE_H
  8. #define __LINUX_MFD_STMPE_H
  9. #include <linux/mutex.h>
  10. struct device;
  11. struct regulator;
  12. enum stmpe_block {
  13. STMPE_BLOCK_GPIO = 1 << 0,
  14. STMPE_BLOCK_KEYPAD = 1 << 1,
  15. STMPE_BLOCK_TOUCHSCREEN = 1 << 2,
  16. STMPE_BLOCK_ADC = 1 << 3,
  17. STMPE_BLOCK_PWM = 1 << 4,
  18. STMPE_BLOCK_ROTATOR = 1 << 5,
  19. };
  20. enum stmpe_partnum {
  21. STMPE610,
  22. STMPE801,
  23. STMPE811,
  24. STMPE1600,
  25. STMPE1601,
  26. STMPE1801,
  27. STMPE2401,
  28. STMPE2403,
  29. STMPE_NBR_PARTS
  30. };
  31. /*
  32. * For registers whose locations differ on variants, the correct address is
  33. * obtained by indexing stmpe->regs with one of the following.
  34. */
  35. enum {
  36. STMPE_IDX_CHIP_ID,
  37. STMPE_IDX_SYS_CTRL,
  38. STMPE_IDX_SYS_CTRL2,
  39. STMPE_IDX_ICR_LSB,
  40. STMPE_IDX_IER_LSB,
  41. STMPE_IDX_IER_MSB,
  42. STMPE_IDX_ISR_LSB,
  43. STMPE_IDX_ISR_MSB,
  44. STMPE_IDX_GPMR_LSB,
  45. STMPE_IDX_GPMR_CSB,
  46. STMPE_IDX_GPMR_MSB,
  47. STMPE_IDX_GPSR_LSB,
  48. STMPE_IDX_GPSR_CSB,
  49. STMPE_IDX_GPSR_MSB,
  50. STMPE_IDX_GPCR_LSB,
  51. STMPE_IDX_GPCR_CSB,
  52. STMPE_IDX_GPCR_MSB,
  53. STMPE_IDX_GPDR_LSB,
  54. STMPE_IDX_GPDR_CSB,
  55. STMPE_IDX_GPDR_MSB,
  56. STMPE_IDX_GPEDR_LSB,
  57. STMPE_IDX_GPEDR_CSB,
  58. STMPE_IDX_GPEDR_MSB,
  59. STMPE_IDX_GPRER_LSB,
  60. STMPE_IDX_GPRER_CSB,
  61. STMPE_IDX_GPRER_MSB,
  62. STMPE_IDX_GPFER_LSB,
  63. STMPE_IDX_GPFER_CSB,
  64. STMPE_IDX_GPFER_MSB,
  65. STMPE_IDX_GPPUR_LSB,
  66. STMPE_IDX_GPPDR_LSB,
  67. STMPE_IDX_GPAFR_U_MSB,
  68. STMPE_IDX_IEGPIOR_LSB,
  69. STMPE_IDX_IEGPIOR_CSB,
  70. STMPE_IDX_IEGPIOR_MSB,
  71. STMPE_IDX_ISGPIOR_LSB,
  72. STMPE_IDX_ISGPIOR_CSB,
  73. STMPE_IDX_ISGPIOR_MSB,
  74. STMPE_IDX_MAX,
  75. };
  76. struct stmpe_variant_info;
  77. struct stmpe_client_info;
  78. struct stmpe_platform_data;
  79. /**
  80. * struct stmpe - STMPE MFD structure
  81. * @vcc: optional VCC regulator
  82. * @vio: optional VIO regulator
  83. * @lock: lock protecting I/O operations
  84. * @irq_lock: IRQ bus lock
  85. * @dev: device, mostly for dev_dbg()
  86. * @irq_domain: IRQ domain
  87. * @client: client - i2c or spi
  88. * @ci: client specific information
  89. * @partnum: part number
  90. * @variant: the detected STMPE model number
  91. * @regs: list of addresses of registers which are at different addresses on
  92. * different variants. Indexed by one of STMPE_IDX_*.
  93. * @irq: irq number for stmpe
  94. * @num_gpios: number of gpios, differs for variants
  95. * @ier: cache of IER registers for bus_lock
  96. * @oldier: cache of IER registers for bus_lock
  97. * @pdata: platform data
  98. */
  99. struct stmpe {
  100. struct regulator *vcc;
  101. struct regulator *vio;
  102. struct mutex lock;
  103. struct mutex irq_lock;
  104. struct device *dev;
  105. struct irq_domain *domain;
  106. void *client;
  107. struct stmpe_client_info *ci;
  108. enum stmpe_partnum partnum;
  109. struct stmpe_variant_info *variant;
  110. const u8 *regs;
  111. int irq;
  112. int num_gpios;
  113. u8 ier[2];
  114. u8 oldier[2];
  115. struct stmpe_platform_data *pdata;
  116. };
  117. extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data);
  118. extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg);
  119. extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  120. u8 *values);
  121. extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  122. const u8 *values);
  123. extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val);
  124. extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins,
  125. enum stmpe_block block);
  126. extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks);
  127. extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks);
  128. #define STMPE_GPIO_NOREQ_811_TOUCH (0xf0)
  129. #endif