events_2l.c 10 KB

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  1. /*
  2. * Xen event channels (2-level ABI)
  3. *
  4. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  5. */
  6. #define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt
  7. #include <linux/linkage.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/irq.h>
  10. #include <asm/sync_bitops.h>
  11. #include <asm/xen/hypercall.h>
  12. #include <asm/xen/hypervisor.h>
  13. #include <xen/xen.h>
  14. #include <xen/xen-ops.h>
  15. #include <xen/events.h>
  16. #include <xen/interface/xen.h>
  17. #include <xen/interface/event_channel.h>
  18. #include "events_internal.h"
  19. /*
  20. * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be
  21. * careful to only use bitops which allow for this (e.g
  22. * test_bit/find_first_bit and friends but not __ffs) and to pass
  23. * BITS_PER_EVTCHN_WORD as the bitmask length.
  24. */
  25. #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8)
  26. /*
  27. * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t
  28. * array. Primarily to avoid long lines (hence the terse name).
  29. */
  30. #define BM(x) (unsigned long *)(x)
  31. /* Find the first set bit in a evtchn mask */
  32. #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD)
  33. #define EVTCHN_MASK_SIZE (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)
  34. static DEFINE_PER_CPU(xen_ulong_t [EVTCHN_MASK_SIZE], cpu_evtchn_mask);
  35. static unsigned evtchn_2l_max_channels(void)
  36. {
  37. return EVTCHN_2L_NR_CHANNELS;
  38. }
  39. static void evtchn_2l_bind_to_cpu(struct irq_info *info, unsigned cpu)
  40. {
  41. clear_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, info->cpu)));
  42. set_bit(info->evtchn, BM(per_cpu(cpu_evtchn_mask, cpu)));
  43. }
  44. static void evtchn_2l_clear_pending(unsigned port)
  45. {
  46. struct shared_info *s = HYPERVISOR_shared_info;
  47. sync_clear_bit(port, BM(&s->evtchn_pending[0]));
  48. }
  49. static void evtchn_2l_set_pending(unsigned port)
  50. {
  51. struct shared_info *s = HYPERVISOR_shared_info;
  52. sync_set_bit(port, BM(&s->evtchn_pending[0]));
  53. }
  54. static bool evtchn_2l_is_pending(unsigned port)
  55. {
  56. struct shared_info *s = HYPERVISOR_shared_info;
  57. return sync_test_bit(port, BM(&s->evtchn_pending[0]));
  58. }
  59. static bool evtchn_2l_test_and_set_mask(unsigned port)
  60. {
  61. struct shared_info *s = HYPERVISOR_shared_info;
  62. return sync_test_and_set_bit(port, BM(&s->evtchn_mask[0]));
  63. }
  64. static void evtchn_2l_mask(unsigned port)
  65. {
  66. struct shared_info *s = HYPERVISOR_shared_info;
  67. sync_set_bit(port, BM(&s->evtchn_mask[0]));
  68. }
  69. static void evtchn_2l_unmask(unsigned port)
  70. {
  71. struct shared_info *s = HYPERVISOR_shared_info;
  72. unsigned int cpu = get_cpu();
  73. int do_hypercall = 0, evtchn_pending = 0;
  74. BUG_ON(!irqs_disabled());
  75. if (unlikely((cpu != cpu_from_evtchn(port))))
  76. do_hypercall = 1;
  77. else {
  78. /*
  79. * Need to clear the mask before checking pending to
  80. * avoid a race with an event becoming pending.
  81. *
  82. * EVTCHNOP_unmask will only trigger an upcall if the
  83. * mask bit was set, so if a hypercall is needed
  84. * remask the event.
  85. */
  86. sync_clear_bit(port, BM(&s->evtchn_mask[0]));
  87. evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0]));
  88. if (unlikely(evtchn_pending && xen_hvm_domain())) {
  89. sync_set_bit(port, BM(&s->evtchn_mask[0]));
  90. do_hypercall = 1;
  91. }
  92. }
  93. /* Slow path (hypercall) if this is a non-local port or if this is
  94. * an hvm domain and an event is pending (hvm domains don't have
  95. * their own implementation of irq_enable). */
  96. if (do_hypercall) {
  97. struct evtchn_unmask unmask = { .port = port };
  98. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  99. } else {
  100. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  101. /*
  102. * The following is basically the equivalent of
  103. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  104. * the interrupt edge' if the channel is masked.
  105. */
  106. if (evtchn_pending &&
  107. !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD,
  108. BM(&vcpu_info->evtchn_pending_sel)))
  109. vcpu_info->evtchn_upcall_pending = 1;
  110. }
  111. put_cpu();
  112. }
  113. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  114. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  115. /*
  116. * Mask out the i least significant bits of w
  117. */
  118. #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i))
  119. static inline xen_ulong_t active_evtchns(unsigned int cpu,
  120. struct shared_info *sh,
  121. unsigned int idx)
  122. {
  123. return sh->evtchn_pending[idx] &
  124. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  125. ~sh->evtchn_mask[idx];
  126. }
  127. /*
  128. * Search the CPU's pending events bitmasks. For each one found, map
  129. * the event number to an irq, and feed it into do_IRQ() for handling.
  130. *
  131. * Xen uses a two-level bitmap to speed searching. The first level is
  132. * a bitset of words which contain pending event bits. The second
  133. * level is a bitset of pending events themselves.
  134. */
  135. static void evtchn_2l_handle_events(unsigned cpu)
  136. {
  137. int irq;
  138. xen_ulong_t pending_words;
  139. xen_ulong_t pending_bits;
  140. int start_word_idx, start_bit_idx;
  141. int word_idx, bit_idx;
  142. int i;
  143. struct shared_info *s = HYPERVISOR_shared_info;
  144. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  145. /* Timer interrupt has highest priority. */
  146. irq = irq_from_virq(cpu, VIRQ_TIMER);
  147. if (irq != -1) {
  148. unsigned int evtchn = evtchn_from_irq(irq);
  149. word_idx = evtchn / BITS_PER_LONG;
  150. bit_idx = evtchn % BITS_PER_LONG;
  151. if (active_evtchns(cpu, s, word_idx) & (1ULL << bit_idx))
  152. generic_handle_irq(irq);
  153. }
  154. /*
  155. * Master flag must be cleared /before/ clearing
  156. * selector flag. xchg_xen_ulong must contain an
  157. * appropriate barrier.
  158. */
  159. pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0);
  160. start_word_idx = __this_cpu_read(current_word_idx);
  161. start_bit_idx = __this_cpu_read(current_bit_idx);
  162. word_idx = start_word_idx;
  163. for (i = 0; pending_words != 0; i++) {
  164. xen_ulong_t words;
  165. words = MASK_LSBS(pending_words, word_idx);
  166. /*
  167. * If we masked out all events, wrap to beginning.
  168. */
  169. if (words == 0) {
  170. word_idx = 0;
  171. bit_idx = 0;
  172. continue;
  173. }
  174. word_idx = EVTCHN_FIRST_BIT(words);
  175. pending_bits = active_evtchns(cpu, s, word_idx);
  176. bit_idx = 0; /* usually scan entire word from start */
  177. /*
  178. * We scan the starting word in two parts.
  179. *
  180. * 1st time: start in the middle, scanning the
  181. * upper bits.
  182. *
  183. * 2nd time: scan the whole word (not just the
  184. * parts skipped in the first pass) -- if an
  185. * event in the previously scanned bits is
  186. * pending again it would just be scanned on
  187. * the next loop anyway.
  188. */
  189. if (word_idx == start_word_idx) {
  190. if (i == 0)
  191. bit_idx = start_bit_idx;
  192. }
  193. do {
  194. xen_ulong_t bits;
  195. int port;
  196. bits = MASK_LSBS(pending_bits, bit_idx);
  197. /* If we masked out all events, move on. */
  198. if (bits == 0)
  199. break;
  200. bit_idx = EVTCHN_FIRST_BIT(bits);
  201. /* Process port. */
  202. port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx;
  203. irq = get_evtchn_to_irq(port);
  204. if (irq != -1)
  205. generic_handle_irq(irq);
  206. bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD;
  207. /* Next caller starts at last processed + 1 */
  208. __this_cpu_write(current_word_idx,
  209. bit_idx ? word_idx :
  210. (word_idx+1) % BITS_PER_EVTCHN_WORD);
  211. __this_cpu_write(current_bit_idx, bit_idx);
  212. } while (bit_idx != 0);
  213. /* Scan start_l1i twice; all others once. */
  214. if ((word_idx != start_word_idx) || (i != 0))
  215. pending_words &= ~(1UL << word_idx);
  216. word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD;
  217. }
  218. }
  219. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  220. {
  221. struct shared_info *sh = HYPERVISOR_shared_info;
  222. int cpu = smp_processor_id();
  223. xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  224. int i;
  225. unsigned long flags;
  226. static DEFINE_SPINLOCK(debug_lock);
  227. struct vcpu_info *v;
  228. spin_lock_irqsave(&debug_lock, flags);
  229. printk("\nvcpu %d\n ", cpu);
  230. for_each_online_cpu(i) {
  231. int pending;
  232. v = per_cpu(xen_vcpu, i);
  233. pending = (get_irq_regs() && i == cpu)
  234. ? xen_irqs_disabled(get_irq_regs())
  235. : v->evtchn_upcall_mask;
  236. printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i,
  237. pending, v->evtchn_upcall_pending,
  238. (int)(sizeof(v->evtchn_pending_sel)*2),
  239. v->evtchn_pending_sel);
  240. }
  241. v = per_cpu(xen_vcpu, cpu);
  242. printk("\npending:\n ");
  243. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  244. printk("%0*"PRI_xen_ulong"%s",
  245. (int)sizeof(sh->evtchn_pending[0])*2,
  246. sh->evtchn_pending[i],
  247. i % 8 == 0 ? "\n " : " ");
  248. printk("\nglobal mask:\n ");
  249. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  250. printk("%0*"PRI_xen_ulong"%s",
  251. (int)(sizeof(sh->evtchn_mask[0])*2),
  252. sh->evtchn_mask[i],
  253. i % 8 == 0 ? "\n " : " ");
  254. printk("\nglobally unmasked:\n ");
  255. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  256. printk("%0*"PRI_xen_ulong"%s",
  257. (int)(sizeof(sh->evtchn_mask[0])*2),
  258. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  259. i % 8 == 0 ? "\n " : " ");
  260. printk("\nlocal cpu%d mask:\n ", cpu);
  261. for (i = (EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--)
  262. printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2),
  263. cpu_evtchn[i],
  264. i % 8 == 0 ? "\n " : " ");
  265. printk("\nlocally unmasked:\n ");
  266. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  267. xen_ulong_t pending = sh->evtchn_pending[i]
  268. & ~sh->evtchn_mask[i]
  269. & cpu_evtchn[i];
  270. printk("%0*"PRI_xen_ulong"%s",
  271. (int)(sizeof(sh->evtchn_mask[0])*2),
  272. pending, i % 8 == 0 ? "\n " : " ");
  273. }
  274. printk("\npending list:\n");
  275. for (i = 0; i < EVTCHN_2L_NR_CHANNELS; i++) {
  276. if (sync_test_bit(i, BM(sh->evtchn_pending))) {
  277. int word_idx = i / BITS_PER_EVTCHN_WORD;
  278. printk(" %d: event %d -> irq %d%s%s%s\n",
  279. cpu_from_evtchn(i), i,
  280. get_evtchn_to_irq(i),
  281. sync_test_bit(word_idx, BM(&v->evtchn_pending_sel))
  282. ? "" : " l2-clear",
  283. !sync_test_bit(i, BM(sh->evtchn_mask))
  284. ? "" : " globally-masked",
  285. sync_test_bit(i, BM(cpu_evtchn))
  286. ? "" : " locally-masked");
  287. }
  288. }
  289. spin_unlock_irqrestore(&debug_lock, flags);
  290. return IRQ_HANDLED;
  291. }
  292. static void evtchn_2l_resume(void)
  293. {
  294. int i;
  295. for_each_online_cpu(i)
  296. memset(per_cpu(cpu_evtchn_mask, i), 0, sizeof(xen_ulong_t) *
  297. EVTCHN_2L_NR_CHANNELS/BITS_PER_EVTCHN_WORD);
  298. }
  299. static const struct evtchn_ops evtchn_ops_2l = {
  300. .max_channels = evtchn_2l_max_channels,
  301. .nr_channels = evtchn_2l_max_channels,
  302. .bind_to_cpu = evtchn_2l_bind_to_cpu,
  303. .clear_pending = evtchn_2l_clear_pending,
  304. .set_pending = evtchn_2l_set_pending,
  305. .is_pending = evtchn_2l_is_pending,
  306. .test_and_set_mask = evtchn_2l_test_and_set_mask,
  307. .mask = evtchn_2l_mask,
  308. .unmask = evtchn_2l_unmask,
  309. .handle_events = evtchn_2l_handle_events,
  310. .resume = evtchn_2l_resume,
  311. };
  312. void __init xen_evtchn_2l_init(void)
  313. {
  314. pr_info("Using 2-level ABI\n");
  315. evtchn_ops = &evtchn_ops_2l;
  316. }