st_lpc_wdt.c 7.3 KB

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  1. /*
  2. * ST's LPC Watchdog
  3. *
  4. * Copyright (C) 2014 STMicroelectronics -- All Rights Reserved
  5. *
  6. * Author: David Paris <david.paris@st.com> for STMicroelectronics
  7. * Lee Jones <lee.jones@linaro.org> for STMicroelectronics
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public Licence
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the Licence, or (at your option) any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/init.h>
  16. #include <linux/io.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mfd/syscon.h>
  19. #include <linux/module.h>
  20. #include <linux/of.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/regmap.h>
  24. #include <linux/watchdog.h>
  25. #include <dt-bindings/mfd/st-lpc.h>
  26. /* Low Power Alarm */
  27. #define LPC_LPA_LSB_OFF 0x410
  28. #define LPC_LPA_START_OFF 0x418
  29. /* LPC as WDT */
  30. #define LPC_WDT_OFF 0x510
  31. static struct watchdog_device st_wdog_dev;
  32. struct st_wdog_syscfg {
  33. unsigned int reset_type_reg;
  34. unsigned int reset_type_mask;
  35. unsigned int enable_reg;
  36. unsigned int enable_mask;
  37. };
  38. struct st_wdog {
  39. void __iomem *base;
  40. struct device *dev;
  41. struct regmap *regmap;
  42. struct st_wdog_syscfg *syscfg;
  43. struct clk *clk;
  44. unsigned long clkrate;
  45. bool warm_reset;
  46. };
  47. static struct st_wdog_syscfg stih407_syscfg = {
  48. .enable_reg = 0x204,
  49. .enable_mask = BIT(19),
  50. };
  51. static const struct of_device_id st_wdog_match[] = {
  52. {
  53. .compatible = "st,stih407-lpc",
  54. .data = &stih407_syscfg,
  55. },
  56. {},
  57. };
  58. MODULE_DEVICE_TABLE(of, st_wdog_match);
  59. static void st_wdog_setup(struct st_wdog *st_wdog, bool enable)
  60. {
  61. /* Type of watchdog reset - 0: Cold 1: Warm */
  62. if (st_wdog->syscfg->reset_type_reg)
  63. regmap_update_bits(st_wdog->regmap,
  64. st_wdog->syscfg->reset_type_reg,
  65. st_wdog->syscfg->reset_type_mask,
  66. st_wdog->warm_reset);
  67. /* Mask/unmask watchdog reset */
  68. regmap_update_bits(st_wdog->regmap,
  69. st_wdog->syscfg->enable_reg,
  70. st_wdog->syscfg->enable_mask,
  71. enable ? 0 : st_wdog->syscfg->enable_mask);
  72. }
  73. static void st_wdog_load_timer(struct st_wdog *st_wdog, unsigned int timeout)
  74. {
  75. unsigned long clkrate = st_wdog->clkrate;
  76. writel_relaxed(timeout * clkrate, st_wdog->base + LPC_LPA_LSB_OFF);
  77. writel_relaxed(1, st_wdog->base + LPC_LPA_START_OFF);
  78. }
  79. static int st_wdog_start(struct watchdog_device *wdd)
  80. {
  81. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  82. writel_relaxed(1, st_wdog->base + LPC_WDT_OFF);
  83. return 0;
  84. }
  85. static int st_wdog_stop(struct watchdog_device *wdd)
  86. {
  87. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  88. writel_relaxed(0, st_wdog->base + LPC_WDT_OFF);
  89. return 0;
  90. }
  91. static int st_wdog_set_timeout(struct watchdog_device *wdd,
  92. unsigned int timeout)
  93. {
  94. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  95. wdd->timeout = timeout;
  96. st_wdog_load_timer(st_wdog, timeout);
  97. return 0;
  98. }
  99. static int st_wdog_keepalive(struct watchdog_device *wdd)
  100. {
  101. struct st_wdog *st_wdog = watchdog_get_drvdata(wdd);
  102. st_wdog_load_timer(st_wdog, wdd->timeout);
  103. return 0;
  104. }
  105. static const struct watchdog_info st_wdog_info = {
  106. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  107. .identity = "ST LPC WDT",
  108. };
  109. static const struct watchdog_ops st_wdog_ops = {
  110. .owner = THIS_MODULE,
  111. .start = st_wdog_start,
  112. .stop = st_wdog_stop,
  113. .ping = st_wdog_keepalive,
  114. .set_timeout = st_wdog_set_timeout,
  115. };
  116. static struct watchdog_device st_wdog_dev = {
  117. .info = &st_wdog_info,
  118. .ops = &st_wdog_ops,
  119. };
  120. static int st_wdog_probe(struct platform_device *pdev)
  121. {
  122. const struct of_device_id *match;
  123. struct device_node *np = pdev->dev.of_node;
  124. struct st_wdog *st_wdog;
  125. struct regmap *regmap;
  126. struct resource *res;
  127. struct clk *clk;
  128. void __iomem *base;
  129. uint32_t mode;
  130. int ret;
  131. ret = of_property_read_u32(np, "st,lpc-mode", &mode);
  132. if (ret) {
  133. dev_err(&pdev->dev, "An LPC mode must be provided\n");
  134. return -EINVAL;
  135. }
  136. /* LPC can either run as a Clocksource or in RTC or WDT mode */
  137. if (mode != ST_LPC_MODE_WDT)
  138. return -ENODEV;
  139. st_wdog = devm_kzalloc(&pdev->dev, sizeof(*st_wdog), GFP_KERNEL);
  140. if (!st_wdog)
  141. return -ENOMEM;
  142. match = of_match_device(st_wdog_match, &pdev->dev);
  143. if (!match) {
  144. dev_err(&pdev->dev, "Couldn't match device\n");
  145. return -ENODEV;
  146. }
  147. st_wdog->syscfg = (struct st_wdog_syscfg *)match->data;
  148. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  149. base = devm_ioremap_resource(&pdev->dev, res);
  150. if (IS_ERR(base))
  151. return PTR_ERR(base);
  152. regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
  153. if (IS_ERR(regmap)) {
  154. dev_err(&pdev->dev, "No syscfg phandle specified\n");
  155. return PTR_ERR(regmap);
  156. }
  157. clk = devm_clk_get(&pdev->dev, NULL);
  158. if (IS_ERR(clk)) {
  159. dev_err(&pdev->dev, "Unable to request clock\n");
  160. return PTR_ERR(clk);
  161. }
  162. st_wdog->dev = &pdev->dev;
  163. st_wdog->base = base;
  164. st_wdog->clk = clk;
  165. st_wdog->regmap = regmap;
  166. st_wdog->warm_reset = of_property_read_bool(np, "st,warm_reset");
  167. st_wdog->clkrate = clk_get_rate(st_wdog->clk);
  168. if (!st_wdog->clkrate) {
  169. dev_err(&pdev->dev, "Unable to fetch clock rate\n");
  170. return -EINVAL;
  171. }
  172. st_wdog_dev.max_timeout = 0xFFFFFFFF / st_wdog->clkrate;
  173. st_wdog_dev.parent = &pdev->dev;
  174. ret = clk_prepare_enable(clk);
  175. if (ret) {
  176. dev_err(&pdev->dev, "Unable to enable clock\n");
  177. return ret;
  178. }
  179. watchdog_set_drvdata(&st_wdog_dev, st_wdog);
  180. watchdog_set_nowayout(&st_wdog_dev, WATCHDOG_NOWAYOUT);
  181. /* Init Watchdog timeout with value in DT */
  182. ret = watchdog_init_timeout(&st_wdog_dev, 0, &pdev->dev);
  183. if (ret) {
  184. dev_err(&pdev->dev, "Unable to initialise watchdog timeout\n");
  185. clk_disable_unprepare(clk);
  186. return ret;
  187. }
  188. ret = watchdog_register_device(&st_wdog_dev);
  189. if (ret) {
  190. dev_err(&pdev->dev, "Unable to register watchdog\n");
  191. clk_disable_unprepare(clk);
  192. return ret;
  193. }
  194. st_wdog_setup(st_wdog, true);
  195. dev_info(&pdev->dev, "LPC Watchdog driver registered, reset type is %s",
  196. st_wdog->warm_reset ? "warm" : "cold");
  197. return ret;
  198. }
  199. static int st_wdog_remove(struct platform_device *pdev)
  200. {
  201. struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
  202. st_wdog_setup(st_wdog, false);
  203. watchdog_unregister_device(&st_wdog_dev);
  204. clk_disable_unprepare(st_wdog->clk);
  205. return 0;
  206. }
  207. #ifdef CONFIG_PM_SLEEP
  208. static int st_wdog_suspend(struct device *dev)
  209. {
  210. struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
  211. if (watchdog_active(&st_wdog_dev))
  212. st_wdog_stop(&st_wdog_dev);
  213. st_wdog_setup(st_wdog, false);
  214. clk_disable(st_wdog->clk);
  215. return 0;
  216. }
  217. static int st_wdog_resume(struct device *dev)
  218. {
  219. struct st_wdog *st_wdog = watchdog_get_drvdata(&st_wdog_dev);
  220. int ret;
  221. ret = clk_enable(st_wdog->clk);
  222. if (ret) {
  223. dev_err(dev, "Unable to re-enable clock\n");
  224. watchdog_unregister_device(&st_wdog_dev);
  225. clk_unprepare(st_wdog->clk);
  226. return ret;
  227. }
  228. st_wdog_setup(st_wdog, true);
  229. if (watchdog_active(&st_wdog_dev)) {
  230. st_wdog_load_timer(st_wdog, st_wdog_dev.timeout);
  231. st_wdog_start(&st_wdog_dev);
  232. }
  233. return 0;
  234. }
  235. #endif
  236. static SIMPLE_DEV_PM_OPS(st_wdog_pm_ops,
  237. st_wdog_suspend,
  238. st_wdog_resume);
  239. static struct platform_driver st_wdog_driver = {
  240. .driver = {
  241. .name = "st-lpc-wdt",
  242. .pm = &st_wdog_pm_ops,
  243. .of_match_table = st_wdog_match,
  244. },
  245. .probe = st_wdog_probe,
  246. .remove = st_wdog_remove,
  247. };
  248. module_platform_driver(st_wdog_driver);
  249. MODULE_AUTHOR("David Paris <david.paris@st.com>");
  250. MODULE_DESCRIPTION("ST LPC Watchdog Driver");
  251. MODULE_LICENSE("GPL");