xhci-mtk-sch.c 12 KB

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  1. /*
  2. * Copyright (c) 2015 MediaTek Inc.
  3. * Author:
  4. * Zhigang.Wei <zhigang.wei@mediatek.com>
  5. * Chunfeng.Yun <chunfeng.yun@mediatek.com>
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/slab.h>
  20. #include "xhci.h"
  21. #include "xhci-mtk.h"
  22. #define SS_BW_BOUNDARY 51000
  23. /* table 5-5. High-speed Isoc Transaction Limits in usb_20 spec */
  24. #define HS_BW_BOUNDARY 6144
  25. /* usb2 spec section11.18.1: at most 188 FS bytes per microframe */
  26. #define FS_PAYLOAD_MAX 188
  27. /* mtk scheduler bitmasks */
  28. #define EP_BPKTS(p) ((p) & 0x3f)
  29. #define EP_BCSCOUNT(p) (((p) & 0x7) << 8)
  30. #define EP_BBM(p) ((p) << 11)
  31. #define EP_BOFFSET(p) ((p) & 0x3fff)
  32. #define EP_BREPEAT(p) (((p) & 0x7fff) << 16)
  33. static int is_fs_or_ls(enum usb_device_speed speed)
  34. {
  35. return speed == USB_SPEED_FULL || speed == USB_SPEED_LOW;
  36. }
  37. /*
  38. * get the index of bandwidth domains array which @ep belongs to.
  39. *
  40. * the bandwidth domain array is saved to @sch_array of struct xhci_hcd_mtk,
  41. * each HS root port is treated as a single bandwidth domain,
  42. * but each SS root port is treated as two bandwidth domains, one for IN eps,
  43. * one for OUT eps.
  44. * @real_port value is defined as follow according to xHCI spec:
  45. * 1 for SSport0, ..., N+1 for SSportN, N+2 for HSport0, N+3 for HSport1, etc
  46. * so the bandwidth domain array is organized as follow for simplification:
  47. * SSport0-OUT, SSport0-IN, ..., SSportX-OUT, SSportX-IN, HSport0, ..., HSportY
  48. */
  49. static int get_bw_index(struct xhci_hcd *xhci, struct usb_device *udev,
  50. struct usb_host_endpoint *ep)
  51. {
  52. struct xhci_virt_device *virt_dev;
  53. int bw_index;
  54. virt_dev = xhci->devs[udev->slot_id];
  55. if (udev->speed == USB_SPEED_SUPER) {
  56. if (usb_endpoint_dir_out(&ep->desc))
  57. bw_index = (virt_dev->real_port - 1) * 2;
  58. else
  59. bw_index = (virt_dev->real_port - 1) * 2 + 1;
  60. } else {
  61. /* add one more for each SS port */
  62. bw_index = virt_dev->real_port + xhci->num_usb3_ports - 1;
  63. }
  64. return bw_index;
  65. }
  66. static void setup_sch_info(struct usb_device *udev,
  67. struct xhci_ep_ctx *ep_ctx, struct mu3h_sch_ep_info *sch_ep)
  68. {
  69. u32 ep_type;
  70. u32 ep_interval;
  71. u32 max_packet_size;
  72. u32 max_burst;
  73. u32 mult;
  74. u32 esit_pkts;
  75. ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
  76. ep_interval = CTX_TO_EP_INTERVAL(le32_to_cpu(ep_ctx->ep_info));
  77. max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
  78. max_burst = CTX_TO_MAX_BURST(le32_to_cpu(ep_ctx->ep_info2));
  79. mult = CTX_TO_EP_MULT(le32_to_cpu(ep_ctx->ep_info));
  80. sch_ep->esit = 1 << ep_interval;
  81. sch_ep->offset = 0;
  82. sch_ep->burst_mode = 0;
  83. if (udev->speed == USB_SPEED_HIGH) {
  84. sch_ep->cs_count = 0;
  85. /*
  86. * usb_20 spec section5.9
  87. * a single microframe is enough for HS synchromous endpoints
  88. * in a interval
  89. */
  90. sch_ep->num_budget_microframes = 1;
  91. sch_ep->repeat = 0;
  92. /*
  93. * xHCI spec section6.2.3.4
  94. * @max_burst is the number of additional transactions
  95. * opportunities per microframe
  96. */
  97. sch_ep->pkts = max_burst + 1;
  98. sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
  99. } else if (udev->speed == USB_SPEED_SUPER) {
  100. /* usb3_r1 spec section4.4.7 & 4.4.8 */
  101. sch_ep->cs_count = 0;
  102. esit_pkts = (mult + 1) * (max_burst + 1);
  103. if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
  104. sch_ep->pkts = esit_pkts;
  105. sch_ep->num_budget_microframes = 1;
  106. sch_ep->repeat = 0;
  107. }
  108. if (ep_type == ISOC_IN_EP || ep_type == ISOC_OUT_EP) {
  109. if (esit_pkts <= sch_ep->esit)
  110. sch_ep->pkts = 1;
  111. else
  112. sch_ep->pkts = roundup_pow_of_two(esit_pkts)
  113. / sch_ep->esit;
  114. sch_ep->num_budget_microframes =
  115. DIV_ROUND_UP(esit_pkts, sch_ep->pkts);
  116. if (sch_ep->num_budget_microframes > 1)
  117. sch_ep->repeat = 1;
  118. else
  119. sch_ep->repeat = 0;
  120. }
  121. sch_ep->bw_cost_per_microframe = max_packet_size * sch_ep->pkts;
  122. } else if (is_fs_or_ls(udev->speed)) {
  123. /*
  124. * usb_20 spec section11.18.4
  125. * assume worst cases
  126. */
  127. sch_ep->repeat = 0;
  128. sch_ep->pkts = 1; /* at most one packet for each microframe */
  129. if (ep_type == INT_IN_EP || ep_type == INT_OUT_EP) {
  130. sch_ep->cs_count = 3; /* at most need 3 CS*/
  131. /* one for SS and one for budgeted transaction */
  132. sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
  133. sch_ep->bw_cost_per_microframe = max_packet_size;
  134. }
  135. if (ep_type == ISOC_OUT_EP) {
  136. /*
  137. * the best case FS budget assumes that 188 FS bytes
  138. * occur in each microframe
  139. */
  140. sch_ep->num_budget_microframes = DIV_ROUND_UP(
  141. max_packet_size, FS_PAYLOAD_MAX);
  142. sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
  143. sch_ep->cs_count = sch_ep->num_budget_microframes;
  144. }
  145. if (ep_type == ISOC_IN_EP) {
  146. /* at most need additional two CS. */
  147. sch_ep->cs_count = DIV_ROUND_UP(
  148. max_packet_size, FS_PAYLOAD_MAX) + 2;
  149. sch_ep->num_budget_microframes = sch_ep->cs_count + 2;
  150. sch_ep->bw_cost_per_microframe = FS_PAYLOAD_MAX;
  151. }
  152. }
  153. }
  154. /* Get maximum bandwidth when we schedule at offset slot. */
  155. static u32 get_max_bw(struct mu3h_sch_bw_info *sch_bw,
  156. struct mu3h_sch_ep_info *sch_ep, u32 offset)
  157. {
  158. u32 num_esit;
  159. u32 max_bw = 0;
  160. int i;
  161. int j;
  162. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  163. for (i = 0; i < num_esit; i++) {
  164. u32 base = offset + i * sch_ep->esit;
  165. for (j = 0; j < sch_ep->num_budget_microframes; j++) {
  166. if (sch_bw->bus_bw[base + j] > max_bw)
  167. max_bw = sch_bw->bus_bw[base + j];
  168. }
  169. }
  170. return max_bw;
  171. }
  172. static void update_bus_bw(struct mu3h_sch_bw_info *sch_bw,
  173. struct mu3h_sch_ep_info *sch_ep, int bw_cost)
  174. {
  175. u32 num_esit;
  176. u32 base;
  177. int i;
  178. int j;
  179. num_esit = XHCI_MTK_MAX_ESIT / sch_ep->esit;
  180. for (i = 0; i < num_esit; i++) {
  181. base = sch_ep->offset + i * sch_ep->esit;
  182. for (j = 0; j < sch_ep->num_budget_microframes; j++)
  183. sch_bw->bus_bw[base + j] += bw_cost;
  184. }
  185. }
  186. static int check_sch_bw(struct usb_device *udev,
  187. struct mu3h_sch_bw_info *sch_bw, struct mu3h_sch_ep_info *sch_ep)
  188. {
  189. u32 offset;
  190. u32 esit;
  191. u32 num_budget_microframes;
  192. u32 min_bw;
  193. u32 min_index;
  194. u32 worst_bw;
  195. u32 bw_boundary;
  196. if (sch_ep->esit > XHCI_MTK_MAX_ESIT)
  197. sch_ep->esit = XHCI_MTK_MAX_ESIT;
  198. esit = sch_ep->esit;
  199. num_budget_microframes = sch_ep->num_budget_microframes;
  200. /*
  201. * Search through all possible schedule microframes.
  202. * and find a microframe where its worst bandwidth is minimum.
  203. */
  204. min_bw = ~0;
  205. min_index = 0;
  206. for (offset = 0; offset < esit; offset++) {
  207. if ((offset + num_budget_microframes) > sch_ep->esit)
  208. break;
  209. /*
  210. * usb_20 spec section11.18:
  211. * must never schedule Start-Split in Y6
  212. */
  213. if (is_fs_or_ls(udev->speed) && (offset % 8 == 6))
  214. continue;
  215. worst_bw = get_max_bw(sch_bw, sch_ep, offset);
  216. if (min_bw > worst_bw) {
  217. min_bw = worst_bw;
  218. min_index = offset;
  219. }
  220. if (min_bw == 0)
  221. break;
  222. }
  223. sch_ep->offset = min_index;
  224. bw_boundary = (udev->speed == USB_SPEED_SUPER)
  225. ? SS_BW_BOUNDARY : HS_BW_BOUNDARY;
  226. /* check bandwidth */
  227. if (min_bw + sch_ep->bw_cost_per_microframe > bw_boundary)
  228. return -ERANGE;
  229. /* update bus bandwidth info */
  230. update_bus_bw(sch_bw, sch_ep, sch_ep->bw_cost_per_microframe);
  231. return 0;
  232. }
  233. static bool need_bw_sch(struct usb_host_endpoint *ep,
  234. enum usb_device_speed speed, int has_tt)
  235. {
  236. /* only for periodic endpoints */
  237. if (usb_endpoint_xfer_control(&ep->desc)
  238. || usb_endpoint_xfer_bulk(&ep->desc))
  239. return false;
  240. /*
  241. * for LS & FS periodic endpoints which its device is not behind
  242. * a TT are also ignored, root-hub will schedule them directly,
  243. * but need set @bpkts field of endpoint context to 1.
  244. */
  245. if (is_fs_or_ls(speed) && !has_tt)
  246. return false;
  247. return true;
  248. }
  249. int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk)
  250. {
  251. struct mu3h_sch_bw_info *sch_array;
  252. int num_usb_bus;
  253. int i;
  254. /* ss IN and OUT are separated */
  255. num_usb_bus = mtk->num_u3_ports * 2 + mtk->num_u2_ports;
  256. sch_array = kcalloc(num_usb_bus, sizeof(*sch_array), GFP_KERNEL);
  257. if (sch_array == NULL)
  258. return -ENOMEM;
  259. for (i = 0; i < num_usb_bus; i++)
  260. INIT_LIST_HEAD(&sch_array[i].bw_ep_list);
  261. mtk->sch_array = sch_array;
  262. return 0;
  263. }
  264. EXPORT_SYMBOL_GPL(xhci_mtk_sch_init);
  265. void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk)
  266. {
  267. kfree(mtk->sch_array);
  268. }
  269. EXPORT_SYMBOL_GPL(xhci_mtk_sch_exit);
  270. int xhci_mtk_add_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  271. struct usb_host_endpoint *ep)
  272. {
  273. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  274. struct xhci_hcd *xhci;
  275. struct xhci_ep_ctx *ep_ctx;
  276. struct xhci_slot_ctx *slot_ctx;
  277. struct xhci_virt_device *virt_dev;
  278. struct mu3h_sch_bw_info *sch_bw;
  279. struct mu3h_sch_ep_info *sch_ep;
  280. struct mu3h_sch_bw_info *sch_array;
  281. unsigned int ep_index;
  282. int bw_index;
  283. int ret = 0;
  284. xhci = hcd_to_xhci(hcd);
  285. virt_dev = xhci->devs[udev->slot_id];
  286. ep_index = xhci_get_endpoint_index(&ep->desc);
  287. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  288. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
  289. sch_array = mtk->sch_array;
  290. xhci_dbg(xhci, "%s() type:%d, speed:%d, mpkt:%d, dir:%d, ep:%p\n",
  291. __func__, usb_endpoint_type(&ep->desc), udev->speed,
  292. GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
  293. usb_endpoint_dir_in(&ep->desc), ep);
  294. if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT)) {
  295. /*
  296. * set @bpkts to 1 if it is LS or FS periodic endpoint, and its
  297. * device does not connected through an external HS hub
  298. */
  299. if (usb_endpoint_xfer_int(&ep->desc)
  300. || usb_endpoint_xfer_isoc(&ep->desc))
  301. ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(1));
  302. return 0;
  303. }
  304. bw_index = get_bw_index(xhci, udev, ep);
  305. sch_bw = &sch_array[bw_index];
  306. sch_ep = kzalloc(sizeof(struct mu3h_sch_ep_info), GFP_NOIO);
  307. if (!sch_ep)
  308. return -ENOMEM;
  309. setup_sch_info(udev, ep_ctx, sch_ep);
  310. ret = check_sch_bw(udev, sch_bw, sch_ep);
  311. if (ret) {
  312. xhci_err(xhci, "Not enough bandwidth!\n");
  313. kfree(sch_ep);
  314. return -ENOSPC;
  315. }
  316. list_add_tail(&sch_ep->endpoint, &sch_bw->bw_ep_list);
  317. sch_ep->ep = ep;
  318. ep_ctx->reserved[0] |= cpu_to_le32(EP_BPKTS(sch_ep->pkts)
  319. | EP_BCSCOUNT(sch_ep->cs_count) | EP_BBM(sch_ep->burst_mode));
  320. ep_ctx->reserved[1] |= cpu_to_le32(EP_BOFFSET(sch_ep->offset)
  321. | EP_BREPEAT(sch_ep->repeat));
  322. xhci_dbg(xhci, " PKTS:%x, CSCOUNT:%x, BM:%x, OFFSET:%x, REPEAT:%x\n",
  323. sch_ep->pkts, sch_ep->cs_count, sch_ep->burst_mode,
  324. sch_ep->offset, sch_ep->repeat);
  325. return 0;
  326. }
  327. EXPORT_SYMBOL_GPL(xhci_mtk_add_ep_quirk);
  328. void xhci_mtk_drop_ep_quirk(struct usb_hcd *hcd, struct usb_device *udev,
  329. struct usb_host_endpoint *ep)
  330. {
  331. struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
  332. struct xhci_hcd *xhci;
  333. struct xhci_slot_ctx *slot_ctx;
  334. struct xhci_virt_device *virt_dev;
  335. struct mu3h_sch_bw_info *sch_array;
  336. struct mu3h_sch_bw_info *sch_bw;
  337. struct mu3h_sch_ep_info *sch_ep;
  338. int bw_index;
  339. xhci = hcd_to_xhci(hcd);
  340. virt_dev = xhci->devs[udev->slot_id];
  341. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  342. sch_array = mtk->sch_array;
  343. xhci_dbg(xhci, "%s() type:%d, speed:%d, mpks:%d, dir:%d, ep:%p\n",
  344. __func__, usb_endpoint_type(&ep->desc), udev->speed,
  345. GET_MAX_PACKET(usb_endpoint_maxp(&ep->desc)),
  346. usb_endpoint_dir_in(&ep->desc), ep);
  347. if (!need_bw_sch(ep, udev->speed, slot_ctx->tt_info & TT_SLOT))
  348. return;
  349. bw_index = get_bw_index(xhci, udev, ep);
  350. sch_bw = &sch_array[bw_index];
  351. list_for_each_entry(sch_ep, &sch_bw->bw_ep_list, endpoint) {
  352. if (sch_ep->ep == ep) {
  353. update_bus_bw(sch_bw, sch_ep,
  354. -sch_ep->bw_cost_per_microframe);
  355. list_del(&sch_ep->endpoint);
  356. kfree(sch_ep);
  357. break;
  358. }
  359. }
  360. }
  361. EXPORT_SYMBOL_GPL(xhci_mtk_drop_ep_quirk);