ehci-timer.c 13 KB

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  1. /*
  2. * Copyright (C) 2012 by Alan Stern
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. */
  14. /* This file is part of ehci-hcd.c */
  15. /*-------------------------------------------------------------------------*/
  16. /* Set a bit in the USBCMD register */
  17. static void ehci_set_command_bit(struct ehci_hcd *ehci, u32 bit)
  18. {
  19. ehci->command |= bit;
  20. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  21. /* unblock posted write */
  22. ehci_readl(ehci, &ehci->regs->command);
  23. }
  24. /* Clear a bit in the USBCMD register */
  25. static void ehci_clear_command_bit(struct ehci_hcd *ehci, u32 bit)
  26. {
  27. ehci->command &= ~bit;
  28. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  29. /* unblock posted write */
  30. ehci_readl(ehci, &ehci->regs->command);
  31. }
  32. /*-------------------------------------------------------------------------*/
  33. /*
  34. * EHCI timer support... Now using hrtimers.
  35. *
  36. * Lots of different events are triggered from ehci->hrtimer. Whenever
  37. * the timer routine runs, it checks each possible event; events that are
  38. * currently enabled and whose expiration time has passed get handled.
  39. * The set of enabled events is stored as a collection of bitflags in
  40. * ehci->enabled_hrtimer_events, and they are numbered in order of
  41. * increasing delay values (ranging between 1 ms and 100 ms).
  42. *
  43. * Rather than implementing a sorted list or tree of all pending events,
  44. * we keep track only of the lowest-numbered pending event, in
  45. * ehci->next_hrtimer_event. Whenever ehci->hrtimer gets restarted, its
  46. * expiration time is set to the timeout value for this event.
  47. *
  48. * As a result, events might not get handled right away; the actual delay
  49. * could be anywhere up to twice the requested delay. This doesn't
  50. * matter, because none of the events are especially time-critical. The
  51. * ones that matter most all have a delay of 1 ms, so they will be
  52. * handled after 2 ms at most, which is okay. In addition to this, we
  53. * allow for an expiration range of 1 ms.
  54. */
  55. /*
  56. * Delay lengths for the hrtimer event types.
  57. * Keep this list sorted by delay length, in the same order as
  58. * the event types indexed by enum ehci_hrtimer_event in ehci.h.
  59. */
  60. static unsigned event_delays_ns[] = {
  61. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_ASS */
  62. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_PSS */
  63. 1 * NSEC_PER_MSEC, /* EHCI_HRTIMER_POLL_DEAD */
  64. 1125 * NSEC_PER_USEC, /* EHCI_HRTIMER_UNLINK_INTR */
  65. 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_FREE_ITDS */
  66. 2 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ACTIVE_UNLINK */
  67. 5 * NSEC_PER_MSEC, /* EHCI_HRTIMER_START_UNLINK_INTR */
  68. 6 * NSEC_PER_MSEC, /* EHCI_HRTIMER_ASYNC_UNLINKS */
  69. 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IAA_WATCHDOG */
  70. 10 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_PERIODIC */
  71. 15 * NSEC_PER_MSEC, /* EHCI_HRTIMER_DISABLE_ASYNC */
  72. 100 * NSEC_PER_MSEC, /* EHCI_HRTIMER_IO_WATCHDOG */
  73. };
  74. /* Enable a pending hrtimer event */
  75. static void ehci_enable_event(struct ehci_hcd *ehci, unsigned event,
  76. bool resched)
  77. {
  78. ktime_t *timeout = &ehci->hr_timeouts[event];
  79. if (resched)
  80. *timeout = ktime_add(ktime_get(),
  81. ktime_set(0, event_delays_ns[event]));
  82. ehci->enabled_hrtimer_events |= (1 << event);
  83. /* Track only the lowest-numbered pending event */
  84. if (event < ehci->next_hrtimer_event) {
  85. ehci->next_hrtimer_event = event;
  86. hrtimer_start_range_ns(&ehci->hrtimer, *timeout,
  87. NSEC_PER_MSEC, HRTIMER_MODE_ABS);
  88. }
  89. }
  90. /* Poll the STS_ASS status bit; see when it agrees with CMD_ASE */
  91. static void ehci_poll_ASS(struct ehci_hcd *ehci)
  92. {
  93. unsigned actual, want;
  94. /* Don't enable anything if the controller isn't running (e.g., died) */
  95. if (ehci->rh_state != EHCI_RH_RUNNING)
  96. return;
  97. want = (ehci->command & CMD_ASE) ? STS_ASS : 0;
  98. actual = ehci_readl(ehci, &ehci->regs->status) & STS_ASS;
  99. if (want != actual) {
  100. /* Poll again later, but give up after about 2-4 ms */
  101. if (ehci->ASS_poll_count++ < 2) {
  102. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_ASS, true);
  103. return;
  104. }
  105. ehci_dbg(ehci, "Waited too long for the async schedule status (%x/%x), giving up\n",
  106. want, actual);
  107. }
  108. ehci->ASS_poll_count = 0;
  109. /* The status is up-to-date; restart or stop the schedule as needed */
  110. if (want == 0) { /* Stopped */
  111. if (ehci->async_count > 0)
  112. ehci_set_command_bit(ehci, CMD_ASE);
  113. } else { /* Running */
  114. if (ehci->async_count == 0) {
  115. /* Turn off the schedule after a while */
  116. ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_ASYNC,
  117. true);
  118. }
  119. }
  120. }
  121. /* Turn off the async schedule after a brief delay */
  122. static void ehci_disable_ASE(struct ehci_hcd *ehci)
  123. {
  124. ehci_clear_command_bit(ehci, CMD_ASE);
  125. }
  126. /* Poll the STS_PSS status bit; see when it agrees with CMD_PSE */
  127. static void ehci_poll_PSS(struct ehci_hcd *ehci)
  128. {
  129. unsigned actual, want;
  130. /* Don't do anything if the controller isn't running (e.g., died) */
  131. if (ehci->rh_state != EHCI_RH_RUNNING)
  132. return;
  133. want = (ehci->command & CMD_PSE) ? STS_PSS : 0;
  134. actual = ehci_readl(ehci, &ehci->regs->status) & STS_PSS;
  135. if (want != actual) {
  136. /* Poll again later, but give up after about 2-4 ms */
  137. if (ehci->PSS_poll_count++ < 2) {
  138. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_PSS, true);
  139. return;
  140. }
  141. ehci_dbg(ehci, "Waited too long for the periodic schedule status (%x/%x), giving up\n",
  142. want, actual);
  143. }
  144. ehci->PSS_poll_count = 0;
  145. /* The status is up-to-date; restart or stop the schedule as needed */
  146. if (want == 0) { /* Stopped */
  147. if (ehci->periodic_count > 0)
  148. ehci_set_command_bit(ehci, CMD_PSE);
  149. } else { /* Running */
  150. if (ehci->periodic_count == 0) {
  151. /* Turn off the schedule after a while */
  152. ehci_enable_event(ehci, EHCI_HRTIMER_DISABLE_PERIODIC,
  153. true);
  154. }
  155. }
  156. }
  157. /* Turn off the periodic schedule after a brief delay */
  158. static void ehci_disable_PSE(struct ehci_hcd *ehci)
  159. {
  160. ehci_clear_command_bit(ehci, CMD_PSE);
  161. }
  162. /* Poll the STS_HALT status bit; see when a dead controller stops */
  163. static void ehci_handle_controller_death(struct ehci_hcd *ehci)
  164. {
  165. if (!(ehci_readl(ehci, &ehci->regs->status) & STS_HALT)) {
  166. /* Give up after a few milliseconds */
  167. if (ehci->died_poll_count++ < 5) {
  168. /* Try again later */
  169. ehci_enable_event(ehci, EHCI_HRTIMER_POLL_DEAD, true);
  170. return;
  171. }
  172. ehci_warn(ehci, "Waited too long for the controller to stop, giving up\n");
  173. }
  174. /* Clean up the mess */
  175. ehci->rh_state = EHCI_RH_HALTED;
  176. ehci_writel(ehci, 0, &ehci->regs->configured_flag);
  177. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  178. ehci_work(ehci);
  179. end_unlink_async(ehci);
  180. /* Not in process context, so don't try to reset the controller */
  181. }
  182. /* start to unlink interrupt QHs */
  183. static void ehci_handle_start_intr_unlinks(struct ehci_hcd *ehci)
  184. {
  185. bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
  186. /*
  187. * Process all the QHs on the intr_unlink list that were added
  188. * before the current unlink cycle began. The list is in
  189. * temporal order, so stop when we reach the first entry in the
  190. * current cycle. But if the root hub isn't running then
  191. * process all the QHs on the list.
  192. */
  193. while (!list_empty(&ehci->intr_unlink_wait)) {
  194. struct ehci_qh *qh;
  195. qh = list_first_entry(&ehci->intr_unlink_wait,
  196. struct ehci_qh, unlink_node);
  197. if (!stopped && (qh->unlink_cycle ==
  198. ehci->intr_unlink_wait_cycle))
  199. break;
  200. list_del_init(&qh->unlink_node);
  201. qh->unlink_reason |= QH_UNLINK_QUEUE_EMPTY;
  202. start_unlink_intr(ehci, qh);
  203. }
  204. /* Handle remaining entries later */
  205. if (!list_empty(&ehci->intr_unlink_wait)) {
  206. ehci_enable_event(ehci, EHCI_HRTIMER_START_UNLINK_INTR, true);
  207. ++ehci->intr_unlink_wait_cycle;
  208. }
  209. }
  210. /* Handle unlinked interrupt QHs once they are gone from the hardware */
  211. static void ehci_handle_intr_unlinks(struct ehci_hcd *ehci)
  212. {
  213. bool stopped = (ehci->rh_state < EHCI_RH_RUNNING);
  214. /*
  215. * Process all the QHs on the intr_unlink list that were added
  216. * before the current unlink cycle began. The list is in
  217. * temporal order, so stop when we reach the first entry in the
  218. * current cycle. But if the root hub isn't running then
  219. * process all the QHs on the list.
  220. */
  221. ehci->intr_unlinking = true;
  222. while (!list_empty(&ehci->intr_unlink)) {
  223. struct ehci_qh *qh;
  224. qh = list_first_entry(&ehci->intr_unlink, struct ehci_qh,
  225. unlink_node);
  226. if (!stopped && qh->unlink_cycle == ehci->intr_unlink_cycle)
  227. break;
  228. list_del_init(&qh->unlink_node);
  229. end_unlink_intr(ehci, qh);
  230. }
  231. /* Handle remaining entries later */
  232. if (!list_empty(&ehci->intr_unlink)) {
  233. ehci_enable_event(ehci, EHCI_HRTIMER_UNLINK_INTR, true);
  234. ++ehci->intr_unlink_cycle;
  235. }
  236. ehci->intr_unlinking = false;
  237. }
  238. /* Start another free-iTDs/siTDs cycle */
  239. static void start_free_itds(struct ehci_hcd *ehci)
  240. {
  241. if (!(ehci->enabled_hrtimer_events & BIT(EHCI_HRTIMER_FREE_ITDS))) {
  242. ehci->last_itd_to_free = list_entry(
  243. ehci->cached_itd_list.prev,
  244. struct ehci_itd, itd_list);
  245. ehci->last_sitd_to_free = list_entry(
  246. ehci->cached_sitd_list.prev,
  247. struct ehci_sitd, sitd_list);
  248. ehci_enable_event(ehci, EHCI_HRTIMER_FREE_ITDS, true);
  249. }
  250. }
  251. /* Wait for controller to stop using old iTDs and siTDs */
  252. static void end_free_itds(struct ehci_hcd *ehci)
  253. {
  254. struct ehci_itd *itd, *n;
  255. struct ehci_sitd *sitd, *sn;
  256. if (ehci->rh_state < EHCI_RH_RUNNING) {
  257. ehci->last_itd_to_free = NULL;
  258. ehci->last_sitd_to_free = NULL;
  259. }
  260. list_for_each_entry_safe(itd, n, &ehci->cached_itd_list, itd_list) {
  261. list_del(&itd->itd_list);
  262. dma_pool_free(ehci->itd_pool, itd, itd->itd_dma);
  263. if (itd == ehci->last_itd_to_free)
  264. break;
  265. }
  266. list_for_each_entry_safe(sitd, sn, &ehci->cached_sitd_list, sitd_list) {
  267. list_del(&sitd->sitd_list);
  268. dma_pool_free(ehci->sitd_pool, sitd, sitd->sitd_dma);
  269. if (sitd == ehci->last_sitd_to_free)
  270. break;
  271. }
  272. if (!list_empty(&ehci->cached_itd_list) ||
  273. !list_empty(&ehci->cached_sitd_list))
  274. start_free_itds(ehci);
  275. }
  276. /* Handle lost (or very late) IAA interrupts */
  277. static void ehci_iaa_watchdog(struct ehci_hcd *ehci)
  278. {
  279. u32 cmd, status;
  280. /*
  281. * Lost IAA irqs wedge things badly; seen first with a vt8235.
  282. * So we need this watchdog, but must protect it against both
  283. * (a) SMP races against real IAA firing and retriggering, and
  284. * (b) clean HC shutdown, when IAA watchdog was pending.
  285. */
  286. if (!ehci->iaa_in_progress || ehci->rh_state != EHCI_RH_RUNNING)
  287. return;
  288. /* If we get here, IAA is *REALLY* late. It's barely
  289. * conceivable that the system is so busy that CMD_IAAD
  290. * is still legitimately set, so let's be sure it's
  291. * clear before we read STS_IAA. (The HC should clear
  292. * CMD_IAAD when it sets STS_IAA.)
  293. */
  294. cmd = ehci_readl(ehci, &ehci->regs->command);
  295. /*
  296. * If IAA is set here it either legitimately triggered
  297. * after the watchdog timer expired (_way_ late, so we'll
  298. * still count it as lost) ... or a silicon erratum:
  299. * - VIA seems to set IAA without triggering the IRQ;
  300. * - IAAD potentially cleared without setting IAA.
  301. */
  302. status = ehci_readl(ehci, &ehci->regs->status);
  303. if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
  304. COUNT(ehci->stats.lost_iaa);
  305. ehci_writel(ehci, STS_IAA, &ehci->regs->status);
  306. }
  307. ehci_dbg(ehci, "IAA watchdog: status %x cmd %x\n", status, cmd);
  308. end_iaa_cycle(ehci);
  309. }
  310. /* Enable the I/O watchdog, if appropriate */
  311. static void turn_on_io_watchdog(struct ehci_hcd *ehci)
  312. {
  313. /* Not needed if the controller isn't running or it's already enabled */
  314. if (ehci->rh_state != EHCI_RH_RUNNING ||
  315. (ehci->enabled_hrtimer_events &
  316. BIT(EHCI_HRTIMER_IO_WATCHDOG)))
  317. return;
  318. /*
  319. * Isochronous transfers always need the watchdog.
  320. * For other sorts we use it only if the flag is set.
  321. */
  322. if (ehci->isoc_count > 0 || (ehci->need_io_watchdog &&
  323. ehci->async_count + ehci->intr_count > 0))
  324. ehci_enable_event(ehci, EHCI_HRTIMER_IO_WATCHDOG, true);
  325. }
  326. /*
  327. * Handler functions for the hrtimer event types.
  328. * Keep this array in the same order as the event types indexed by
  329. * enum ehci_hrtimer_event in ehci.h.
  330. */
  331. static void (*event_handlers[])(struct ehci_hcd *) = {
  332. ehci_poll_ASS, /* EHCI_HRTIMER_POLL_ASS */
  333. ehci_poll_PSS, /* EHCI_HRTIMER_POLL_PSS */
  334. ehci_handle_controller_death, /* EHCI_HRTIMER_POLL_DEAD */
  335. ehci_handle_intr_unlinks, /* EHCI_HRTIMER_UNLINK_INTR */
  336. end_free_itds, /* EHCI_HRTIMER_FREE_ITDS */
  337. end_unlink_async, /* EHCI_HRTIMER_ACTIVE_UNLINK */
  338. ehci_handle_start_intr_unlinks, /* EHCI_HRTIMER_START_UNLINK_INTR */
  339. unlink_empty_async, /* EHCI_HRTIMER_ASYNC_UNLINKS */
  340. ehci_iaa_watchdog, /* EHCI_HRTIMER_IAA_WATCHDOG */
  341. ehci_disable_PSE, /* EHCI_HRTIMER_DISABLE_PERIODIC */
  342. ehci_disable_ASE, /* EHCI_HRTIMER_DISABLE_ASYNC */
  343. ehci_work, /* EHCI_HRTIMER_IO_WATCHDOG */
  344. };
  345. static enum hrtimer_restart ehci_hrtimer_func(struct hrtimer *t)
  346. {
  347. struct ehci_hcd *ehci = container_of(t, struct ehci_hcd, hrtimer);
  348. ktime_t now;
  349. unsigned long events;
  350. unsigned long flags;
  351. unsigned e;
  352. spin_lock_irqsave(&ehci->lock, flags);
  353. events = ehci->enabled_hrtimer_events;
  354. ehci->enabled_hrtimer_events = 0;
  355. ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
  356. /*
  357. * Check each pending event. If its time has expired, handle
  358. * the event; otherwise re-enable it.
  359. */
  360. now = ktime_get();
  361. for_each_set_bit(e, &events, EHCI_HRTIMER_NUM_EVENTS) {
  362. if (now.tv64 >= ehci->hr_timeouts[e].tv64)
  363. event_handlers[e](ehci);
  364. else
  365. ehci_enable_event(ehci, e, false);
  366. }
  367. spin_unlock_irqrestore(&ehci->lock, flags);
  368. return HRTIMER_NORESTART;
  369. }