mxser.c 70 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on
  18. * www.moxa.com.
  19. * - Fixed x86_64 cleanness
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <linux/slab.h>
  41. #include <linux/ratelimit.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.5" /* 1.14 */
  47. #define MXSERMAJOR 174
  48. #define MXSER_BOARDS 4 /* Max. boards */
  49. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  50. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  51. #define MXSER_ISR_PASS_LIMIT 100
  52. /*CheckIsMoxaMust return value*/
  53. #define MOXA_OTHER_UART 0x00
  54. #define MOXA_MUST_MU150_HWID 0x01
  55. #define MOXA_MUST_MU860_HWID 0x02
  56. #define WAKEUP_CHARS 256
  57. #define UART_MCR_AFE 0x20
  58. #define UART_LSR_SPECIAL 0x1E
  59. #define PCI_DEVICE_ID_POS104UL 0x1044
  60. #define PCI_DEVICE_ID_CB108 0x1080
  61. #define PCI_DEVICE_ID_CP102UF 0x1023
  62. #define PCI_DEVICE_ID_CP112UL 0x1120
  63. #define PCI_DEVICE_ID_CB114 0x1142
  64. #define PCI_DEVICE_ID_CP114UL 0x1143
  65. #define PCI_DEVICE_ID_CB134I 0x1341
  66. #define PCI_DEVICE_ID_CP138U 0x1380
  67. #define C168_ASIC_ID 1
  68. #define C104_ASIC_ID 2
  69. #define C102_ASIC_ID 0xB
  70. #define CI132_ASIC_ID 4
  71. #define CI134_ASIC_ID 3
  72. #define CI104J_ASIC_ID 5
  73. #define MXSER_HIGHBAUD 1
  74. #define MXSER_HAS2 2
  75. /* This is only for PCI */
  76. static const struct {
  77. int type;
  78. int tx_fifo;
  79. int rx_fifo;
  80. int xmit_fifo_size;
  81. int rx_high_water;
  82. int rx_trigger;
  83. int rx_low_water;
  84. long max_baud;
  85. } Gpci_uart_info[] = {
  86. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  87. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  88. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  89. };
  90. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  91. struct mxser_cardinfo {
  92. char *name;
  93. unsigned int nports;
  94. unsigned int flags;
  95. };
  96. static const struct mxser_cardinfo mxser_cards[] = {
  97. /* 0*/ { "C168 series", 8, },
  98. { "C104 series", 4, },
  99. { "CI-104J series", 4, },
  100. { "C168H/PCI series", 8, },
  101. { "C104H/PCI series", 4, },
  102. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  103. { "CI-132 series", 4, MXSER_HAS2 },
  104. { "CI-134 series", 4, },
  105. { "CP-132 series", 2, },
  106. { "CP-114 series", 4, },
  107. /*10*/ { "CT-114 series", 4, },
  108. { "CP-102 series", 2, MXSER_HIGHBAUD },
  109. { "CP-104U series", 4, },
  110. { "CP-168U series", 8, },
  111. { "CP-132U series", 2, },
  112. /*15*/ { "CP-134U series", 4, },
  113. { "CP-104JU series", 4, },
  114. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  115. { "CP-118U series", 8, },
  116. { "CP-102UL series", 2, },
  117. /*20*/ { "CP-102U series", 2, },
  118. { "CP-118EL series", 8, },
  119. { "CP-168EL series", 8, },
  120. { "CP-104EL series", 4, },
  121. { "CB-108 series", 8, },
  122. /*25*/ { "CB-114 series", 4, },
  123. { "CB-134I series", 4, },
  124. { "CP-138U series", 8, },
  125. { "POS-104UL series", 4, },
  126. { "CP-114UL series", 4, },
  127. /*30*/ { "CP-102UF series", 2, },
  128. { "CP-112UL series", 2, },
  129. };
  130. /* driver_data correspond to the lines in the structure above
  131. see also ISA probe function before you change something */
  132. static struct pci_device_id mxser_pcibrds[] = {
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  158. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 },
  159. { }
  160. };
  161. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  162. static unsigned long ioaddr[MXSER_BOARDS];
  163. static int ttymajor = MXSERMAJOR;
  164. /* Variables for insmod */
  165. MODULE_AUTHOR("Casper Yang");
  166. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  167. module_param_array(ioaddr, ulong, NULL, 0);
  168. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  169. module_param(ttymajor, int, 0);
  170. MODULE_LICENSE("GPL");
  171. struct mxser_log {
  172. int tick;
  173. unsigned long rxcnt[MXSER_PORTS];
  174. unsigned long txcnt[MXSER_PORTS];
  175. };
  176. struct mxser_mon {
  177. unsigned long rxcnt;
  178. unsigned long txcnt;
  179. unsigned long up_rxcnt;
  180. unsigned long up_txcnt;
  181. int modem_status;
  182. unsigned char hold_reason;
  183. };
  184. struct mxser_mon_ext {
  185. unsigned long rx_cnt[32];
  186. unsigned long tx_cnt[32];
  187. unsigned long up_rxcnt[32];
  188. unsigned long up_txcnt[32];
  189. int modem_status[32];
  190. long baudrate[32];
  191. int databits[32];
  192. int stopbits[32];
  193. int parity[32];
  194. int flowctrl[32];
  195. int fifo[32];
  196. int iftype[32];
  197. };
  198. struct mxser_board;
  199. struct mxser_port {
  200. struct tty_port port;
  201. struct mxser_board *board;
  202. unsigned long ioaddr;
  203. unsigned long opmode_ioaddr;
  204. int max_baud;
  205. int rx_high_water;
  206. int rx_trigger; /* Rx fifo trigger level */
  207. int rx_low_water;
  208. int baud_base; /* max. speed */
  209. int type; /* UART type */
  210. int x_char; /* xon/xoff character */
  211. int IER; /* Interrupt Enable Register */
  212. int MCR; /* Modem control register */
  213. unsigned char stop_rx;
  214. unsigned char ldisc_stop_rx;
  215. int custom_divisor;
  216. unsigned char err_shadow;
  217. struct async_icount icount; /* kernel counters for 4 input interrupts */
  218. int timeout;
  219. int read_status_mask;
  220. int ignore_status_mask;
  221. int xmit_fifo_size;
  222. int xmit_head;
  223. int xmit_tail;
  224. int xmit_cnt;
  225. int closing;
  226. struct ktermios normal_termios;
  227. struct mxser_mon mon_data;
  228. spinlock_t slock;
  229. };
  230. struct mxser_board {
  231. unsigned int idx;
  232. int irq;
  233. const struct mxser_cardinfo *info;
  234. unsigned long vector;
  235. unsigned long vector_mask;
  236. int chip_flag;
  237. int uart_type;
  238. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  239. };
  240. struct mxser_mstatus {
  241. tcflag_t cflag;
  242. int cts;
  243. int dsr;
  244. int ri;
  245. int dcd;
  246. };
  247. static struct mxser_board mxser_boards[MXSER_BOARDS];
  248. static struct tty_driver *mxvar_sdriver;
  249. static struct mxser_log mxvar_log;
  250. static int mxser_set_baud_method[MXSER_PORTS + 1];
  251. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  252. {
  253. u8 oldlcr;
  254. u8 efr;
  255. oldlcr = inb(baseio + UART_LCR);
  256. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  257. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  258. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  259. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  260. outb(oldlcr, baseio + UART_LCR);
  261. }
  262. #ifdef CONFIG_PCI
  263. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  264. {
  265. u8 oldlcr;
  266. u8 efr;
  267. oldlcr = inb(baseio + UART_LCR);
  268. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  269. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  270. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  271. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  272. outb(oldlcr, baseio + UART_LCR);
  273. }
  274. #endif
  275. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  276. {
  277. u8 oldlcr;
  278. u8 efr;
  279. oldlcr = inb(baseio + UART_LCR);
  280. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  281. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  282. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  283. efr |= MOXA_MUST_EFR_BANK0;
  284. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  285. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  286. outb(oldlcr, baseio + UART_LCR);
  287. }
  288. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  289. {
  290. u8 oldlcr;
  291. u8 efr;
  292. oldlcr = inb(baseio + UART_LCR);
  293. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  294. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  295. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  296. efr |= MOXA_MUST_EFR_BANK0;
  297. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  298. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  299. outb(oldlcr, baseio + UART_LCR);
  300. }
  301. static void mxser_set_must_fifo_value(struct mxser_port *info)
  302. {
  303. u8 oldlcr;
  304. u8 efr;
  305. oldlcr = inb(info->ioaddr + UART_LCR);
  306. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  307. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  308. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  309. efr |= MOXA_MUST_EFR_BANK1;
  310. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  311. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  312. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  313. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  314. outb(oldlcr, info->ioaddr + UART_LCR);
  315. }
  316. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  317. {
  318. u8 oldlcr;
  319. u8 efr;
  320. oldlcr = inb(baseio + UART_LCR);
  321. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  322. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  323. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  324. efr |= MOXA_MUST_EFR_BANK2;
  325. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  326. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  327. outb(oldlcr, baseio + UART_LCR);
  328. }
  329. #ifdef CONFIG_PCI
  330. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  331. {
  332. u8 oldlcr;
  333. u8 efr;
  334. oldlcr = inb(baseio + UART_LCR);
  335. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  336. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  337. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  338. efr |= MOXA_MUST_EFR_BANK2;
  339. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  340. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  341. outb(oldlcr, baseio + UART_LCR);
  342. }
  343. #endif
  344. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  345. {
  346. u8 oldlcr;
  347. u8 efr;
  348. oldlcr = inb(baseio + UART_LCR);
  349. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  350. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  351. efr &= ~MOXA_MUST_EFR_SF_MASK;
  352. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  353. outb(oldlcr, baseio + UART_LCR);
  354. }
  355. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  356. {
  357. u8 oldlcr;
  358. u8 efr;
  359. oldlcr = inb(baseio + UART_LCR);
  360. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  361. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  362. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  363. efr |= MOXA_MUST_EFR_SF_TX1;
  364. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  365. outb(oldlcr, baseio + UART_LCR);
  366. }
  367. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  368. {
  369. u8 oldlcr;
  370. u8 efr;
  371. oldlcr = inb(baseio + UART_LCR);
  372. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  373. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  374. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  375. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  376. outb(oldlcr, baseio + UART_LCR);
  377. }
  378. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  379. {
  380. u8 oldlcr;
  381. u8 efr;
  382. oldlcr = inb(baseio + UART_LCR);
  383. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  384. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  385. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  386. efr |= MOXA_MUST_EFR_SF_RX1;
  387. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  388. outb(oldlcr, baseio + UART_LCR);
  389. }
  390. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  391. {
  392. u8 oldlcr;
  393. u8 efr;
  394. oldlcr = inb(baseio + UART_LCR);
  395. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  396. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  397. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  398. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  399. outb(oldlcr, baseio + UART_LCR);
  400. }
  401. #ifdef CONFIG_PCI
  402. static int CheckIsMoxaMust(unsigned long io)
  403. {
  404. u8 oldmcr, hwid;
  405. int i;
  406. outb(0, io + UART_LCR);
  407. mxser_disable_must_enchance_mode(io);
  408. oldmcr = inb(io + UART_MCR);
  409. outb(0, io + UART_MCR);
  410. mxser_set_must_xon1_value(io, 0x11);
  411. if ((hwid = inb(io + UART_MCR)) != 0) {
  412. outb(oldmcr, io + UART_MCR);
  413. return MOXA_OTHER_UART;
  414. }
  415. mxser_get_must_hardware_id(io, &hwid);
  416. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  417. if (hwid == Gpci_uart_info[i].type)
  418. return (int)hwid;
  419. }
  420. return MOXA_OTHER_UART;
  421. }
  422. #endif
  423. static void process_txrx_fifo(struct mxser_port *info)
  424. {
  425. int i;
  426. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  427. info->rx_trigger = 1;
  428. info->rx_high_water = 1;
  429. info->rx_low_water = 1;
  430. info->xmit_fifo_size = 1;
  431. } else
  432. for (i = 0; i < UART_INFO_NUM; i++)
  433. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  434. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  435. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  436. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  437. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  438. break;
  439. }
  440. }
  441. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  442. {
  443. static unsigned char mxser_msr[MXSER_PORTS + 1];
  444. unsigned char status = 0;
  445. status = inb(baseaddr + UART_MSR);
  446. mxser_msr[port] &= 0x0F;
  447. mxser_msr[port] |= status;
  448. status = mxser_msr[port];
  449. if (mode)
  450. mxser_msr[port] = 0;
  451. return status;
  452. }
  453. static int mxser_carrier_raised(struct tty_port *port)
  454. {
  455. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  456. return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0;
  457. }
  458. static void mxser_dtr_rts(struct tty_port *port, int on)
  459. {
  460. struct mxser_port *mp = container_of(port, struct mxser_port, port);
  461. unsigned long flags;
  462. spin_lock_irqsave(&mp->slock, flags);
  463. if (on)
  464. outb(inb(mp->ioaddr + UART_MCR) |
  465. UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR);
  466. else
  467. outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS),
  468. mp->ioaddr + UART_MCR);
  469. spin_unlock_irqrestore(&mp->slock, flags);
  470. }
  471. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  472. {
  473. struct mxser_port *info = tty->driver_data;
  474. int quot = 0, baud;
  475. unsigned char cval;
  476. if (!info->ioaddr)
  477. return -1;
  478. if (newspd > info->max_baud)
  479. return -1;
  480. if (newspd == 134) {
  481. quot = 2 * info->baud_base / 269;
  482. tty_encode_baud_rate(tty, 134, 134);
  483. } else if (newspd) {
  484. quot = info->baud_base / newspd;
  485. if (quot == 0)
  486. quot = 1;
  487. baud = info->baud_base/quot;
  488. tty_encode_baud_rate(tty, baud, baud);
  489. } else {
  490. quot = 0;
  491. }
  492. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  493. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  494. if (quot) {
  495. info->MCR |= UART_MCR_DTR;
  496. outb(info->MCR, info->ioaddr + UART_MCR);
  497. } else {
  498. info->MCR &= ~UART_MCR_DTR;
  499. outb(info->MCR, info->ioaddr + UART_MCR);
  500. return 0;
  501. }
  502. cval = inb(info->ioaddr + UART_LCR);
  503. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  504. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  505. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  506. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  507. #ifdef BOTHER
  508. if (C_BAUD(tty) == BOTHER) {
  509. quot = info->baud_base % newspd;
  510. quot *= 8;
  511. if (quot % newspd > newspd / 2) {
  512. quot /= newspd;
  513. quot++;
  514. } else
  515. quot /= newspd;
  516. mxser_set_must_enum_value(info->ioaddr, quot);
  517. } else
  518. #endif
  519. mxser_set_must_enum_value(info->ioaddr, 0);
  520. return 0;
  521. }
  522. /*
  523. * This routine is called to set the UART divisor registers to match
  524. * the specified baud rate for a serial port.
  525. */
  526. static int mxser_change_speed(struct tty_struct *tty,
  527. struct ktermios *old_termios)
  528. {
  529. struct mxser_port *info = tty->driver_data;
  530. unsigned cflag, cval, fcr;
  531. int ret = 0;
  532. unsigned char status;
  533. cflag = tty->termios.c_cflag;
  534. if (!info->ioaddr)
  535. return ret;
  536. if (mxser_set_baud_method[tty->index] == 0)
  537. mxser_set_baud(tty, tty_get_baud_rate(tty));
  538. /* byte size and parity */
  539. switch (cflag & CSIZE) {
  540. case CS5:
  541. cval = 0x00;
  542. break;
  543. case CS6:
  544. cval = 0x01;
  545. break;
  546. case CS7:
  547. cval = 0x02;
  548. break;
  549. case CS8:
  550. cval = 0x03;
  551. break;
  552. default:
  553. cval = 0x00;
  554. break; /* too keep GCC shut... */
  555. }
  556. if (cflag & CSTOPB)
  557. cval |= 0x04;
  558. if (cflag & PARENB)
  559. cval |= UART_LCR_PARITY;
  560. if (!(cflag & PARODD))
  561. cval |= UART_LCR_EPAR;
  562. if (cflag & CMSPAR)
  563. cval |= UART_LCR_SPAR;
  564. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  565. if (info->board->chip_flag) {
  566. fcr = UART_FCR_ENABLE_FIFO;
  567. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  568. mxser_set_must_fifo_value(info);
  569. } else
  570. fcr = 0;
  571. } else {
  572. fcr = UART_FCR_ENABLE_FIFO;
  573. if (info->board->chip_flag) {
  574. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  575. mxser_set_must_fifo_value(info);
  576. } else {
  577. switch (info->rx_trigger) {
  578. case 1:
  579. fcr |= UART_FCR_TRIGGER_1;
  580. break;
  581. case 4:
  582. fcr |= UART_FCR_TRIGGER_4;
  583. break;
  584. case 8:
  585. fcr |= UART_FCR_TRIGGER_8;
  586. break;
  587. default:
  588. fcr |= UART_FCR_TRIGGER_14;
  589. break;
  590. }
  591. }
  592. }
  593. /* CTS flow control flag and modem status interrupts */
  594. info->IER &= ~UART_IER_MSI;
  595. info->MCR &= ~UART_MCR_AFE;
  596. tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
  597. if (cflag & CRTSCTS) {
  598. info->IER |= UART_IER_MSI;
  599. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  600. info->MCR |= UART_MCR_AFE;
  601. } else {
  602. status = inb(info->ioaddr + UART_MSR);
  603. if (tty->hw_stopped) {
  604. if (status & UART_MSR_CTS) {
  605. tty->hw_stopped = 0;
  606. if (info->type != PORT_16550A &&
  607. !info->board->chip_flag) {
  608. outb(info->IER & ~UART_IER_THRI,
  609. info->ioaddr +
  610. UART_IER);
  611. info->IER |= UART_IER_THRI;
  612. outb(info->IER, info->ioaddr +
  613. UART_IER);
  614. }
  615. tty_wakeup(tty);
  616. }
  617. } else {
  618. if (!(status & UART_MSR_CTS)) {
  619. tty->hw_stopped = 1;
  620. if ((info->type != PORT_16550A) &&
  621. (!info->board->chip_flag)) {
  622. info->IER &= ~UART_IER_THRI;
  623. outb(info->IER, info->ioaddr +
  624. UART_IER);
  625. }
  626. }
  627. }
  628. }
  629. }
  630. outb(info->MCR, info->ioaddr + UART_MCR);
  631. tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
  632. if (~cflag & CLOCAL)
  633. info->IER |= UART_IER_MSI;
  634. outb(info->IER, info->ioaddr + UART_IER);
  635. /*
  636. * Set up parity check flag
  637. */
  638. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  639. if (I_INPCK(tty))
  640. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  641. if (I_BRKINT(tty) || I_PARMRK(tty))
  642. info->read_status_mask |= UART_LSR_BI;
  643. info->ignore_status_mask = 0;
  644. if (I_IGNBRK(tty)) {
  645. info->ignore_status_mask |= UART_LSR_BI;
  646. info->read_status_mask |= UART_LSR_BI;
  647. /*
  648. * If we're ignore parity and break indicators, ignore
  649. * overruns too. (For real raw support).
  650. */
  651. if (I_IGNPAR(tty)) {
  652. info->ignore_status_mask |=
  653. UART_LSR_OE |
  654. UART_LSR_PE |
  655. UART_LSR_FE;
  656. info->read_status_mask |=
  657. UART_LSR_OE |
  658. UART_LSR_PE |
  659. UART_LSR_FE;
  660. }
  661. }
  662. if (info->board->chip_flag) {
  663. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  664. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  665. if (I_IXON(tty)) {
  666. mxser_enable_must_rx_software_flow_control(
  667. info->ioaddr);
  668. } else {
  669. mxser_disable_must_rx_software_flow_control(
  670. info->ioaddr);
  671. }
  672. if (I_IXOFF(tty)) {
  673. mxser_enable_must_tx_software_flow_control(
  674. info->ioaddr);
  675. } else {
  676. mxser_disable_must_tx_software_flow_control(
  677. info->ioaddr);
  678. }
  679. }
  680. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  681. outb(cval, info->ioaddr + UART_LCR);
  682. return ret;
  683. }
  684. static void mxser_check_modem_status(struct tty_struct *tty,
  685. struct mxser_port *port, int status)
  686. {
  687. /* update input line counters */
  688. if (status & UART_MSR_TERI)
  689. port->icount.rng++;
  690. if (status & UART_MSR_DDSR)
  691. port->icount.dsr++;
  692. if (status & UART_MSR_DDCD)
  693. port->icount.dcd++;
  694. if (status & UART_MSR_DCTS)
  695. port->icount.cts++;
  696. port->mon_data.modem_status = status;
  697. wake_up_interruptible(&port->port.delta_msr_wait);
  698. if (tty_port_check_carrier(&port->port) && (status & UART_MSR_DDCD)) {
  699. if (status & UART_MSR_DCD)
  700. wake_up_interruptible(&port->port.open_wait);
  701. }
  702. if (tty_port_cts_enabled(&port->port)) {
  703. if (tty->hw_stopped) {
  704. if (status & UART_MSR_CTS) {
  705. tty->hw_stopped = 0;
  706. if ((port->type != PORT_16550A) &&
  707. (!port->board->chip_flag)) {
  708. outb(port->IER & ~UART_IER_THRI,
  709. port->ioaddr + UART_IER);
  710. port->IER |= UART_IER_THRI;
  711. outb(port->IER, port->ioaddr +
  712. UART_IER);
  713. }
  714. tty_wakeup(tty);
  715. }
  716. } else {
  717. if (!(status & UART_MSR_CTS)) {
  718. tty->hw_stopped = 1;
  719. if (port->type != PORT_16550A &&
  720. !port->board->chip_flag) {
  721. port->IER &= ~UART_IER_THRI;
  722. outb(port->IER, port->ioaddr +
  723. UART_IER);
  724. }
  725. }
  726. }
  727. }
  728. }
  729. static int mxser_activate(struct tty_port *port, struct tty_struct *tty)
  730. {
  731. struct mxser_port *info = container_of(port, struct mxser_port, port);
  732. unsigned long page;
  733. unsigned long flags;
  734. page = __get_free_page(GFP_KERNEL);
  735. if (!page)
  736. return -ENOMEM;
  737. spin_lock_irqsave(&info->slock, flags);
  738. if (!info->ioaddr || !info->type) {
  739. set_bit(TTY_IO_ERROR, &tty->flags);
  740. free_page(page);
  741. spin_unlock_irqrestore(&info->slock, flags);
  742. return 0;
  743. }
  744. info->port.xmit_buf = (unsigned char *) page;
  745. /*
  746. * Clear the FIFO buffers and disable them
  747. * (they will be reenabled in mxser_change_speed())
  748. */
  749. if (info->board->chip_flag)
  750. outb((UART_FCR_CLEAR_RCVR |
  751. UART_FCR_CLEAR_XMIT |
  752. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  753. else
  754. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  755. info->ioaddr + UART_FCR);
  756. /*
  757. * At this point there's no way the LSR could still be 0xFF;
  758. * if it is, then bail out, because there's likely no UART
  759. * here.
  760. */
  761. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  762. spin_unlock_irqrestore(&info->slock, flags);
  763. if (capable(CAP_SYS_ADMIN)) {
  764. set_bit(TTY_IO_ERROR, &tty->flags);
  765. return 0;
  766. } else
  767. return -ENODEV;
  768. }
  769. /*
  770. * Clear the interrupt registers.
  771. */
  772. (void) inb(info->ioaddr + UART_LSR);
  773. (void) inb(info->ioaddr + UART_RX);
  774. (void) inb(info->ioaddr + UART_IIR);
  775. (void) inb(info->ioaddr + UART_MSR);
  776. /*
  777. * Now, initialize the UART
  778. */
  779. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  780. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  781. outb(info->MCR, info->ioaddr + UART_MCR);
  782. /*
  783. * Finally, enable interrupts
  784. */
  785. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  786. if (info->board->chip_flag)
  787. info->IER |= MOXA_MUST_IER_EGDAI;
  788. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  789. /*
  790. * And clear the interrupt registers again for luck.
  791. */
  792. (void) inb(info->ioaddr + UART_LSR);
  793. (void) inb(info->ioaddr + UART_RX);
  794. (void) inb(info->ioaddr + UART_IIR);
  795. (void) inb(info->ioaddr + UART_MSR);
  796. clear_bit(TTY_IO_ERROR, &tty->flags);
  797. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  798. /*
  799. * and set the speed of the serial port
  800. */
  801. mxser_change_speed(tty, NULL);
  802. spin_unlock_irqrestore(&info->slock, flags);
  803. return 0;
  804. }
  805. /*
  806. * This routine will shutdown a serial port
  807. */
  808. static void mxser_shutdown_port(struct tty_port *port)
  809. {
  810. struct mxser_port *info = container_of(port, struct mxser_port, port);
  811. unsigned long flags;
  812. spin_lock_irqsave(&info->slock, flags);
  813. /*
  814. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  815. * here so the queue might never be waken up
  816. */
  817. wake_up_interruptible(&info->port.delta_msr_wait);
  818. /*
  819. * Free the xmit buffer, if necessary
  820. */
  821. if (info->port.xmit_buf) {
  822. free_page((unsigned long) info->port.xmit_buf);
  823. info->port.xmit_buf = NULL;
  824. }
  825. info->IER = 0;
  826. outb(0x00, info->ioaddr + UART_IER);
  827. /* clear Rx/Tx FIFO's */
  828. if (info->board->chip_flag)
  829. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  830. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  831. info->ioaddr + UART_FCR);
  832. else
  833. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  834. info->ioaddr + UART_FCR);
  835. /* read data port to reset things */
  836. (void) inb(info->ioaddr + UART_RX);
  837. if (info->board->chip_flag)
  838. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  839. spin_unlock_irqrestore(&info->slock, flags);
  840. }
  841. /*
  842. * This routine is called whenever a serial port is opened. It
  843. * enables interrupts for a serial port, linking in its async structure into
  844. * the IRQ chain. It also performs the serial-specific
  845. * initialization for the tty structure.
  846. */
  847. static int mxser_open(struct tty_struct *tty, struct file *filp)
  848. {
  849. struct mxser_port *info;
  850. int line;
  851. line = tty->index;
  852. if (line == MXSER_PORTS)
  853. return 0;
  854. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  855. if (!info->ioaddr)
  856. return -ENODEV;
  857. tty->driver_data = info;
  858. return tty_port_open(&info->port, tty, filp);
  859. }
  860. static void mxser_flush_buffer(struct tty_struct *tty)
  861. {
  862. struct mxser_port *info = tty->driver_data;
  863. char fcr;
  864. unsigned long flags;
  865. spin_lock_irqsave(&info->slock, flags);
  866. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  867. fcr = inb(info->ioaddr + UART_FCR);
  868. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  869. info->ioaddr + UART_FCR);
  870. outb(fcr, info->ioaddr + UART_FCR);
  871. spin_unlock_irqrestore(&info->slock, flags);
  872. tty_wakeup(tty);
  873. }
  874. static void mxser_close_port(struct tty_port *port)
  875. {
  876. struct mxser_port *info = container_of(port, struct mxser_port, port);
  877. unsigned long timeout;
  878. /*
  879. * At this point we stop accepting input. To do this, we
  880. * disable the receive line status interrupts, and tell the
  881. * interrupt driver to stop checking the data ready bit in the
  882. * line status register.
  883. */
  884. info->IER &= ~UART_IER_RLSI;
  885. if (info->board->chip_flag)
  886. info->IER &= ~MOXA_MUST_RECV_ISR;
  887. outb(info->IER, info->ioaddr + UART_IER);
  888. /*
  889. * Before we drop DTR, make sure the UART transmitter
  890. * has completely drained; this is especially
  891. * important if there is a transmit FIFO!
  892. */
  893. timeout = jiffies + HZ;
  894. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  895. schedule_timeout_interruptible(5);
  896. if (time_after(jiffies, timeout))
  897. break;
  898. }
  899. }
  900. /*
  901. * This routine is called when the serial port gets closed. First, we
  902. * wait for the last remaining data to be sent. Then, we unlink its
  903. * async structure from the interrupt chain if necessary, and we free
  904. * that IRQ if nothing is left in the chain.
  905. */
  906. static void mxser_close(struct tty_struct *tty, struct file *filp)
  907. {
  908. struct mxser_port *info = tty->driver_data;
  909. struct tty_port *port = &info->port;
  910. if (tty->index == MXSER_PORTS || info == NULL)
  911. return;
  912. if (tty_port_close_start(port, tty, filp) == 0)
  913. return;
  914. info->closing = 1;
  915. mutex_lock(&port->mutex);
  916. mxser_close_port(port);
  917. mxser_flush_buffer(tty);
  918. if (tty_port_initialized(port) && C_HUPCL(tty))
  919. tty_port_lower_dtr_rts(port);
  920. mxser_shutdown_port(port);
  921. tty_port_set_initialized(port, 0);
  922. mutex_unlock(&port->mutex);
  923. info->closing = 0;
  924. /* Right now the tty_port set is done outside of the close_end helper
  925. as we don't yet have everyone using refcounts */
  926. tty_port_close_end(port, tty);
  927. tty_port_tty_set(port, NULL);
  928. }
  929. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  930. {
  931. int c, total = 0;
  932. struct mxser_port *info = tty->driver_data;
  933. unsigned long flags;
  934. if (!info->port.xmit_buf)
  935. return 0;
  936. while (1) {
  937. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  938. SERIAL_XMIT_SIZE - info->xmit_head));
  939. if (c <= 0)
  940. break;
  941. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  942. spin_lock_irqsave(&info->slock, flags);
  943. info->xmit_head = (info->xmit_head + c) &
  944. (SERIAL_XMIT_SIZE - 1);
  945. info->xmit_cnt += c;
  946. spin_unlock_irqrestore(&info->slock, flags);
  947. buf += c;
  948. count -= c;
  949. total += c;
  950. }
  951. if (info->xmit_cnt && !tty->stopped) {
  952. if (!tty->hw_stopped ||
  953. (info->type == PORT_16550A) ||
  954. (info->board->chip_flag)) {
  955. spin_lock_irqsave(&info->slock, flags);
  956. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  957. UART_IER);
  958. info->IER |= UART_IER_THRI;
  959. outb(info->IER, info->ioaddr + UART_IER);
  960. spin_unlock_irqrestore(&info->slock, flags);
  961. }
  962. }
  963. return total;
  964. }
  965. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  966. {
  967. struct mxser_port *info = tty->driver_data;
  968. unsigned long flags;
  969. if (!info->port.xmit_buf)
  970. return 0;
  971. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  972. return 0;
  973. spin_lock_irqsave(&info->slock, flags);
  974. info->port.xmit_buf[info->xmit_head++] = ch;
  975. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  976. info->xmit_cnt++;
  977. spin_unlock_irqrestore(&info->slock, flags);
  978. if (!tty->stopped) {
  979. if (!tty->hw_stopped ||
  980. (info->type == PORT_16550A) ||
  981. info->board->chip_flag) {
  982. spin_lock_irqsave(&info->slock, flags);
  983. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  984. info->IER |= UART_IER_THRI;
  985. outb(info->IER, info->ioaddr + UART_IER);
  986. spin_unlock_irqrestore(&info->slock, flags);
  987. }
  988. }
  989. return 1;
  990. }
  991. static void mxser_flush_chars(struct tty_struct *tty)
  992. {
  993. struct mxser_port *info = tty->driver_data;
  994. unsigned long flags;
  995. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  996. (tty->hw_stopped && info->type != PORT_16550A &&
  997. !info->board->chip_flag))
  998. return;
  999. spin_lock_irqsave(&info->slock, flags);
  1000. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1001. info->IER |= UART_IER_THRI;
  1002. outb(info->IER, info->ioaddr + UART_IER);
  1003. spin_unlock_irqrestore(&info->slock, flags);
  1004. }
  1005. static int mxser_write_room(struct tty_struct *tty)
  1006. {
  1007. struct mxser_port *info = tty->driver_data;
  1008. int ret;
  1009. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1010. return ret < 0 ? 0 : ret;
  1011. }
  1012. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1013. {
  1014. struct mxser_port *info = tty->driver_data;
  1015. return info->xmit_cnt;
  1016. }
  1017. /*
  1018. * ------------------------------------------------------------
  1019. * friends of mxser_ioctl()
  1020. * ------------------------------------------------------------
  1021. */
  1022. static int mxser_get_serial_info(struct tty_struct *tty,
  1023. struct serial_struct __user *retinfo)
  1024. {
  1025. struct mxser_port *info = tty->driver_data;
  1026. struct serial_struct tmp = {
  1027. .type = info->type,
  1028. .line = tty->index,
  1029. .port = info->ioaddr,
  1030. .irq = info->board->irq,
  1031. .flags = info->port.flags,
  1032. .baud_base = info->baud_base,
  1033. .close_delay = info->port.close_delay,
  1034. .closing_wait = info->port.closing_wait,
  1035. .custom_divisor = info->custom_divisor,
  1036. };
  1037. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1038. return -EFAULT;
  1039. return 0;
  1040. }
  1041. static int mxser_set_serial_info(struct tty_struct *tty,
  1042. struct serial_struct __user *new_info)
  1043. {
  1044. struct mxser_port *info = tty->driver_data;
  1045. struct tty_port *port = &info->port;
  1046. struct serial_struct new_serial;
  1047. speed_t baud;
  1048. unsigned long sl_flags;
  1049. unsigned int flags;
  1050. int retval = 0;
  1051. if (!new_info || !info->ioaddr)
  1052. return -ENODEV;
  1053. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1054. return -EFAULT;
  1055. if (new_serial.irq != info->board->irq ||
  1056. new_serial.port != info->ioaddr)
  1057. return -EINVAL;
  1058. flags = port->flags & ASYNC_SPD_MASK;
  1059. if (!capable(CAP_SYS_ADMIN)) {
  1060. if ((new_serial.baud_base != info->baud_base) ||
  1061. (new_serial.close_delay != info->port.close_delay) ||
  1062. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1063. return -EPERM;
  1064. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1065. (new_serial.flags & ASYNC_USR_MASK));
  1066. } else {
  1067. /*
  1068. * OK, past this point, all the error checking has been done.
  1069. * At this point, we start making changes.....
  1070. */
  1071. port->flags = ((port->flags & ~ASYNC_FLAGS) |
  1072. (new_serial.flags & ASYNC_FLAGS));
  1073. port->close_delay = new_serial.close_delay * HZ / 100;
  1074. port->closing_wait = new_serial.closing_wait * HZ / 100;
  1075. port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1076. if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1077. (new_serial.baud_base != info->baud_base ||
  1078. new_serial.custom_divisor !=
  1079. info->custom_divisor)) {
  1080. if (new_serial.custom_divisor == 0)
  1081. return -EINVAL;
  1082. baud = new_serial.baud_base / new_serial.custom_divisor;
  1083. tty_encode_baud_rate(tty, baud, baud);
  1084. }
  1085. }
  1086. info->type = new_serial.type;
  1087. process_txrx_fifo(info);
  1088. if (tty_port_initialized(port)) {
  1089. if (flags != (port->flags & ASYNC_SPD_MASK)) {
  1090. spin_lock_irqsave(&info->slock, sl_flags);
  1091. mxser_change_speed(tty, NULL);
  1092. spin_unlock_irqrestore(&info->slock, sl_flags);
  1093. }
  1094. } else {
  1095. retval = mxser_activate(port, tty);
  1096. if (retval == 0)
  1097. tty_port_set_initialized(port, 1);
  1098. }
  1099. return retval;
  1100. }
  1101. /*
  1102. * mxser_get_lsr_info - get line status register info
  1103. *
  1104. * Purpose: Let user call ioctl() to get info when the UART physically
  1105. * is emptied. On bus types like RS485, the transmitter must
  1106. * release the bus after transmitting. This must be done when
  1107. * the transmit shift register is empty, not be done when the
  1108. * transmit holding register is empty. This functionality
  1109. * allows an RS485 driver to be written in user space.
  1110. */
  1111. static int mxser_get_lsr_info(struct mxser_port *info,
  1112. unsigned int __user *value)
  1113. {
  1114. unsigned char status;
  1115. unsigned int result;
  1116. unsigned long flags;
  1117. spin_lock_irqsave(&info->slock, flags);
  1118. status = inb(info->ioaddr + UART_LSR);
  1119. spin_unlock_irqrestore(&info->slock, flags);
  1120. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1121. return put_user(result, value);
  1122. }
  1123. static int mxser_tiocmget(struct tty_struct *tty)
  1124. {
  1125. struct mxser_port *info = tty->driver_data;
  1126. unsigned char control, status;
  1127. unsigned long flags;
  1128. if (tty->index == MXSER_PORTS)
  1129. return -ENOIOCTLCMD;
  1130. if (tty_io_error(tty))
  1131. return -EIO;
  1132. control = info->MCR;
  1133. spin_lock_irqsave(&info->slock, flags);
  1134. status = inb(info->ioaddr + UART_MSR);
  1135. if (status & UART_MSR_ANY_DELTA)
  1136. mxser_check_modem_status(tty, info, status);
  1137. spin_unlock_irqrestore(&info->slock, flags);
  1138. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1139. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1140. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1141. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1142. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1143. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1144. }
  1145. static int mxser_tiocmset(struct tty_struct *tty,
  1146. unsigned int set, unsigned int clear)
  1147. {
  1148. struct mxser_port *info = tty->driver_data;
  1149. unsigned long flags;
  1150. if (tty->index == MXSER_PORTS)
  1151. return -ENOIOCTLCMD;
  1152. if (tty_io_error(tty))
  1153. return -EIO;
  1154. spin_lock_irqsave(&info->slock, flags);
  1155. if (set & TIOCM_RTS)
  1156. info->MCR |= UART_MCR_RTS;
  1157. if (set & TIOCM_DTR)
  1158. info->MCR |= UART_MCR_DTR;
  1159. if (clear & TIOCM_RTS)
  1160. info->MCR &= ~UART_MCR_RTS;
  1161. if (clear & TIOCM_DTR)
  1162. info->MCR &= ~UART_MCR_DTR;
  1163. outb(info->MCR, info->ioaddr + UART_MCR);
  1164. spin_unlock_irqrestore(&info->slock, flags);
  1165. return 0;
  1166. }
  1167. static int __init mxser_program_mode(int port)
  1168. {
  1169. int id, i, j, n;
  1170. outb(0, port);
  1171. outb(0, port);
  1172. outb(0, port);
  1173. (void)inb(port);
  1174. (void)inb(port);
  1175. outb(0, port);
  1176. (void)inb(port);
  1177. id = inb(port + 1) & 0x1F;
  1178. if ((id != C168_ASIC_ID) &&
  1179. (id != C104_ASIC_ID) &&
  1180. (id != C102_ASIC_ID) &&
  1181. (id != CI132_ASIC_ID) &&
  1182. (id != CI134_ASIC_ID) &&
  1183. (id != CI104J_ASIC_ID))
  1184. return -1;
  1185. for (i = 0, j = 0; i < 4; i++) {
  1186. n = inb(port + 2);
  1187. if (n == 'M') {
  1188. j = 1;
  1189. } else if ((j == 1) && (n == 1)) {
  1190. j = 2;
  1191. break;
  1192. } else
  1193. j = 0;
  1194. }
  1195. if (j != 2)
  1196. id = -2;
  1197. return id;
  1198. }
  1199. static void __init mxser_normal_mode(int port)
  1200. {
  1201. int i, n;
  1202. outb(0xA5, port + 1);
  1203. outb(0x80, port + 3);
  1204. outb(12, port + 0); /* 9600 bps */
  1205. outb(0, port + 1);
  1206. outb(0x03, port + 3); /* 8 data bits */
  1207. outb(0x13, port + 4); /* loop back mode */
  1208. for (i = 0; i < 16; i++) {
  1209. n = inb(port + 5);
  1210. if ((n & 0x61) == 0x60)
  1211. break;
  1212. if ((n & 1) == 1)
  1213. (void)inb(port);
  1214. }
  1215. outb(0x00, port + 4);
  1216. }
  1217. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1218. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1219. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1220. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1221. #define EN_CCMD 0x000 /* Chip's command register */
  1222. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1223. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1224. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1225. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1226. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1227. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1228. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1229. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1230. static int __init mxser_read_register(int port, unsigned short *regs)
  1231. {
  1232. int i, k, value, id;
  1233. unsigned int j;
  1234. id = mxser_program_mode(port);
  1235. if (id < 0)
  1236. return id;
  1237. for (i = 0; i < 14; i++) {
  1238. k = (i & 0x3F) | 0x180;
  1239. for (j = 0x100; j > 0; j >>= 1) {
  1240. outb(CHIP_CS, port);
  1241. if (k & j) {
  1242. outb(CHIP_CS | CHIP_DO, port);
  1243. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1244. } else {
  1245. outb(CHIP_CS, port);
  1246. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1247. }
  1248. }
  1249. (void)inb(port);
  1250. value = 0;
  1251. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1252. outb(CHIP_CS, port);
  1253. outb(CHIP_CS | CHIP_SK, port);
  1254. if (inb(port) & CHIP_DI)
  1255. value |= j;
  1256. }
  1257. regs[i] = value;
  1258. outb(0, port);
  1259. }
  1260. mxser_normal_mode(port);
  1261. return id;
  1262. }
  1263. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1264. {
  1265. struct mxser_port *ip;
  1266. struct tty_port *port;
  1267. struct tty_struct *tty;
  1268. int result, status;
  1269. unsigned int i, j;
  1270. int ret = 0;
  1271. switch (cmd) {
  1272. case MOXA_GET_MAJOR:
  1273. printk_ratelimited(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1274. "%x (GET_MAJOR), fix your userspace\n",
  1275. current->comm, cmd);
  1276. return put_user(ttymajor, (int __user *)argp);
  1277. case MOXA_CHKPORTENABLE:
  1278. result = 0;
  1279. for (i = 0; i < MXSER_BOARDS; i++)
  1280. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1281. if (mxser_boards[i].ports[j].ioaddr)
  1282. result |= (1 << i);
  1283. return put_user(result, (unsigned long __user *)argp);
  1284. case MOXA_GETDATACOUNT:
  1285. /* The receive side is locked by port->slock but it isn't
  1286. clear that an exact snapshot is worth copying here */
  1287. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1288. ret = -EFAULT;
  1289. return ret;
  1290. case MOXA_GETMSTATUS: {
  1291. struct mxser_mstatus ms, __user *msu = argp;
  1292. for (i = 0; i < MXSER_BOARDS; i++)
  1293. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1294. ip = &mxser_boards[i].ports[j];
  1295. port = &ip->port;
  1296. memset(&ms, 0, sizeof(ms));
  1297. mutex_lock(&port->mutex);
  1298. if (!ip->ioaddr)
  1299. goto copy;
  1300. tty = tty_port_tty_get(port);
  1301. if (!tty)
  1302. ms.cflag = ip->normal_termios.c_cflag;
  1303. else
  1304. ms.cflag = tty->termios.c_cflag;
  1305. tty_kref_put(tty);
  1306. spin_lock_irq(&ip->slock);
  1307. status = inb(ip->ioaddr + UART_MSR);
  1308. spin_unlock_irq(&ip->slock);
  1309. if (status & UART_MSR_DCD)
  1310. ms.dcd = 1;
  1311. if (status & UART_MSR_DSR)
  1312. ms.dsr = 1;
  1313. if (status & UART_MSR_CTS)
  1314. ms.cts = 1;
  1315. copy:
  1316. mutex_unlock(&port->mutex);
  1317. if (copy_to_user(msu, &ms, sizeof(ms)))
  1318. return -EFAULT;
  1319. msu++;
  1320. }
  1321. return 0;
  1322. }
  1323. case MOXA_ASPP_MON_EXT: {
  1324. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1325. unsigned int cflag, iflag, p;
  1326. u8 opmode;
  1327. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1328. if (!me)
  1329. return -ENOMEM;
  1330. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1331. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1332. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1333. i = MXSER_BOARDS;
  1334. break;
  1335. }
  1336. ip = &mxser_boards[i].ports[j];
  1337. port = &ip->port;
  1338. mutex_lock(&port->mutex);
  1339. if (!ip->ioaddr) {
  1340. mutex_unlock(&port->mutex);
  1341. continue;
  1342. }
  1343. spin_lock_irq(&ip->slock);
  1344. status = mxser_get_msr(ip->ioaddr, 0, p);
  1345. if (status & UART_MSR_TERI)
  1346. ip->icount.rng++;
  1347. if (status & UART_MSR_DDSR)
  1348. ip->icount.dsr++;
  1349. if (status & UART_MSR_DDCD)
  1350. ip->icount.dcd++;
  1351. if (status & UART_MSR_DCTS)
  1352. ip->icount.cts++;
  1353. ip->mon_data.modem_status = status;
  1354. me->rx_cnt[p] = ip->mon_data.rxcnt;
  1355. me->tx_cnt[p] = ip->mon_data.txcnt;
  1356. me->up_rxcnt[p] = ip->mon_data.up_rxcnt;
  1357. me->up_txcnt[p] = ip->mon_data.up_txcnt;
  1358. me->modem_status[p] =
  1359. ip->mon_data.modem_status;
  1360. spin_unlock_irq(&ip->slock);
  1361. tty = tty_port_tty_get(&ip->port);
  1362. if (!tty) {
  1363. cflag = ip->normal_termios.c_cflag;
  1364. iflag = ip->normal_termios.c_iflag;
  1365. me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios);
  1366. } else {
  1367. cflag = tty->termios.c_cflag;
  1368. iflag = tty->termios.c_iflag;
  1369. me->baudrate[p] = tty_get_baud_rate(tty);
  1370. }
  1371. tty_kref_put(tty);
  1372. me->databits[p] = cflag & CSIZE;
  1373. me->stopbits[p] = cflag & CSTOPB;
  1374. me->parity[p] = cflag & (PARENB | PARODD |
  1375. CMSPAR);
  1376. if (cflag & CRTSCTS)
  1377. me->flowctrl[p] |= 0x03;
  1378. if (iflag & (IXON | IXOFF))
  1379. me->flowctrl[p] |= 0x0C;
  1380. if (ip->type == PORT_16550A)
  1381. me->fifo[p] = 1;
  1382. if (ip->board->chip_flag == MOXA_MUST_MU860_HWID) {
  1383. opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2);
  1384. opmode &= OP_MODE_MASK;
  1385. } else {
  1386. opmode = RS232_MODE;
  1387. }
  1388. me->iftype[p] = opmode;
  1389. mutex_unlock(&port->mutex);
  1390. }
  1391. }
  1392. if (copy_to_user(argp, me, sizeof(*me)))
  1393. ret = -EFAULT;
  1394. kfree(me);
  1395. return ret;
  1396. }
  1397. default:
  1398. return -ENOIOCTLCMD;
  1399. }
  1400. return 0;
  1401. }
  1402. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1403. struct async_icount *cprev)
  1404. {
  1405. struct async_icount cnow;
  1406. unsigned long flags;
  1407. int ret;
  1408. spin_lock_irqsave(&info->slock, flags);
  1409. cnow = info->icount; /* atomic copy */
  1410. spin_unlock_irqrestore(&info->slock, flags);
  1411. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1412. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1413. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1414. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1415. *cprev = cnow;
  1416. return ret;
  1417. }
  1418. static int mxser_ioctl(struct tty_struct *tty,
  1419. unsigned int cmd, unsigned long arg)
  1420. {
  1421. struct mxser_port *info = tty->driver_data;
  1422. struct tty_port *port = &info->port;
  1423. struct async_icount cnow;
  1424. unsigned long flags;
  1425. void __user *argp = (void __user *)arg;
  1426. int retval;
  1427. if (tty->index == MXSER_PORTS)
  1428. return mxser_ioctl_special(cmd, argp);
  1429. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1430. int p;
  1431. unsigned long opmode;
  1432. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1433. int shiftbit;
  1434. unsigned char val, mask;
  1435. if (info->board->chip_flag != MOXA_MUST_MU860_HWID)
  1436. return -EFAULT;
  1437. p = tty->index % 4;
  1438. if (cmd == MOXA_SET_OP_MODE) {
  1439. if (get_user(opmode, (int __user *) argp))
  1440. return -EFAULT;
  1441. if (opmode != RS232_MODE &&
  1442. opmode != RS485_2WIRE_MODE &&
  1443. opmode != RS422_MODE &&
  1444. opmode != RS485_4WIRE_MODE)
  1445. return -EFAULT;
  1446. mask = ModeMask[p];
  1447. shiftbit = p * 2;
  1448. spin_lock_irq(&info->slock);
  1449. val = inb(info->opmode_ioaddr);
  1450. val &= mask;
  1451. val |= (opmode << shiftbit);
  1452. outb(val, info->opmode_ioaddr);
  1453. spin_unlock_irq(&info->slock);
  1454. } else {
  1455. shiftbit = p * 2;
  1456. spin_lock_irq(&info->slock);
  1457. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1458. spin_unlock_irq(&info->slock);
  1459. opmode &= OP_MODE_MASK;
  1460. if (put_user(opmode, (int __user *)argp))
  1461. return -EFAULT;
  1462. }
  1463. return 0;
  1464. }
  1465. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && tty_io_error(tty))
  1466. return -EIO;
  1467. switch (cmd) {
  1468. case TIOCGSERIAL:
  1469. mutex_lock(&port->mutex);
  1470. retval = mxser_get_serial_info(tty, argp);
  1471. mutex_unlock(&port->mutex);
  1472. return retval;
  1473. case TIOCSSERIAL:
  1474. mutex_lock(&port->mutex);
  1475. retval = mxser_set_serial_info(tty, argp);
  1476. mutex_unlock(&port->mutex);
  1477. return retval;
  1478. case TIOCSERGETLSR: /* Get line status register */
  1479. return mxser_get_lsr_info(info, argp);
  1480. /*
  1481. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1482. * - mask passed in arg for lines of interest
  1483. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1484. * Caller should use TIOCGICOUNT to see which one it was
  1485. */
  1486. case TIOCMIWAIT:
  1487. spin_lock_irqsave(&info->slock, flags);
  1488. cnow = info->icount; /* note the counters on entry */
  1489. spin_unlock_irqrestore(&info->slock, flags);
  1490. return wait_event_interruptible(info->port.delta_msr_wait,
  1491. mxser_cflags_changed(info, arg, &cnow));
  1492. case MOXA_HighSpeedOn:
  1493. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1494. case MOXA_SDS_RSTICOUNTER:
  1495. spin_lock_irq(&info->slock);
  1496. info->mon_data.rxcnt = 0;
  1497. info->mon_data.txcnt = 0;
  1498. spin_unlock_irq(&info->slock);
  1499. return 0;
  1500. case MOXA_ASPP_OQUEUE:{
  1501. int len, lsr;
  1502. len = mxser_chars_in_buffer(tty);
  1503. spin_lock_irq(&info->slock);
  1504. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE;
  1505. spin_unlock_irq(&info->slock);
  1506. len += (lsr ? 0 : 1);
  1507. return put_user(len, (int __user *)argp);
  1508. }
  1509. case MOXA_ASPP_MON: {
  1510. int mcr, status;
  1511. spin_lock_irq(&info->slock);
  1512. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1513. mxser_check_modem_status(tty, info, status);
  1514. mcr = inb(info->ioaddr + UART_MCR);
  1515. spin_unlock_irq(&info->slock);
  1516. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1517. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1518. else
  1519. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1520. if (mcr & MOXA_MUST_MCR_TX_XON)
  1521. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1522. else
  1523. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1524. if (tty->hw_stopped)
  1525. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1526. else
  1527. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1528. if (copy_to_user(argp, &info->mon_data,
  1529. sizeof(struct mxser_mon)))
  1530. return -EFAULT;
  1531. return 0;
  1532. }
  1533. case MOXA_ASPP_LSTATUS: {
  1534. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1535. return -EFAULT;
  1536. info->err_shadow = 0;
  1537. return 0;
  1538. }
  1539. case MOXA_SET_BAUD_METHOD: {
  1540. int method;
  1541. if (get_user(method, (int __user *)argp))
  1542. return -EFAULT;
  1543. mxser_set_baud_method[tty->index] = method;
  1544. return put_user(method, (int __user *)argp);
  1545. }
  1546. default:
  1547. return -ENOIOCTLCMD;
  1548. }
  1549. return 0;
  1550. }
  1551. /*
  1552. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1553. * Return: write counters to the user passed counter struct
  1554. * NB: both 1->0 and 0->1 transitions are counted except for
  1555. * RI where only 0->1 is counted.
  1556. */
  1557. static int mxser_get_icount(struct tty_struct *tty,
  1558. struct serial_icounter_struct *icount)
  1559. {
  1560. struct mxser_port *info = tty->driver_data;
  1561. struct async_icount cnow;
  1562. unsigned long flags;
  1563. spin_lock_irqsave(&info->slock, flags);
  1564. cnow = info->icount;
  1565. spin_unlock_irqrestore(&info->slock, flags);
  1566. icount->frame = cnow.frame;
  1567. icount->brk = cnow.brk;
  1568. icount->overrun = cnow.overrun;
  1569. icount->buf_overrun = cnow.buf_overrun;
  1570. icount->parity = cnow.parity;
  1571. icount->rx = cnow.rx;
  1572. icount->tx = cnow.tx;
  1573. icount->cts = cnow.cts;
  1574. icount->dsr = cnow.dsr;
  1575. icount->rng = cnow.rng;
  1576. icount->dcd = cnow.dcd;
  1577. return 0;
  1578. }
  1579. static void mxser_stoprx(struct tty_struct *tty)
  1580. {
  1581. struct mxser_port *info = tty->driver_data;
  1582. info->ldisc_stop_rx = 1;
  1583. if (I_IXOFF(tty)) {
  1584. if (info->board->chip_flag) {
  1585. info->IER &= ~MOXA_MUST_RECV_ISR;
  1586. outb(info->IER, info->ioaddr + UART_IER);
  1587. } else {
  1588. info->x_char = STOP_CHAR(tty);
  1589. outb(0, info->ioaddr + UART_IER);
  1590. info->IER |= UART_IER_THRI;
  1591. outb(info->IER, info->ioaddr + UART_IER);
  1592. }
  1593. }
  1594. if (C_CRTSCTS(tty)) {
  1595. info->MCR &= ~UART_MCR_RTS;
  1596. outb(info->MCR, info->ioaddr + UART_MCR);
  1597. }
  1598. }
  1599. /*
  1600. * This routine is called by the upper-layer tty layer to signal that
  1601. * incoming characters should be throttled.
  1602. */
  1603. static void mxser_throttle(struct tty_struct *tty)
  1604. {
  1605. mxser_stoprx(tty);
  1606. }
  1607. static void mxser_unthrottle(struct tty_struct *tty)
  1608. {
  1609. struct mxser_port *info = tty->driver_data;
  1610. /* startrx */
  1611. info->ldisc_stop_rx = 0;
  1612. if (I_IXOFF(tty)) {
  1613. if (info->x_char)
  1614. info->x_char = 0;
  1615. else {
  1616. if (info->board->chip_flag) {
  1617. info->IER |= MOXA_MUST_RECV_ISR;
  1618. outb(info->IER, info->ioaddr + UART_IER);
  1619. } else {
  1620. info->x_char = START_CHAR(tty);
  1621. outb(0, info->ioaddr + UART_IER);
  1622. info->IER |= UART_IER_THRI;
  1623. outb(info->IER, info->ioaddr + UART_IER);
  1624. }
  1625. }
  1626. }
  1627. if (C_CRTSCTS(tty)) {
  1628. info->MCR |= UART_MCR_RTS;
  1629. outb(info->MCR, info->ioaddr + UART_MCR);
  1630. }
  1631. }
  1632. /*
  1633. * mxser_stop() and mxser_start()
  1634. *
  1635. * This routines are called before setting or resetting tty->stopped.
  1636. * They enable or disable transmitter interrupts, as necessary.
  1637. */
  1638. static void mxser_stop(struct tty_struct *tty)
  1639. {
  1640. struct mxser_port *info = tty->driver_data;
  1641. unsigned long flags;
  1642. spin_lock_irqsave(&info->slock, flags);
  1643. if (info->IER & UART_IER_THRI) {
  1644. info->IER &= ~UART_IER_THRI;
  1645. outb(info->IER, info->ioaddr + UART_IER);
  1646. }
  1647. spin_unlock_irqrestore(&info->slock, flags);
  1648. }
  1649. static void mxser_start(struct tty_struct *tty)
  1650. {
  1651. struct mxser_port *info = tty->driver_data;
  1652. unsigned long flags;
  1653. spin_lock_irqsave(&info->slock, flags);
  1654. if (info->xmit_cnt && info->port.xmit_buf) {
  1655. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1656. info->IER |= UART_IER_THRI;
  1657. outb(info->IER, info->ioaddr + UART_IER);
  1658. }
  1659. spin_unlock_irqrestore(&info->slock, flags);
  1660. }
  1661. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1662. {
  1663. struct mxser_port *info = tty->driver_data;
  1664. unsigned long flags;
  1665. spin_lock_irqsave(&info->slock, flags);
  1666. mxser_change_speed(tty, old_termios);
  1667. spin_unlock_irqrestore(&info->slock, flags);
  1668. if ((old_termios->c_cflag & CRTSCTS) && !C_CRTSCTS(tty)) {
  1669. tty->hw_stopped = 0;
  1670. mxser_start(tty);
  1671. }
  1672. /* Handle sw stopped */
  1673. if ((old_termios->c_iflag & IXON) && !I_IXON(tty)) {
  1674. tty->stopped = 0;
  1675. if (info->board->chip_flag) {
  1676. spin_lock_irqsave(&info->slock, flags);
  1677. mxser_disable_must_rx_software_flow_control(
  1678. info->ioaddr);
  1679. spin_unlock_irqrestore(&info->slock, flags);
  1680. }
  1681. mxser_start(tty);
  1682. }
  1683. }
  1684. /*
  1685. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1686. */
  1687. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1688. {
  1689. struct mxser_port *info = tty->driver_data;
  1690. unsigned long orig_jiffies, char_time;
  1691. unsigned long flags;
  1692. int lsr;
  1693. if (info->type == PORT_UNKNOWN)
  1694. return;
  1695. if (info->xmit_fifo_size == 0)
  1696. return; /* Just in case.... */
  1697. orig_jiffies = jiffies;
  1698. /*
  1699. * Set the check interval to be 1/5 of the estimated time to
  1700. * send a single character, and make it at least 1. The check
  1701. * interval should also be less than the timeout.
  1702. *
  1703. * Note: we have to use pretty tight timings here to satisfy
  1704. * the NIST-PCTS.
  1705. */
  1706. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1707. char_time = char_time / 5;
  1708. if (char_time == 0)
  1709. char_time = 1;
  1710. if (timeout && timeout < char_time)
  1711. char_time = timeout;
  1712. /*
  1713. * If the transmitter hasn't cleared in twice the approximate
  1714. * amount of time to send the entire FIFO, it probably won't
  1715. * ever clear. This assumes the UART isn't doing flow
  1716. * control, which is currently the case. Hence, if it ever
  1717. * takes longer than info->timeout, this is probably due to a
  1718. * UART bug of some kind. So, we clamp the timeout parameter at
  1719. * 2*info->timeout.
  1720. */
  1721. if (!timeout || timeout > 2 * info->timeout)
  1722. timeout = 2 * info->timeout;
  1723. spin_lock_irqsave(&info->slock, flags);
  1724. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1725. spin_unlock_irqrestore(&info->slock, flags);
  1726. schedule_timeout_interruptible(char_time);
  1727. spin_lock_irqsave(&info->slock, flags);
  1728. if (signal_pending(current))
  1729. break;
  1730. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1731. break;
  1732. }
  1733. spin_unlock_irqrestore(&info->slock, flags);
  1734. set_current_state(TASK_RUNNING);
  1735. }
  1736. /*
  1737. * This routine is called by tty_hangup() when a hangup is signaled.
  1738. */
  1739. static void mxser_hangup(struct tty_struct *tty)
  1740. {
  1741. struct mxser_port *info = tty->driver_data;
  1742. mxser_flush_buffer(tty);
  1743. tty_port_hangup(&info->port);
  1744. }
  1745. /*
  1746. * mxser_rs_break() --- routine which turns the break handling on or off
  1747. */
  1748. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1749. {
  1750. struct mxser_port *info = tty->driver_data;
  1751. unsigned long flags;
  1752. spin_lock_irqsave(&info->slock, flags);
  1753. if (break_state == -1)
  1754. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1755. info->ioaddr + UART_LCR);
  1756. else
  1757. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1758. info->ioaddr + UART_LCR);
  1759. spin_unlock_irqrestore(&info->slock, flags);
  1760. return 0;
  1761. }
  1762. static void mxser_receive_chars(struct tty_struct *tty,
  1763. struct mxser_port *port, int *status)
  1764. {
  1765. unsigned char ch, gdl;
  1766. int ignored = 0;
  1767. int cnt = 0;
  1768. int recv_room;
  1769. int max = 256;
  1770. recv_room = tty->receive_room;
  1771. if (recv_room == 0 && !port->ldisc_stop_rx)
  1772. mxser_stoprx(tty);
  1773. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1774. if (*status & UART_LSR_SPECIAL)
  1775. goto intr_old;
  1776. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1777. (*status & MOXA_MUST_LSR_RERR))
  1778. goto intr_old;
  1779. if (*status & MOXA_MUST_LSR_RERR)
  1780. goto intr_old;
  1781. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1782. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1783. gdl &= MOXA_MUST_GDL_MASK;
  1784. if (gdl >= recv_room) {
  1785. if (!port->ldisc_stop_rx)
  1786. mxser_stoprx(tty);
  1787. }
  1788. while (gdl--) {
  1789. ch = inb(port->ioaddr + UART_RX);
  1790. tty_insert_flip_char(&port->port, ch, 0);
  1791. cnt++;
  1792. }
  1793. goto end_intr;
  1794. }
  1795. intr_old:
  1796. do {
  1797. if (max-- < 0)
  1798. break;
  1799. ch = inb(port->ioaddr + UART_RX);
  1800. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1801. outb(0x23, port->ioaddr + UART_FCR);
  1802. *status &= port->read_status_mask;
  1803. if (*status & port->ignore_status_mask) {
  1804. if (++ignored > 100)
  1805. break;
  1806. } else {
  1807. char flag = 0;
  1808. if (*status & UART_LSR_SPECIAL) {
  1809. if (*status & UART_LSR_BI) {
  1810. flag = TTY_BREAK;
  1811. port->icount.brk++;
  1812. if (port->port.flags & ASYNC_SAK)
  1813. do_SAK(tty);
  1814. } else if (*status & UART_LSR_PE) {
  1815. flag = TTY_PARITY;
  1816. port->icount.parity++;
  1817. } else if (*status & UART_LSR_FE) {
  1818. flag = TTY_FRAME;
  1819. port->icount.frame++;
  1820. } else if (*status & UART_LSR_OE) {
  1821. flag = TTY_OVERRUN;
  1822. port->icount.overrun++;
  1823. } else
  1824. flag = TTY_BREAK;
  1825. }
  1826. tty_insert_flip_char(&port->port, ch, flag);
  1827. cnt++;
  1828. if (cnt >= recv_room) {
  1829. if (!port->ldisc_stop_rx)
  1830. mxser_stoprx(tty);
  1831. break;
  1832. }
  1833. }
  1834. if (port->board->chip_flag)
  1835. break;
  1836. *status = inb(port->ioaddr + UART_LSR);
  1837. } while (*status & UART_LSR_DR);
  1838. end_intr:
  1839. mxvar_log.rxcnt[tty->index] += cnt;
  1840. port->mon_data.rxcnt += cnt;
  1841. port->mon_data.up_rxcnt += cnt;
  1842. /*
  1843. * We are called from an interrupt context with &port->slock
  1844. * being held. Drop it temporarily in order to prevent
  1845. * recursive locking.
  1846. */
  1847. spin_unlock(&port->slock);
  1848. tty_flip_buffer_push(&port->port);
  1849. spin_lock(&port->slock);
  1850. }
  1851. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1852. {
  1853. int count, cnt;
  1854. if (port->x_char) {
  1855. outb(port->x_char, port->ioaddr + UART_TX);
  1856. port->x_char = 0;
  1857. mxvar_log.txcnt[tty->index]++;
  1858. port->mon_data.txcnt++;
  1859. port->mon_data.up_txcnt++;
  1860. port->icount.tx++;
  1861. return;
  1862. }
  1863. if (port->port.xmit_buf == NULL)
  1864. return;
  1865. if (port->xmit_cnt <= 0 || tty->stopped ||
  1866. (tty->hw_stopped &&
  1867. (port->type != PORT_16550A) &&
  1868. (!port->board->chip_flag))) {
  1869. port->IER &= ~UART_IER_THRI;
  1870. outb(port->IER, port->ioaddr + UART_IER);
  1871. return;
  1872. }
  1873. cnt = port->xmit_cnt;
  1874. count = port->xmit_fifo_size;
  1875. do {
  1876. outb(port->port.xmit_buf[port->xmit_tail++],
  1877. port->ioaddr + UART_TX);
  1878. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1879. if (--port->xmit_cnt <= 0)
  1880. break;
  1881. } while (--count > 0);
  1882. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1883. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1884. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1885. port->icount.tx += (cnt - port->xmit_cnt);
  1886. if (port->xmit_cnt < WAKEUP_CHARS)
  1887. tty_wakeup(tty);
  1888. if (port->xmit_cnt <= 0) {
  1889. port->IER &= ~UART_IER_THRI;
  1890. outb(port->IER, port->ioaddr + UART_IER);
  1891. }
  1892. }
  1893. /*
  1894. * This is the serial driver's generic interrupt routine
  1895. */
  1896. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1897. {
  1898. int status, iir, i;
  1899. struct mxser_board *brd = NULL;
  1900. struct mxser_port *port;
  1901. int max, irqbits, bits, msr;
  1902. unsigned int int_cnt, pass_counter = 0;
  1903. int handled = IRQ_NONE;
  1904. struct tty_struct *tty;
  1905. for (i = 0; i < MXSER_BOARDS; i++)
  1906. if (dev_id == &mxser_boards[i]) {
  1907. brd = dev_id;
  1908. break;
  1909. }
  1910. if (i == MXSER_BOARDS)
  1911. goto irq_stop;
  1912. if (brd == NULL)
  1913. goto irq_stop;
  1914. max = brd->info->nports;
  1915. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  1916. irqbits = inb(brd->vector) & brd->vector_mask;
  1917. if (irqbits == brd->vector_mask)
  1918. break;
  1919. handled = IRQ_HANDLED;
  1920. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1921. if (irqbits == brd->vector_mask)
  1922. break;
  1923. if (bits & irqbits)
  1924. continue;
  1925. port = &brd->ports[i];
  1926. int_cnt = 0;
  1927. spin_lock(&port->slock);
  1928. do {
  1929. iir = inb(port->ioaddr + UART_IIR);
  1930. if (iir & UART_IIR_NO_INT)
  1931. break;
  1932. iir &= MOXA_MUST_IIR_MASK;
  1933. tty = tty_port_tty_get(&port->port);
  1934. if (!tty || port->closing ||
  1935. !tty_port_initialized(&port->port)) {
  1936. status = inb(port->ioaddr + UART_LSR);
  1937. outb(0x27, port->ioaddr + UART_FCR);
  1938. inb(port->ioaddr + UART_MSR);
  1939. tty_kref_put(tty);
  1940. break;
  1941. }
  1942. status = inb(port->ioaddr + UART_LSR);
  1943. if (status & UART_LSR_PE)
  1944. port->err_shadow |= NPPI_NOTIFY_PARITY;
  1945. if (status & UART_LSR_FE)
  1946. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  1947. if (status & UART_LSR_OE)
  1948. port->err_shadow |=
  1949. NPPI_NOTIFY_HW_OVERRUN;
  1950. if (status & UART_LSR_BI)
  1951. port->err_shadow |= NPPI_NOTIFY_BREAK;
  1952. if (port->board->chip_flag) {
  1953. if (iir == MOXA_MUST_IIR_GDA ||
  1954. iir == MOXA_MUST_IIR_RDA ||
  1955. iir == MOXA_MUST_IIR_RTO ||
  1956. iir == MOXA_MUST_IIR_LSR)
  1957. mxser_receive_chars(tty, port,
  1958. &status);
  1959. } else {
  1960. status &= port->read_status_mask;
  1961. if (status & UART_LSR_DR)
  1962. mxser_receive_chars(tty, port,
  1963. &status);
  1964. }
  1965. msr = inb(port->ioaddr + UART_MSR);
  1966. if (msr & UART_MSR_ANY_DELTA)
  1967. mxser_check_modem_status(tty, port, msr);
  1968. if (port->board->chip_flag) {
  1969. if (iir == 0x02 && (status &
  1970. UART_LSR_THRE))
  1971. mxser_transmit_chars(tty, port);
  1972. } else {
  1973. if (status & UART_LSR_THRE)
  1974. mxser_transmit_chars(tty, port);
  1975. }
  1976. tty_kref_put(tty);
  1977. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  1978. spin_unlock(&port->slock);
  1979. }
  1980. }
  1981. irq_stop:
  1982. return handled;
  1983. }
  1984. static const struct tty_operations mxser_ops = {
  1985. .open = mxser_open,
  1986. .close = mxser_close,
  1987. .write = mxser_write,
  1988. .put_char = mxser_put_char,
  1989. .flush_chars = mxser_flush_chars,
  1990. .write_room = mxser_write_room,
  1991. .chars_in_buffer = mxser_chars_in_buffer,
  1992. .flush_buffer = mxser_flush_buffer,
  1993. .ioctl = mxser_ioctl,
  1994. .throttle = mxser_throttle,
  1995. .unthrottle = mxser_unthrottle,
  1996. .set_termios = mxser_set_termios,
  1997. .stop = mxser_stop,
  1998. .start = mxser_start,
  1999. .hangup = mxser_hangup,
  2000. .break_ctl = mxser_rs_break,
  2001. .wait_until_sent = mxser_wait_until_sent,
  2002. .tiocmget = mxser_tiocmget,
  2003. .tiocmset = mxser_tiocmset,
  2004. .get_icount = mxser_get_icount,
  2005. };
  2006. static const struct tty_port_operations mxser_port_ops = {
  2007. .carrier_raised = mxser_carrier_raised,
  2008. .dtr_rts = mxser_dtr_rts,
  2009. .activate = mxser_activate,
  2010. .shutdown = mxser_shutdown_port,
  2011. };
  2012. /*
  2013. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2014. */
  2015. static bool allow_overlapping_vector;
  2016. module_param(allow_overlapping_vector, bool, S_IRUGO);
  2017. MODULE_PARM_DESC(allow_overlapping_vector, "whether we allow ISA cards to be configured such that vector overlabs IO ports (default=no)");
  2018. static bool mxser_overlapping_vector(struct mxser_board *brd)
  2019. {
  2020. return allow_overlapping_vector &&
  2021. brd->vector >= brd->ports[0].ioaddr &&
  2022. brd->vector < brd->ports[0].ioaddr + 8 * brd->info->nports;
  2023. }
  2024. static int mxser_request_vector(struct mxser_board *brd)
  2025. {
  2026. if (mxser_overlapping_vector(brd))
  2027. return 0;
  2028. return request_region(brd->vector, 1, "mxser(vector)") ? 0 : -EIO;
  2029. }
  2030. static void mxser_release_vector(struct mxser_board *brd)
  2031. {
  2032. if (mxser_overlapping_vector(brd))
  2033. return;
  2034. release_region(brd->vector, 1);
  2035. }
  2036. static void mxser_release_ISA_res(struct mxser_board *brd)
  2037. {
  2038. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2039. mxser_release_vector(brd);
  2040. }
  2041. static int mxser_initbrd(struct mxser_board *brd,
  2042. struct pci_dev *pdev)
  2043. {
  2044. struct mxser_port *info;
  2045. unsigned int i;
  2046. int retval;
  2047. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2048. brd->ports[0].max_baud);
  2049. for (i = 0; i < brd->info->nports; i++) {
  2050. info = &brd->ports[i];
  2051. tty_port_init(&info->port);
  2052. info->port.ops = &mxser_port_ops;
  2053. info->board = brd;
  2054. info->stop_rx = 0;
  2055. info->ldisc_stop_rx = 0;
  2056. /* Enhance mode enabled here */
  2057. if (brd->chip_flag != MOXA_OTHER_UART)
  2058. mxser_enable_must_enchance_mode(info->ioaddr);
  2059. info->type = brd->uart_type;
  2060. process_txrx_fifo(info);
  2061. info->custom_divisor = info->baud_base * 16;
  2062. info->port.close_delay = 5 * HZ / 10;
  2063. info->port.closing_wait = 30 * HZ;
  2064. info->normal_termios = mxvar_sdriver->init_termios;
  2065. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2066. info->err_shadow = 0;
  2067. spin_lock_init(&info->slock);
  2068. /* before set INT ISR, disable all int */
  2069. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2070. info->ioaddr + UART_IER);
  2071. }
  2072. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2073. brd);
  2074. if (retval) {
  2075. for (i = 0; i < brd->info->nports; i++)
  2076. tty_port_destroy(&brd->ports[i].port);
  2077. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2078. "conflict with another device.\n",
  2079. brd->info->name, brd->irq);
  2080. }
  2081. return retval;
  2082. }
  2083. static void mxser_board_remove(struct mxser_board *brd)
  2084. {
  2085. unsigned int i;
  2086. for (i = 0; i < brd->info->nports; i++) {
  2087. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2088. tty_port_destroy(&brd->ports[i].port);
  2089. }
  2090. free_irq(brd->irq, brd);
  2091. }
  2092. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2093. {
  2094. int id, i, bits, ret;
  2095. unsigned short regs[16], irq;
  2096. unsigned char scratch, scratch2;
  2097. brd->chip_flag = MOXA_OTHER_UART;
  2098. id = mxser_read_register(cap, regs);
  2099. switch (id) {
  2100. case C168_ASIC_ID:
  2101. brd->info = &mxser_cards[0];
  2102. break;
  2103. case C104_ASIC_ID:
  2104. brd->info = &mxser_cards[1];
  2105. break;
  2106. case CI104J_ASIC_ID:
  2107. brd->info = &mxser_cards[2];
  2108. break;
  2109. case C102_ASIC_ID:
  2110. brd->info = &mxser_cards[5];
  2111. break;
  2112. case CI132_ASIC_ID:
  2113. brd->info = &mxser_cards[6];
  2114. break;
  2115. case CI134_ASIC_ID:
  2116. brd->info = &mxser_cards[7];
  2117. break;
  2118. default:
  2119. return 0;
  2120. }
  2121. irq = 0;
  2122. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2123. Flag-hack checks if configuration should be read as 2-port here. */
  2124. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2125. irq = regs[9] & 0xF000;
  2126. irq = irq | (irq >> 4);
  2127. if (irq != (regs[9] & 0xFF00))
  2128. goto err_irqconflict;
  2129. } else if (brd->info->nports == 4) {
  2130. irq = regs[9] & 0xF000;
  2131. irq = irq | (irq >> 4);
  2132. irq = irq | (irq >> 8);
  2133. if (irq != regs[9])
  2134. goto err_irqconflict;
  2135. } else if (brd->info->nports == 8) {
  2136. irq = regs[9] & 0xF000;
  2137. irq = irq | (irq >> 4);
  2138. irq = irq | (irq >> 8);
  2139. if ((irq != regs[9]) || (irq != regs[10]))
  2140. goto err_irqconflict;
  2141. }
  2142. if (!irq) {
  2143. printk(KERN_ERR "mxser: interrupt number unset\n");
  2144. return -EIO;
  2145. }
  2146. brd->irq = ((int)(irq & 0xF000) >> 12);
  2147. for (i = 0; i < 8; i++)
  2148. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2149. if ((regs[12] & 0x80) == 0) {
  2150. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2151. return -EIO;
  2152. }
  2153. brd->vector = (int)regs[11]; /* interrupt vector */
  2154. if (id == 1)
  2155. brd->vector_mask = 0x00FF;
  2156. else
  2157. brd->vector_mask = 0x000F;
  2158. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2159. if (regs[12] & bits) {
  2160. brd->ports[i].baud_base = 921600;
  2161. brd->ports[i].max_baud = 921600;
  2162. } else {
  2163. brd->ports[i].baud_base = 115200;
  2164. brd->ports[i].max_baud = 115200;
  2165. }
  2166. }
  2167. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2168. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2169. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2170. outb(scratch2, cap + UART_LCR);
  2171. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2172. scratch = inb(cap + UART_IIR);
  2173. if (scratch & 0xC0)
  2174. brd->uart_type = PORT_16550A;
  2175. else
  2176. brd->uart_type = PORT_16450;
  2177. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2178. "mxser(IO)")) {
  2179. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2180. "0x%.8lx-0x%.8lx\n",
  2181. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2182. 8 * brd->info->nports - 1);
  2183. return -EIO;
  2184. }
  2185. ret = mxser_request_vector(brd);
  2186. if (ret) {
  2187. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2188. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2189. "0x%.8lx-0x%.8lx\n",
  2190. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2191. 8 * brd->info->nports - 1);
  2192. return ret;
  2193. }
  2194. return brd->info->nports;
  2195. err_irqconflict:
  2196. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2197. return -EIO;
  2198. }
  2199. static int mxser_probe(struct pci_dev *pdev,
  2200. const struct pci_device_id *ent)
  2201. {
  2202. #ifdef CONFIG_PCI
  2203. struct mxser_board *brd;
  2204. unsigned int i, j;
  2205. unsigned long ioaddress;
  2206. struct device *tty_dev;
  2207. int retval = -EINVAL;
  2208. for (i = 0; i < MXSER_BOARDS; i++)
  2209. if (mxser_boards[i].info == NULL)
  2210. break;
  2211. if (i >= MXSER_BOARDS) {
  2212. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2213. "not configured\n", MXSER_BOARDS);
  2214. goto err;
  2215. }
  2216. brd = &mxser_boards[i];
  2217. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2218. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2219. mxser_cards[ent->driver_data].name,
  2220. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2221. retval = pci_enable_device(pdev);
  2222. if (retval) {
  2223. dev_err(&pdev->dev, "PCI enable failed\n");
  2224. goto err;
  2225. }
  2226. /* io address */
  2227. ioaddress = pci_resource_start(pdev, 2);
  2228. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2229. if (retval)
  2230. goto err_dis;
  2231. brd->info = &mxser_cards[ent->driver_data];
  2232. for (i = 0; i < brd->info->nports; i++)
  2233. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2234. /* vector */
  2235. ioaddress = pci_resource_start(pdev, 3);
  2236. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2237. if (retval)
  2238. goto err_zero;
  2239. brd->vector = ioaddress;
  2240. /* irq */
  2241. brd->irq = pdev->irq;
  2242. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2243. brd->uart_type = PORT_16550A;
  2244. brd->vector_mask = 0;
  2245. for (i = 0; i < brd->info->nports; i++) {
  2246. for (j = 0; j < UART_INFO_NUM; j++) {
  2247. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2248. brd->ports[i].max_baud =
  2249. Gpci_uart_info[j].max_baud;
  2250. /* exception....CP-102 */
  2251. if (brd->info->flags & MXSER_HIGHBAUD)
  2252. brd->ports[i].max_baud = 921600;
  2253. break;
  2254. }
  2255. }
  2256. }
  2257. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2258. for (i = 0; i < brd->info->nports; i++) {
  2259. if (i < 4)
  2260. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2261. else
  2262. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2263. }
  2264. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2265. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2266. }
  2267. for (i = 0; i < brd->info->nports; i++) {
  2268. brd->vector_mask |= (1 << i);
  2269. brd->ports[i].baud_base = 921600;
  2270. }
  2271. /* mxser_initbrd will hook ISR. */
  2272. retval = mxser_initbrd(brd, pdev);
  2273. if (retval)
  2274. goto err_rel3;
  2275. for (i = 0; i < brd->info->nports; i++) {
  2276. tty_dev = tty_port_register_device(&brd->ports[i].port,
  2277. mxvar_sdriver, brd->idx + i, &pdev->dev);
  2278. if (IS_ERR(tty_dev)) {
  2279. retval = PTR_ERR(tty_dev);
  2280. for (; i > 0; i--)
  2281. tty_unregister_device(mxvar_sdriver,
  2282. brd->idx + i - 1);
  2283. goto err_relbrd;
  2284. }
  2285. }
  2286. pci_set_drvdata(pdev, brd);
  2287. return 0;
  2288. err_relbrd:
  2289. for (i = 0; i < brd->info->nports; i++)
  2290. tty_port_destroy(&brd->ports[i].port);
  2291. free_irq(brd->irq, brd);
  2292. err_rel3:
  2293. pci_release_region(pdev, 3);
  2294. err_zero:
  2295. brd->info = NULL;
  2296. pci_release_region(pdev, 2);
  2297. err_dis:
  2298. pci_disable_device(pdev);
  2299. err:
  2300. return retval;
  2301. #else
  2302. return -ENODEV;
  2303. #endif
  2304. }
  2305. static void mxser_remove(struct pci_dev *pdev)
  2306. {
  2307. #ifdef CONFIG_PCI
  2308. struct mxser_board *brd = pci_get_drvdata(pdev);
  2309. mxser_board_remove(brd);
  2310. pci_release_region(pdev, 2);
  2311. pci_release_region(pdev, 3);
  2312. pci_disable_device(pdev);
  2313. brd->info = NULL;
  2314. #endif
  2315. }
  2316. static struct pci_driver mxser_driver = {
  2317. .name = "mxser",
  2318. .id_table = mxser_pcibrds,
  2319. .probe = mxser_probe,
  2320. .remove = mxser_remove
  2321. };
  2322. static int __init mxser_module_init(void)
  2323. {
  2324. struct mxser_board *brd;
  2325. struct device *tty_dev;
  2326. unsigned int b, i, m;
  2327. int retval;
  2328. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2329. if (!mxvar_sdriver)
  2330. return -ENOMEM;
  2331. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2332. MXSER_VERSION);
  2333. /* Initialize the tty_driver structure */
  2334. mxvar_sdriver->name = "ttyMI";
  2335. mxvar_sdriver->major = ttymajor;
  2336. mxvar_sdriver->minor_start = 0;
  2337. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2338. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2339. mxvar_sdriver->init_termios = tty_std_termios;
  2340. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2341. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2342. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2343. retval = tty_register_driver(mxvar_sdriver);
  2344. if (retval) {
  2345. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2346. "tty driver !\n");
  2347. goto err_put;
  2348. }
  2349. /* Start finding ISA boards here */
  2350. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2351. if (!ioaddr[b])
  2352. continue;
  2353. brd = &mxser_boards[m];
  2354. retval = mxser_get_ISA_conf(ioaddr[b], brd);
  2355. if (retval <= 0) {
  2356. brd->info = NULL;
  2357. continue;
  2358. }
  2359. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2360. brd->info->name, ioaddr[b]);
  2361. /* mxser_initbrd will hook ISR. */
  2362. if (mxser_initbrd(brd, NULL) < 0) {
  2363. mxser_release_ISA_res(brd);
  2364. brd->info = NULL;
  2365. continue;
  2366. }
  2367. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2368. for (i = 0; i < brd->info->nports; i++) {
  2369. tty_dev = tty_port_register_device(&brd->ports[i].port,
  2370. mxvar_sdriver, brd->idx + i, NULL);
  2371. if (IS_ERR(tty_dev)) {
  2372. for (; i > 0; i--)
  2373. tty_unregister_device(mxvar_sdriver,
  2374. brd->idx + i - 1);
  2375. for (i = 0; i < brd->info->nports; i++)
  2376. tty_port_destroy(&brd->ports[i].port);
  2377. free_irq(brd->irq, brd);
  2378. mxser_release_ISA_res(brd);
  2379. brd->info = NULL;
  2380. break;
  2381. }
  2382. }
  2383. if (brd->info == NULL)
  2384. continue;
  2385. m++;
  2386. }
  2387. retval = pci_register_driver(&mxser_driver);
  2388. if (retval) {
  2389. printk(KERN_ERR "mxser: can't register pci driver\n");
  2390. if (!m) {
  2391. retval = -ENODEV;
  2392. goto err_unr;
  2393. } /* else: we have some ISA cards under control */
  2394. }
  2395. return 0;
  2396. err_unr:
  2397. tty_unregister_driver(mxvar_sdriver);
  2398. err_put:
  2399. put_tty_driver(mxvar_sdriver);
  2400. return retval;
  2401. }
  2402. static void __exit mxser_module_exit(void)
  2403. {
  2404. unsigned int i;
  2405. pci_unregister_driver(&mxser_driver);
  2406. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2407. if (mxser_boards[i].info != NULL)
  2408. mxser_board_remove(&mxser_boards[i]);
  2409. tty_unregister_driver(mxvar_sdriver);
  2410. put_tty_driver(mxvar_sdriver);
  2411. for (i = 0; i < MXSER_BOARDS; i++)
  2412. if (mxser_boards[i].info != NULL)
  2413. mxser_release_ISA_res(&mxser_boards[i]);
  2414. }
  2415. module_init(mxser_module_init);
  2416. module_exit(mxser_module_exit);